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drm/radeon: allow pcie gen2 speed on NI

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Enabling pcie gen2 speed was skipped for Northern Islands
AISCs, although it looks like it works just fine with the same
initialization sequence used for evergreen.

According to Alex D. gen2 init was skipped to prevent a crash
that has been caused by some other bug that has been
fixed in the meantime; so now it should be safe to enable it.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Ilija Hadzic 2011-09-20 10:22:57 -04:00 committed by Dave Airlie
parent 5a7b74beca
commit cd54033ae9
1 changed files with 1 additions and 2 deletions
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3
drivers/gpu/drm/radeon/evergreen.c
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@ -3050,8 +3050,7 @@ static int evergreen_startup(struct radeon_device *rdev)
int r;
/* enable pcie gen2 link */
if (!ASIC_IS_DCE5(rdev))
evergreen_pcie_gen2_enable(rdev);
evergreen_pcie_gen2_enable(rdev);
if (ASIC_IS_DCE5(rdev)) {
if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) {