[IA64-SGI] Altix patch to add bricktype knowledge to tiocx
Here is a patch to enable the SGI tiocx bus driver to distingush between FPGA-attached h/w and non-FPGA-attached h/w. Signed-off-by: Bruce Losure <blosure@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -21,6 +21,8 @@
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#include <asm/sn/types.h>
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#include <asm/sn/types.h>
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#include <asm/sn/shubio.h>
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#include <asm/sn/shubio.h>
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#include <asm/sn/tiocx.h>
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#include <asm/sn/tiocx.h>
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#include <asm/sn/l1.h>
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#include <asm/sn/module.h>
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#include "tio.h"
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#include "tio.h"
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#include "xtalk/xwidgetdev.h"
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#include "xtalk/xwidgetdev.h"
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#include "xtalk/hubdev.h"
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#include "xtalk/hubdev.h"
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@ -308,14 +310,12 @@ void tiocx_irq_free(struct sn_irq_info *sn_irq_info)
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}
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}
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}
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}
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uint64_t
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uint64_t tiocx_dma_addr(uint64_t addr)
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tiocx_dma_addr(uint64_t addr)
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{
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{
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return PHYS_TO_TIODMA(addr);
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return PHYS_TO_TIODMA(addr);
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}
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}
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uint64_t
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uint64_t tiocx_swin_base(int nasid)
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tiocx_swin_base(int nasid)
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{
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{
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return TIO_SWIN_BASE(nasid, TIOCX_CORELET);
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return TIO_SWIN_BASE(nasid, TIOCX_CORELET);
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}
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}
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@ -366,7 +366,29 @@ static void tio_corelet_reset(nasid_t nasid, int corelet)
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udelay(2000);
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udelay(2000);
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}
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}
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static int fpga_attached(nasid_t nasid)
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static int tiocx_btchar_get(int nasid)
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{
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moduleid_t module_id;
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geoid_t geoid;
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int cnodeid;
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cnodeid = nasid_to_cnodeid(nasid);
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geoid = cnodeid_get_geoid(cnodeid);
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module_id = geo_module(geoid);
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return MODULE_GET_BTCHAR(module_id);
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}
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static int is_fpga_brick(int nasid)
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{
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switch (tiocx_btchar_get(nasid)) {
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case L1_BRICKTYPE_SA:
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case L1_BRICKTYPE_ATHENA:
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return 1;
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}
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return 0;
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}
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static int bitstream_loaded(nasid_t nasid)
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{
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{
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uint64_t cx_credits;
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uint64_t cx_credits;
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@ -383,7 +405,7 @@ static int tiocx_reload(struct cx_dev *cx_dev)
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int mfg_num = CX_DEV_NONE;
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int mfg_num = CX_DEV_NONE;
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nasid_t nasid = cx_dev->cx_id.nasid;
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nasid_t nasid = cx_dev->cx_id.nasid;
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if (fpga_attached(nasid)) {
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if (bitstream_loaded(nasid)) {
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uint64_t cx_id;
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uint64_t cx_id;
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cx_id =
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cx_id =
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@ -414,9 +436,10 @@ static ssize_t show_cxdev_control(struct device *dev, char *buf)
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{
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{
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struct cx_dev *cx_dev = to_cx_dev(dev);
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struct cx_dev *cx_dev = to_cx_dev(dev);
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return sprintf(buf, "0x%x 0x%x 0x%x\n",
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return sprintf(buf, "0x%x 0x%x 0x%x %d\n",
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cx_dev->cx_id.nasid,
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cx_dev->cx_id.nasid,
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cx_dev->cx_id.part_num, cx_dev->cx_id.mfg_num);
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cx_dev->cx_id.part_num, cx_dev->cx_id.mfg_num,
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tiocx_btchar_get(cx_dev->cx_id.nasid));
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}
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}
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static ssize_t store_cxdev_control(struct device *dev, const char *buf,
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static ssize_t store_cxdev_control(struct device *dev, const char *buf,
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@ -462,7 +485,7 @@ static int __init tiocx_init(void)
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if ((nasid = cnodeid_to_nasid(cnodeid)) < 0)
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if ((nasid = cnodeid_to_nasid(cnodeid)) < 0)
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break; /* No more nasids .. bail out of loop */
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break; /* No more nasids .. bail out of loop */
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if (nasid & 0x1) { /* TIO's are always odd */
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if ((nasid & 0x1) && is_fpga_brick(nasid)) {
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struct hubdev_info *hubdev;
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struct hubdev_info *hubdev;
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struct xwidget_info *widgetp;
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struct xwidget_info *widgetp;
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@ -29,8 +29,9 @@
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#define L1_BRICKTYPE_CHI_CG 0x76 /* v */
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#define L1_BRICKTYPE_CHI_CG 0x76 /* v */
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#define L1_BRICKTYPE_X 0x78 /* x */
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#define L1_BRICKTYPE_X 0x78 /* x */
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#define L1_BRICKTYPE_X2 0x79 /* y */
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#define L1_BRICKTYPE_X2 0x79 /* y */
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#define L1_BRICKTYPE_SA 0x5e /* ^ */ /* TIO bringup brick */
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#define L1_BRICKTYPE_SA 0x5e /* ^ */
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#define L1_BRICKTYPE_PA 0x6a /* j */
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#define L1_BRICKTYPE_PA 0x6a /* j */
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#define L1_BRICKTYPE_IA 0x6b /* k */
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#define L1_BRICKTYPE_IA 0x6b /* k */
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#define L1_BRICKTYPE_ATHENA 0x2b /* + */
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#endif /* _ASM_IA64_SN_L1_H */
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#endif /* _ASM_IA64_SN_L1_H */
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