PCI: generic: Add generic PCI host controller driver
Add support for a generic PCI host controller, such as a firmware-initialised device with static windows or an emulation by something such as kvmtool. The controller itself has no configuration registers and has its address spaces described entirely by the device-tree (using the bindings from ePAPR). Both CAM and ECAM are supported for Config Space accesses. Add corresponding documentation for the DT binding. [bhelgaas: currently uses the ARM-specific pci_common_init_dev() interface] Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>hifive-unleashed-5.1
Will Deacon
Bjorn Helgaas
parent
c9eaa447e7
commit
ce292991d8
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@ -0,0 +1,100 @@
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* Generic PCI host controller
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Firmware-initialised PCI host controllers and PCI emulations, such as the
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virtio-pci implementations found in kvmtool and other para-virtualised
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systems, do not require driver support for complexities such as regulator
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and clock management. In fact, the controller may not even require the
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configuration of a control interface by the operating system, instead
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presenting a set of fixed windows describing a subset of IO, Memory and
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Configuration Spaces.
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Such a controller can be described purely in terms of the standardized device
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tree bindings communicated in pci.txt:
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Properties of the host controller node:
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- compatible : Must be "pci-host-cam-generic" or "pci-host-ecam-generic"
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depending on the layout of configuration space (CAM vs
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ECAM respectively).
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- device_type : Must be "pci".
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- ranges : As described in IEEE Std 1275-1994, but must provide
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at least a definition of non-prefetchable memory. One
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or both of prefetchable Memory and IO Space may also
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be provided.
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- bus-range : Optional property (also described in IEEE Std 1275-1994)
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to indicate the range of bus numbers for this controller.
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If absent, defaults to <0 255> (i.e. all buses).
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- #address-cells : Must be 3.
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- #size-cells : Must be 2.
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- reg : The Configuration Space base address and size, as accessed
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from the parent bus.
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Properties of the /chosen node:
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- linux,pci-probe-only
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: Optional property which takes a single-cell argument.
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If '0', then Linux will assign devices in its usual manner,
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otherwise it will not try to assign devices and instead use
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them as they are configured already.
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Configuration Space is assumed to be memory-mapped (as opposed to being
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accessed via an ioport) and laid out with a direct correspondence to the
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geography of a PCI bus address by concatenating the various components to
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form an offset.
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For CAM, this 24-bit offset is:
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cfg_offset(bus, device, function, register) =
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bus << 16 | device << 11 | function << 8 | register
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Whilst ECAM extends this by 4 bits to accomodate 4k of function space:
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cfg_offset(bus, device, function, register) =
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bus << 20 | device << 15 | function << 12 | register
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Interrupt mapping is exactly as described in `Open Firmware Recommended
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Practice: Interrupt Mapping' and requires the following properties:
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- #interrupt-cells : Must be 1
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- interrupt-map : <see aforementioned specification>
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- interrupt-map-mask : <see aforementioned specification>
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Example:
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pci {
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compatible = "pci-host-cam-generic"
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0x1>;
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// CPU_PHYSICAL(2) SIZE(2)
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reg = <0x0 0x40000000 0x0 0x1000000>;
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// BUS_ADDRESS(3) CPU_PHYSICAL(2) SIZE(2)
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ranges = <0x01000000 0x0 0x01000000 0x0 0x01000000 0x0 0x00010000>,
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<0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x3f000000>;
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#interrupt-cells = <0x1>;
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// PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(3)
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interrupt-map = < 0x0 0x0 0x0 0x1 &gic 0x0 0x4 0x1
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0x800 0x0 0x0 0x1 &gic 0x0 0x5 0x1
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0x1000 0x0 0x0 0x1 &gic 0x0 0x6 0x1
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0x1800 0x0 0x0 0x1 &gic 0x0 0x7 0x1>;
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// PCI_DEVICE(3) INT#(1)
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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}
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@ -33,4 +33,11 @@ config PCI_RCAR_GEN2
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There are 3 internal PCI controllers available with a single
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built-in EHCI/OHCI host controller present on each one.
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config PCI_HOST_GENERIC
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bool "Generic PCI host controller"
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depends on ARM && OF
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help
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Say Y here if you want to support a simple generic PCI host
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controller, such as the one emulated by kvmtool.
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endmenu
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@ -4,3 +4,4 @@ obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
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obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
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obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
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obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
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obj-$(CONFIG_PCI_HOST_GENERIC) += pci-host-generic.o
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@ -0,0 +1,388 @@
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/*
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* Simple, generic PCI host controller driver targetting firmware-initialised
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* systems and virtual machines (e.g. the PCI emulation provided by kvmtool).
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Copyright (C) 2014 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include <linux/platform_device.h>
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struct gen_pci_cfg_bus_ops {
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u32 bus_shift;
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void __iomem *(*map_bus)(struct pci_bus *, unsigned int, int);
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};
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struct gen_pci_cfg_windows {
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struct resource res;
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struct resource bus_range;
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void __iomem **win;
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const struct gen_pci_cfg_bus_ops *ops;
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};
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struct gen_pci {
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struct pci_host_bridge host;
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struct gen_pci_cfg_windows cfg;
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struct list_head resources;
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};
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static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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{
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struct pci_sys_data *sys = bus->sysdata;
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struct gen_pci *pci = sys->private_data;
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resource_size_t idx = bus->number - pci->cfg.bus_range.start;
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return pci->cfg.win[idx] + ((devfn << 8) | where);
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}
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static struct gen_pci_cfg_bus_ops gen_pci_cfg_cam_bus_ops = {
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.bus_shift = 16,
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.map_bus = gen_pci_map_cfg_bus_cam,
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};
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static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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{
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struct pci_sys_data *sys = bus->sysdata;
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struct gen_pci *pci = sys->private_data;
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resource_size_t idx = bus->number - pci->cfg.bus_range.start;
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return pci->cfg.win[idx] + ((devfn << 12) | where);
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}
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static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = {
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.bus_shift = 20,
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.map_bus = gen_pci_map_cfg_bus_ecam,
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};
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static int gen_pci_config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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void __iomem *addr;
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struct pci_sys_data *sys = bus->sysdata;
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struct gen_pci *pci = sys->private_data;
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addr = pci->cfg.ops->map_bus(bus, devfn, where);
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switch (size) {
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case 1:
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*val = readb(addr);
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break;
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case 2:
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*val = readw(addr);
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break;
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default:
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*val = readl(addr);
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int gen_pci_config_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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void __iomem *addr;
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struct pci_sys_data *sys = bus->sysdata;
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struct gen_pci *pci = sys->private_data;
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addr = pci->cfg.ops->map_bus(bus, devfn, where);
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switch (size) {
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case 1:
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writeb(val, addr);
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break;
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case 2:
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writew(val, addr);
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break;
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default:
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writel(val, addr);
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static struct pci_ops gen_pci_ops = {
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.read = gen_pci_config_read,
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.write = gen_pci_config_write,
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};
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static const struct of_device_id gen_pci_of_match[] = {
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{ .compatible = "pci-host-cam-generic",
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.data = &gen_pci_cfg_cam_bus_ops },
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{ .compatible = "pci-host-ecam-generic",
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.data = &gen_pci_cfg_ecam_bus_ops },
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{ },
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};
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MODULE_DEVICE_TABLE(of, gen_pci_of_match);
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static int gen_pci_calc_io_offset(struct device *dev,
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struct of_pci_range *range,
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struct resource *res,
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resource_size_t *offset)
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{
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static atomic_t wins = ATOMIC_INIT(0);
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int err, idx, max_win;
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unsigned int window;
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if (!PAGE_ALIGNED(range->cpu_addr))
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return -EINVAL;
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max_win = (IO_SPACE_LIMIT + 1) / SZ_64K;
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idx = atomic_inc_return(&wins);
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if (idx > max_win)
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return -ENOSPC;
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window = (idx - 1) * SZ_64K;
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err = pci_ioremap_io(window, range->cpu_addr);
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if (err)
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return err;
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of_pci_range_to_resource(range, dev->of_node, res);
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res->start = window;
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res->end = res->start + range->size - 1;
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*offset = window - range->pci_addr;
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return 0;
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}
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static int gen_pci_calc_mem_offset(struct device *dev,
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struct of_pci_range *range,
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struct resource *res,
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resource_size_t *offset)
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{
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of_pci_range_to_resource(range, dev->of_node, res);
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*offset = range->cpu_addr - range->pci_addr;
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return 0;
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}
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static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
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{
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struct pci_host_bridge_window *win;
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list_for_each_entry(win, &pci->resources, list)
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release_resource(win->res);
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pci_free_resource_list(&pci->resources);
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}
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static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
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{
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struct of_pci_range range;
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struct of_pci_range_parser parser;
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int err, res_valid = 0;
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struct device *dev = pci->host.dev.parent;
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struct device_node *np = dev->of_node;
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if (of_pci_range_parser_init(&parser, np)) {
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dev_err(dev, "missing \"ranges\" property\n");
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return -EINVAL;
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}
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for_each_of_pci_range(&parser, &range) {
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struct resource *parent, *res;
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resource_size_t offset;
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u32 restype = range.flags & IORESOURCE_TYPE_BITS;
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res = devm_kmalloc(dev, sizeof(*res), GFP_KERNEL);
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if (!res) {
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err = -ENOMEM;
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goto out_release_res;
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}
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switch (restype) {
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case IORESOURCE_IO:
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parent = &ioport_resource;
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err = gen_pci_calc_io_offset(dev, &range, res, &offset);
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break;
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case IORESOURCE_MEM:
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parent = &iomem_resource;
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err = gen_pci_calc_mem_offset(dev, &range, res, &offset);
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res_valid |= !(res->flags & IORESOURCE_PREFETCH || err);
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break;
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default:
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err = -EINVAL;
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continue;
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}
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if (err) {
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dev_warn(dev,
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"error %d: failed to add resource [type 0x%x, %lld bytes]\n",
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err, restype, range.size);
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continue;
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}
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err = request_resource(parent, res);
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if (err)
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goto out_release_res;
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pci_add_resource_offset(&pci->resources, res, offset);
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}
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if (!res_valid) {
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dev_err(dev, "non-prefetchable memory resource required\n");
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err = -EINVAL;
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goto out_release_res;
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}
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return 0;
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out_release_res:
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gen_pci_release_of_pci_ranges(pci);
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return err;
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}
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static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
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{
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int err;
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u8 bus_max;
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resource_size_t busn;
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struct resource *bus_range;
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struct device *dev = pci->host.dev.parent;
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struct device_node *np = dev->of_node;
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if (of_pci_parse_bus_range(np, &pci->cfg.bus_range))
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pci->cfg.bus_range = (struct resource) {
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.name = np->name,
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.start = 0,
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.end = 0xff,
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.flags = IORESOURCE_BUS,
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};
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err = of_address_to_resource(np, 0, &pci->cfg.res);
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if (err) {
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dev_err(dev, "missing \"reg\" property\n");
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return err;
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}
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pci->cfg.win = devm_kcalloc(dev, resource_size(&pci->cfg.bus_range),
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sizeof(*pci->cfg.win), GFP_KERNEL);
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if (!pci->cfg.win)
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return -ENOMEM;
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/* Limit the bus-range to fit within reg */
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bus_max = pci->cfg.bus_range.start +
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(resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
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pci->cfg.bus_range.end = min_t(resource_size_t, pci->cfg.bus_range.end,
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bus_max);
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/* Map our Configuration Space windows */
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if (!devm_request_mem_region(dev, pci->cfg.res.start,
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resource_size(&pci->cfg.res),
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"Configuration Space"))
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return -ENOMEM;
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bus_range = &pci->cfg.bus_range;
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for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
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u32 idx = busn - bus_range->start;
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u32 sz = 1 << pci->cfg.ops->bus_shift;
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pci->cfg.win[idx] = devm_ioremap(dev,
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pci->cfg.res.start + busn * sz,
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sz);
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if (!pci->cfg.win[idx])
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return -ENOMEM;
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}
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/* Register bus resource */
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pci_add_resource(&pci->resources, bus_range);
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return 0;
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}
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static int gen_pci_setup(int nr, struct pci_sys_data *sys)
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{
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struct gen_pci *pci = sys->private_data;
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list_splice_init(&pci->resources, &sys->resources);
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return 1;
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}
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static int gen_pci_probe(struct platform_device *pdev)
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{
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int err;
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const char *type;
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const struct of_device_id *of_id;
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const int *prop;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
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struct hw_pci hw = {
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.nr_controllers = 1,
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.private_data = (void **)&pci,
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.setup = gen_pci_setup,
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.map_irq = of_irq_parse_and_map_pci,
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.ops = &gen_pci_ops,
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};
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if (!pci)
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return -ENOMEM;
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type = of_get_property(np, "device_type", NULL);
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if (!type || strcmp(type, "pci")) {
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dev_err(dev, "invalid \"device_type\" %s\n", type);
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return -EINVAL;
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}
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prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL);
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if (prop) {
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if (*prop)
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pci_add_flags(PCI_PROBE_ONLY);
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else
|
||||
pci_clear_flags(PCI_PROBE_ONLY);
|
||||
}
|
||||
|
||||
of_id = of_match_node(gen_pci_of_match, np);
|
||||
pci->cfg.ops = of_id->data;
|
||||
pci->host.dev.parent = dev;
|
||||
INIT_LIST_HEAD(&pci->host.windows);
|
||||
INIT_LIST_HEAD(&pci->resources);
|
||||
|
||||
/* Parse our PCI ranges and request their resources */
|
||||
err = gen_pci_parse_request_of_pci_ranges(pci);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Parse and map our Configuration Space windows */
|
||||
err = gen_pci_parse_map_cfg_windows(pci);
|
||||
if (err) {
|
||||
gen_pci_release_of_pci_ranges(pci);
|
||||
return err;
|
||||
}
|
||||
|
||||
pci_common_init_dev(dev, &hw);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver gen_pci_driver = {
|
||||
.driver = {
|
||||
.name = "pci-host-generic",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = gen_pci_of_match,
|
||||
},
|
||||
.probe = gen_pci_probe,
|
||||
};
|
||||
module_platform_driver(gen_pci_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Generic PCI host driver");
|
||||
MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
|
||||
MODULE_LICENSE("GPLv2");
|
||||
Loading…
Reference in New Issue