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drm/radeon: handle broken disabled rb mask gracefully 

If the disabled rb mask register is not properly initialized
program a sane default based on the number of RBs for the
asic.  This avoids a potential divide by 0 when calculating
the backend mask.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Alex Deucher 2013-04-09 10:13:22 -04:00
parent 55b615aec6
commit cedb655a3a
2 changed files with 16 additions and 0 deletions
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8
drivers/gpu/drm/radeon/evergreen.c
View File

@ -2261,6 +2261,14 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
}
/* enabled rb are just the one not disabled :) */
disabled_rb_mask = tmp;
tmp = 0;
for (i = 0; i < rdev->config.evergreen.max_backends; i++)
tmp |= (1 << i);
/* if all the backends are disabled, fix it up here */
if ((disabled_rb_mask & tmp) == tmp) {
for (i = 0; i < rdev->config.evergreen.max_backends; i++)
disabled_rb_mask &= ~(1 << i);
}
WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);
WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

8
drivers/gpu/drm/radeon/ni.c
View File

@ -615,6 +615,14 @@ static void cayman_gpu_init(struct radeon_device *rdev)
}
/* enabled rb are just the one not disabled :) */
disabled_rb_mask = tmp;
tmp = 0;
for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines); i++)
tmp |= (1 << i);
/* if all the backends are disabled, fix it up here */
if ((disabled_rb_mask & tmp) == tmp) {
for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines); i++)
disabled_rb_mask &= ~(1 << i);
}
WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);
WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);