Merge branch 'pci/resource'
- Clear only bridge windows (not BARs) while assigning bus resources (Logan Gunthorpe) - Improve resource assignment for deep hotplug hierarchies, e.g., Thunderbolt (Nicholas Johnson) * pci/resource: PCI: Allow adjust_bridge_window() to shrink resource if necessary PCI: Set resource size directly in adjust_bridge_window() PCI: Rename extend_bridge_window() to adjust_bridge_window() PCI: Rename extend_bridge_window() parameter PCI: Consider alignment of hot-added bridges when assigning resources PCI: Remove local variable usage in pci_bus_distribute_available_resources() PCI: Pass size + alignment to pci_bus_distribute_available_resources() PCI: Rename variables PCI: Remove unnecessary braces PCI: Don't disable bridge BARs when assigning bus resources
This commit is contained in:
commit
cee538f6a2
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@ -1803,12 +1803,18 @@ again:
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/* Restore size and flags */
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list_for_each_entry(fail_res, &fail_head, list) {
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struct resource *res = fail_res->res;
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int idx;
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res->start = fail_res->start;
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res->end = fail_res->end;
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res->flags = fail_res->flags;
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if (fail_res->dev->subordinate)
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res->flags = 0;
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if (pci_is_bridge(fail_res->dev)) {
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idx = res - &fail_res->dev->resource[0];
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if (idx >= PCI_BRIDGE_RESOURCES &&
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idx <= PCI_BRIDGE_RESOURCE_END)
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res->flags = 0;
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}
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}
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free_list(&fail_head);
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@ -1832,56 +1838,72 @@ void __init pci_assign_unassigned_resources(void)
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}
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}
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static void extend_bridge_window(struct pci_dev *bridge, struct resource *res,
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static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res,
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struct list_head *add_list,
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resource_size_t available)
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resource_size_t new_size)
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{
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struct pci_dev_resource *dev_res;
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resource_size_t add_size, size = resource_size(res);
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if (res->parent)
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return;
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if (resource_size(res) >= available)
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if (!new_size)
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return;
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dev_res = res_to_dev_res(add_list, res);
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if (!dev_res)
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return;
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if (new_size > size) {
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add_size = new_size - size;
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pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,
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&add_size);
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} else if (new_size < size) {
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add_size = size - new_size;
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pci_dbg(bridge, "bridge window %pR shrunken by %pa\n", res,
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&add_size);
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}
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/* Is there room to extend the window? */
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if (available - resource_size(res) <= dev_res->add_size)
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return;
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dev_res->add_size = available - resource_size(res);
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pci_dbg(bridge, "bridge window %pR extended by %pa\n", res,
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&dev_res->add_size);
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res->end = res->start + new_size - 1;
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remove_from_list(add_list, res);
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}
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static void pci_bus_distribute_available_resources(struct pci_bus *bus,
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struct list_head *add_list,
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resource_size_t available_io,
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resource_size_t available_mmio,
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resource_size_t available_mmio_pref)
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struct resource io,
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struct resource mmio,
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struct resource mmio_pref)
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{
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resource_size_t remaining_io, remaining_mmio, remaining_mmio_pref;
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unsigned int normal_bridges = 0, hotplug_bridges = 0;
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struct resource *io_res, *mmio_res, *mmio_pref_res;
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struct pci_dev *dev, *bridge = bus->self;
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resource_size_t io_per_hp, mmio_per_hp, mmio_pref_per_hp, align;
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io_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
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mmio_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
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mmio_pref_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
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/*
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* Update additional resource list (add_list) to fill all the
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* extra resource space available for this port except the space
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* calculated in __pci_bus_size_bridges() which covers all the
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* devices currently connected to the port and below.
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* The alignment of this bridge is yet to be considered, hence it must
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* be done now before extending its bridge window.
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*/
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extend_bridge_window(bridge, io_res, add_list, available_io);
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extend_bridge_window(bridge, mmio_res, add_list, available_mmio);
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extend_bridge_window(bridge, mmio_pref_res, add_list,
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available_mmio_pref);
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align = pci_resource_alignment(bridge, io_res);
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if (!io_res->parent && align)
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io.start = min(ALIGN(io.start, align), io.end + 1);
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align = pci_resource_alignment(bridge, mmio_res);
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if (!mmio_res->parent && align)
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mmio.start = min(ALIGN(mmio.start, align), mmio.end + 1);
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align = pci_resource_alignment(bridge, mmio_pref_res);
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if (!mmio_pref_res->parent && align)
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mmio_pref.start = min(ALIGN(mmio_pref.start, align),
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mmio_pref.end + 1);
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/*
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* Now that we have adjusted for alignment, update the bridge window
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* resources to fill as much remaining resource space as possible.
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*/
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adjust_bridge_window(bridge, io_res, add_list, resource_size(&io));
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adjust_bridge_window(bridge, mmio_res, add_list, resource_size(&mmio));
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adjust_bridge_window(bridge, mmio_pref_res, add_list,
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resource_size(&mmio_pref));
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/*
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* Calculate how many hotplug bridges and normal bridges there
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@ -1902,11 +1924,9 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus,
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*/
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if (hotplug_bridges + normal_bridges == 1) {
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dev = list_first_entry(&bus->devices, struct pci_dev, bus_list);
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if (dev->subordinate) {
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if (dev->subordinate)
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pci_bus_distribute_available_resources(dev->subordinate,
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add_list, available_io, available_mmio,
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available_mmio_pref);
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}
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add_list, io, mmio, mmio_pref);
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return;
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}
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@ -1919,12 +1939,9 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus,
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* extra space reduced by the minimal required space for the
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* non-hotplug bridges.
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*/
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remaining_io = available_io;
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remaining_mmio = available_mmio;
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remaining_mmio_pref = available_mmio_pref;
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for_each_pci_bridge(dev, bus) {
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const struct resource *res;
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resource_size_t used_size;
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struct resource *res;
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if (dev->is_hotplug_bridge)
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continue;
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@ -1934,24 +1951,39 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus,
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* bridge and devices below it occupy.
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*/
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res = &dev->resource[PCI_BRIDGE_RESOURCES + 0];
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if (!res->parent && available_io > resource_size(res))
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remaining_io -= resource_size(res);
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align = pci_resource_alignment(dev, res);
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align = align ? ALIGN(io.start, align) - io.start : 0;
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used_size = align + resource_size(res);
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if (!res->parent)
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io.start = min(io.start + used_size, io.end + 1);
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res = &dev->resource[PCI_BRIDGE_RESOURCES + 1];
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if (!res->parent && available_mmio > resource_size(res))
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remaining_mmio -= resource_size(res);
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align = pci_resource_alignment(dev, res);
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align = align ? ALIGN(mmio.start, align) - mmio.start : 0;
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used_size = align + resource_size(res);
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if (!res->parent)
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mmio.start = min(mmio.start + used_size, mmio.end + 1);
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res = &dev->resource[PCI_BRIDGE_RESOURCES + 2];
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if (!res->parent && available_mmio_pref > resource_size(res))
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remaining_mmio_pref -= resource_size(res);
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align = pci_resource_alignment(dev, res);
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align = align ? ALIGN(mmio_pref.start, align) -
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mmio_pref.start : 0;
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used_size = align + resource_size(res);
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if (!res->parent)
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mmio_pref.start = min(mmio_pref.start + used_size,
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mmio_pref.end + 1);
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}
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io_per_hp = div64_ul(resource_size(&io), hotplug_bridges);
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mmio_per_hp = div64_ul(resource_size(&mmio), hotplug_bridges);
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mmio_pref_per_hp = div64_ul(resource_size(&mmio_pref),
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hotplug_bridges);
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/*
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* Go over devices on this bus and distribute the remaining
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* resource space between hotplug bridges.
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*/
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for_each_pci_bridge(dev, bus) {
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resource_size_t align, io, mmio, mmio_pref;
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struct pci_bus *b;
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b = dev->subordinate;
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* hotplug-capable downstream ports taking alignment into
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* account.
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*/
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align = pci_resource_alignment(bridge, io_res);
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io = div64_ul(available_io, hotplug_bridges);
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io = min(ALIGN(io, align), remaining_io);
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remaining_io -= io;
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align = pci_resource_alignment(bridge, mmio_res);
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mmio = div64_ul(available_mmio, hotplug_bridges);
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mmio = min(ALIGN(mmio, align), remaining_mmio);
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remaining_mmio -= mmio;
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align = pci_resource_alignment(bridge, mmio_pref_res);
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mmio_pref = div64_ul(available_mmio_pref, hotplug_bridges);
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mmio_pref = min(ALIGN(mmio_pref, align), remaining_mmio_pref);
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remaining_mmio_pref -= mmio_pref;
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io.end = io.start + io_per_hp - 1;
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mmio.end = mmio.start + mmio_per_hp - 1;
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mmio_pref.end = mmio_pref.start + mmio_pref_per_hp - 1;
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pci_bus_distribute_available_resources(b, add_list, io, mmio,
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mmio_pref);
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io.start += io_per_hp;
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mmio.start += mmio_per_hp;
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mmio_pref.start += mmio_pref_per_hp;
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}
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}
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static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
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struct list_head *add_list)
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{
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resource_size_t available_io, available_mmio, available_mmio_pref;
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const struct resource *res;
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struct resource available_io, available_mmio, available_mmio_pref;
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if (!bridge->is_hotplug_bridge)
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return;
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/* Take the initial extra resources from the hotplug port */
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res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0];
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available_io = resource_size(res);
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res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1];
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available_mmio = resource_size(res);
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res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2];
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available_mmio_pref = resource_size(res);
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available_io = bridge->resource[PCI_BRIDGE_RESOURCES + 0];
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available_mmio = bridge->resource[PCI_BRIDGE_RESOURCES + 1];
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available_mmio_pref = bridge->resource[PCI_BRIDGE_RESOURCES + 2];
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pci_bus_distribute_available_resources(bridge->subordinate,
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add_list, available_io,
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@ -2055,12 +2076,18 @@ again:
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/* Restore size and flags */
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list_for_each_entry(fail_res, &fail_head, list) {
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struct resource *res = fail_res->res;
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int idx;
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res->start = fail_res->start;
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res->end = fail_res->end;
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res->flags = fail_res->flags;
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if (fail_res->dev->subordinate)
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res->flags = 0;
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if (pci_is_bridge(fail_res->dev)) {
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idx = res - &fail_res->dev->resource[0];
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if (idx >= PCI_BRIDGE_RESOURCES &&
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idx <= PCI_BRIDGE_RESOURCE_END)
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res->flags = 0;
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}
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}
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free_list(&fail_head);
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