drm/i915: Fix comments about CHV snoop behaviour
Replace the misinformed notes about CHV snoop behaviour with something that's hopefully closer to reality. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1942,9 +1942,17 @@ static void chv_setup_private_ppat(struct drm_i915_private *dev_priv)
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* Only the snoop bit has meaning for CHV, the rest is
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* ignored.
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*
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* Note that the harware enforces snooping for all page
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* table accesses. The snoop bit is actually ignored for
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* PDEs.
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* The hardware will never snoop for certain types of accesses:
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* - CPU GTT (GMADR->GGTT->no snoop->memory)
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* - PPGTT page tables
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* - some other special cycles
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*
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* As with BDW, we also need to consider the following for GT accesses:
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* "For GGTT, there is NO pat_sel[2:0] from the entry,
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* so RTL will always use the value corresponding to
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* pat_sel = 000".
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* Which means we must set the snoop bit in PAT entry 0
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* in order to keep the global status page working.
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*/
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pat = GEN8_PPAT(0, CHV_PPAT_SNOOP) |
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GEN8_PPAT(1, 0) |
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