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ARM: dts: aspeed-g5: Sort LPC child nodes by unit address 

Lets try to maintain some sort of sanity.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
alistair/sensors
Andrew Jeffery 2019-12-03 22:34:13 +10:30 committed by Joel Stanley
parent e3f0cf4fb8
commit cf4aae1a05
1 changed files with 6 additions and 5 deletions
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11
arch/arm/boot/dts/aspeed-g5.dtsi
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@ -474,17 +474,18 @@
status = "disabled";
};
lhc: lhc@20 {
compatible = "aspeed,ast2500-lhc";
reg = <0x20 0x24 0x48 0x8>;
};
lpc_reset: reset-controller@18 {
compatible = "aspeed,ast2500-lpc-reset";
reg = <0x18 0x4>;
#reset-cells = <1>;
};
lhc: lhc@20 {
compatible = "aspeed,ast2500-lhc";
reg = <0x20 0x24 0x48 0x8>;
};
ibt: ibt@c0 {
compatible = "aspeed,ast2500-ibt-bmc";
reg = <0xc0 0x18>;