KVM: SVM: Add VMEXIT handler and intercepts
This adds the #VMEXIT intercept, so we return to the level 1 guest when something happens in the level 2 guest that should return to the level 1 guest. v2 implements HIF handling and cleans up exception interception v3 adds support for V_INTR_MASKING_MASK v4 uses the host page hsave v5 removes IOPM merging code v6 moves mmu code out of the atomic section Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>hifive-unleashed-5.1
Alexander Graf
Avi Kivity
parent
3d6368ef58
commit
cf74a78b22
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@ -72,6 +72,13 @@ module_param(npt, int, S_IRUGO);
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static void kvm_reput_irq(struct vcpu_svm *svm);
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static void svm_flush_tlb(struct kvm_vcpu *vcpu);
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static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override);
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static int nested_svm_vmexit(struct vcpu_svm *svm);
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static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
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void *arg2, void *opaque);
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static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
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bool has_error_code, u32 error_code);
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static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
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{
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return container_of(vcpu, struct vcpu_svm, vcpu);
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@ -221,6 +228,11 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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/* If we are within a nested VM we'd better #VMEXIT and let the
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guest handle the exception */
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if (nested_svm_check_exception(svm, nr, has_error_code, error_code))
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return;
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svm->vmcb->control.event_inj = nr
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| SVM_EVTINJ_VALID
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| (has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
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@ -1198,6 +1210,46 @@ static int nested_svm_check_permissions(struct vcpu_svm *svm)
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return 0;
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}
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static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
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bool has_error_code, u32 error_code)
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{
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if (is_nested(svm)) {
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svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
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svm->vmcb->control.exit_code_hi = 0;
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svm->vmcb->control.exit_info_1 = error_code;
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
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if (nested_svm_exit_handled(svm, false)) {
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nsvm_printk("VMexit -> EXCP 0x%x\n", nr);
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nested_svm_vmexit(svm);
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return 1;
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}
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}
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return 0;
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}
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static inline int nested_svm_intr(struct vcpu_svm *svm)
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{
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if (is_nested(svm)) {
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if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
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return 0;
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if (!(svm->vcpu.arch.hflags & HF_HIF_MASK))
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return 0;
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svm->vmcb->control.exit_code = SVM_EXIT_INTR;
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if (nested_svm_exit_handled(svm, false)) {
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nsvm_printk("VMexit -> INTR\n");
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nested_svm_vmexit(svm);
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return 1;
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}
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}
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return 0;
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}
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static struct page *nested_svm_get_page(struct vcpu_svm *svm, u64 gpa)
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{
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struct page *page;
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@ -1258,6 +1310,228 @@ static int nested_svm_do(struct vcpu_svm *svm,
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return retval;
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}
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static int nested_svm_exit_handled_real(struct vcpu_svm *svm,
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void *arg1,
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void *arg2,
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void *opaque)
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{
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struct vmcb *nested_vmcb = (struct vmcb *)arg1;
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bool kvm_overrides = *(bool *)opaque;
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u32 exit_code = svm->vmcb->control.exit_code;
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if (kvm_overrides) {
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switch (exit_code) {
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case SVM_EXIT_INTR:
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case SVM_EXIT_NMI:
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return 0;
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/* For now we are always handling NPFs when using them */
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case SVM_EXIT_NPF:
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if (npt_enabled)
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return 0;
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break;
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/* When we're shadowing, trap PFs */
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case SVM_EXIT_EXCP_BASE + PF_VECTOR:
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if (!npt_enabled)
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return 0;
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break;
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default:
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break;
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}
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}
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switch (exit_code) {
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case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR8: {
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u32 cr_bits = 1 << (exit_code - SVM_EXIT_READ_CR0);
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if (nested_vmcb->control.intercept_cr_read & cr_bits)
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return 1;
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break;
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}
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case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR8: {
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u32 cr_bits = 1 << (exit_code - SVM_EXIT_WRITE_CR0);
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if (nested_vmcb->control.intercept_cr_write & cr_bits)
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return 1;
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break;
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}
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case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR7: {
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u32 dr_bits = 1 << (exit_code - SVM_EXIT_READ_DR0);
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if (nested_vmcb->control.intercept_dr_read & dr_bits)
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return 1;
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break;
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}
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case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR7: {
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u32 dr_bits = 1 << (exit_code - SVM_EXIT_WRITE_DR0);
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if (nested_vmcb->control.intercept_dr_write & dr_bits)
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return 1;
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break;
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}
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case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
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u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
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if (nested_vmcb->control.intercept_exceptions & excp_bits)
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return 1;
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break;
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}
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default: {
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u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR);
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nsvm_printk("exit code: 0x%x\n", exit_code);
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if (nested_vmcb->control.intercept & exit_bits)
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return 1;
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}
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}
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return 0;
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}
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static int nested_svm_exit_handled_msr(struct vcpu_svm *svm,
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void *arg1, void *arg2,
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void *opaque)
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{
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struct vmcb *nested_vmcb = (struct vmcb *)arg1;
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u8 *msrpm = (u8 *)arg2;
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u32 t0, t1;
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u32 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];
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u32 param = svm->vmcb->control.exit_info_1 & 1;
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if (!(nested_vmcb->control.intercept & (1ULL << INTERCEPT_MSR_PROT)))
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return 0;
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switch(msr) {
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case 0 ... 0x1fff:
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t0 = (msr * 2) % 8;
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t1 = msr / 8;
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break;
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case 0xc0000000 ... 0xc0001fff:
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t0 = (8192 + msr - 0xc0000000) * 2;
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t1 = (t0 / 8);
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t0 %= 8;
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break;
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case 0xc0010000 ... 0xc0011fff:
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t0 = (16384 + msr - 0xc0010000) * 2;
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t1 = (t0 / 8);
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t0 %= 8;
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break;
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default:
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return 1;
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break;
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}
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if (msrpm[t1] & ((1 << param) << t0))
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return 1;
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return 0;
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}
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static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override)
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{
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bool k = kvm_override;
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switch (svm->vmcb->control.exit_code) {
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case SVM_EXIT_MSR:
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return nested_svm_do(svm, svm->nested_vmcb,
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svm->nested_vmcb_msrpm, NULL,
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nested_svm_exit_handled_msr);
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default: break;
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}
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return nested_svm_do(svm, svm->nested_vmcb, 0, &k,
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nested_svm_exit_handled_real);
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}
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static int nested_svm_vmexit_real(struct vcpu_svm *svm, void *arg1,
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void *arg2, void *opaque)
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{
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struct vmcb *nested_vmcb = (struct vmcb *)arg1;
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struct vmcb *hsave = svm->hsave;
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u64 nested_save[] = { nested_vmcb->save.cr0,
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nested_vmcb->save.cr3,
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nested_vmcb->save.cr4,
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nested_vmcb->save.efer,
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nested_vmcb->control.intercept_cr_read,
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nested_vmcb->control.intercept_cr_write,
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nested_vmcb->control.intercept_dr_read,
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nested_vmcb->control.intercept_dr_write,
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nested_vmcb->control.intercept_exceptions,
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nested_vmcb->control.intercept,
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nested_vmcb->control.msrpm_base_pa,
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nested_vmcb->control.iopm_base_pa,
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nested_vmcb->control.tsc_offset };
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/* Give the current vmcb to the guest */
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memcpy(nested_vmcb, svm->vmcb, sizeof(struct vmcb));
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nested_vmcb->save.cr0 = nested_save[0];
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if (!npt_enabled)
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nested_vmcb->save.cr3 = nested_save[1];
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nested_vmcb->save.cr4 = nested_save[2];
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nested_vmcb->save.efer = nested_save[3];
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nested_vmcb->control.intercept_cr_read = nested_save[4];
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nested_vmcb->control.intercept_cr_write = nested_save[5];
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nested_vmcb->control.intercept_dr_read = nested_save[6];
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nested_vmcb->control.intercept_dr_write = nested_save[7];
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nested_vmcb->control.intercept_exceptions = nested_save[8];
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nested_vmcb->control.intercept = nested_save[9];
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nested_vmcb->control.msrpm_base_pa = nested_save[10];
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nested_vmcb->control.iopm_base_pa = nested_save[11];
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nested_vmcb->control.tsc_offset = nested_save[12];
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/* We always set V_INTR_MASKING and remember the old value in hflags */
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if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
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nested_vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK;
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if ((nested_vmcb->control.int_ctl & V_IRQ_MASK) &&
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(nested_vmcb->control.int_vector)) {
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nsvm_printk("WARNING: IRQ 0x%x still enabled on #VMEXIT\n",
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nested_vmcb->control.int_vector);
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}
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/* Restore the original control entries */
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svm->vmcb->control = hsave->control;
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/* Kill any pending exceptions */
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if (svm->vcpu.arch.exception.pending == true)
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nsvm_printk("WARNING: Pending Exception\n");
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svm->vcpu.arch.exception.pending = false;
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/* Restore selected save entries */
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svm->vmcb->save.es = hsave->save.es;
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svm->vmcb->save.cs = hsave->save.cs;
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svm->vmcb->save.ss = hsave->save.ss;
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svm->vmcb->save.ds = hsave->save.ds;
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svm->vmcb->save.gdtr = hsave->save.gdtr;
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svm->vmcb->save.idtr = hsave->save.idtr;
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svm->vmcb->save.rflags = hsave->save.rflags;
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svm_set_efer(&svm->vcpu, hsave->save.efer);
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svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE);
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svm_set_cr4(&svm->vcpu, hsave->save.cr4);
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if (npt_enabled) {
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svm->vmcb->save.cr3 = hsave->save.cr3;
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svm->vcpu.arch.cr3 = hsave->save.cr3;
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} else {
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kvm_set_cr3(&svm->vcpu, hsave->save.cr3);
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}
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kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, hsave->save.rax);
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kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, hsave->save.rsp);
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kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, hsave->save.rip);
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svm->vmcb->save.dr7 = 0;
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svm->vmcb->save.cpl = 0;
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svm->vmcb->control.exit_int_info = 0;
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svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
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/* Exit nested SVM mode */
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svm->nested_vmcb = 0;
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return 0;
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}
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static int nested_svm_vmexit(struct vcpu_svm *svm)
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{
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nsvm_printk("VMexit\n");
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if (nested_svm_do(svm, svm->nested_vmcb, 0,
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NULL, nested_svm_vmexit_real))
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return 1;
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kvm_mmu_reset_context(&svm->vcpu);
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kvm_mmu_load(&svm->vcpu);
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return 0;
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}
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static int nested_svm_vmrun_msrpm(struct vcpu_svm *svm, void *arg1,
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void *arg2, void *opaque)
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@ -1805,6 +2079,17 @@ static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
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KVMTRACE_3D(VMEXIT, vcpu, exit_code, (u32)svm->vmcb->save.rip,
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(u32)((u64)svm->vmcb->save.rip >> 32), entryexit);
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if (is_nested(svm)) {
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nsvm_printk("nested handle_exit: 0x%x | 0x%lx | 0x%lx | 0x%lx\n",
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exit_code, svm->vmcb->control.exit_info_1,
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svm->vmcb->control.exit_info_2, svm->vmcb->save.rip);
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if (nested_svm_exit_handled(svm, true)) {
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nested_svm_vmexit(svm);
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nsvm_printk("-> #VMEXIT\n");
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return 1;
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}
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}
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if (npt_enabled) {
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int mmu_reload = 0;
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if ((vcpu->arch.cr0 ^ svm->vmcb->save.cr0) & X86_CR0_PG) {
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@ -1892,6 +2177,8 @@ static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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nested_svm_intr(svm);
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svm_inject_irq(svm, irq);
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}
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@ -1937,6 +2224,9 @@ static void svm_intr_assist(struct kvm_vcpu *vcpu)
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if (!kvm_cpu_has_interrupt(vcpu))
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goto out;
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if (nested_svm_intr(svm))
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goto out;
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if (!(svm->vcpu.arch.hflags & HF_GIF_MASK))
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goto out;
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@ -1989,6 +2279,9 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
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struct vcpu_svm *svm = to_svm(vcpu);
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struct vmcb_control_area *control = &svm->vmcb->control;
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if (nested_svm_intr(svm))
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return;
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svm->vcpu.arch.interrupt_window_open =
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(!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
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(svm->vmcb->save.rflags & X86_EFLAGS_IF) &&
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