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DMA: AT91: Get transfer width 

In one dma transfer, the data transfer width can be configured and it is limited by source or destination peripheral width,
tx_width will save the transfer width, but for memcpy, either source or destination transfer width is taken as tx_width.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
hifive-unleashed-5.1
Elen Song 2013-05-10 11:00:50 +08:00 committed by Vinod Koul
parent 6c22770f64
commit d088c33b64
2 changed files with 5 additions and 0 deletions
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3
drivers/dma/at_hdmac.c
View File

@ -615,6 +615,7 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
/* First descriptor of the chain embedds additional information */ /* First descriptor of the chain embedds additional information */
first->txd.cookie = -EBUSY; first->txd.cookie = -EBUSY;
first->len = len; first->len = len;
first->tx_width = src_width;
/* set end-of-link to the last link descriptor of list*/ /* set end-of-link to the last link descriptor of list*/
set_desc_eol(desc); set_desc_eol(desc);
@ -761,6 +762,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
/* First descriptor of the chain embedds additional information */ /* First descriptor of the chain embedds additional information */
first->txd.cookie = -EBUSY; first->txd.cookie = -EBUSY;
first->len = total_len; first->len = total_len;
first->tx_width = reg_width;
/* first link descriptor of list is responsible of flags */ /* first link descriptor of list is responsible of flags */
first->txd.flags = flags; /* client is in control of this ack */ first->txd.flags = flags; /* client is in control of this ack */
@ -919,6 +921,7 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
/* First descriptor of the chain embedds additional information */ /* First descriptor of the chain embedds additional information */
first->txd.cookie = -EBUSY; first->txd.cookie = -EBUSY;
first->len = buf_len; first->len = buf_len;
first->tx_width = reg_width;
return &first->txd; return &first->txd;

2
drivers/dma/at_hdmac_regs.h
View File

@ -182,6 +182,7 @@ struct at_lli {
* @txd: support for the async_tx api * @txd: support for the async_tx api
* @desc_node: node on the channed descriptors list * @desc_node: node on the channed descriptors list
* @len: total transaction bytecount * @len: total transaction bytecount
* @tx_width: transfer width
*/ */
struct at_desc { struct at_desc {
/* FIRST values the hardware uses */ /* FIRST values the hardware uses */
@ -192,6 +193,7 @@ struct at_desc {
struct dma_async_tx_descriptor txd; struct dma_async_tx_descriptor txd;
struct list_head desc_node; struct list_head desc_node;
size_t len; size_t len;
u32 tx_width;
}; };
static inline struct at_desc * static inline struct at_desc *