ASoC: SOF: Add DSP HW abstraction operations
Add operation pointers that can be called by core to control a wide variety of DSP targets. The DSP HW drivers will fill in these operations. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org>hifive-unleashed-5.2
Liam Girdwood
Mark Brown
parent
fd51c47b35
commit
d1d95fcb63
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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//
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#include <linux/pci.h>
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#include "ops.h"
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static
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bool snd_sof_pci_update_bits_unlocked(struct snd_sof_dev *sdev, u32 offset,
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u32 mask, u32 value)
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{
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struct pci_dev *pci = to_pci_dev(sdev->dev);
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unsigned int old, new;
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u32 ret;
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pci_read_config_dword(pci, offset, &ret);
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old = ret;
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dev_dbg(sdev->dev, "Debug PCIR: %8.8x at %8.8x\n", old & mask, offset);
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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pci_write_config_dword(pci, offset, new);
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dev_dbg(sdev->dev, "Debug PCIW: %8.8x at %8.8x\n", value,
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offset);
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return true;
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}
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bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset,
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u32 mask, u32 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_pci_update_bits_unlocked(sdev, offset, mask, value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_pci_update_bits);
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bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned int old, new;
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u32 ret;
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ret = snd_sof_dsp_read(sdev, bar, offset);
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old = ret;
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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snd_sof_dsp_write(sdev, bar, offset, new);
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return true;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits_unlocked);
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bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u64 mask, u64 value)
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{
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u64 old, new;
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old = snd_sof_dsp_read64(sdev, bar, offset);
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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snd_sof_dsp_write64(sdev, bar, offset, new);
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return true;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits64_unlocked);
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/* This is for registers bits with attribute RWC */
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bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset,
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u32 mask, u32 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_dsp_update_bits_unlocked(sdev, bar, offset, mask,
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value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits);
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bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar, u32 offset,
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u64 mask, u64 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_dsp_update_bits64_unlocked(sdev, bar, offset, mask,
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value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits64);
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static
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void snd_sof_dsp_update_bits_forced_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned int old, new;
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u32 ret;
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ret = snd_sof_dsp_read(sdev, bar, offset);
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old = ret;
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new = (old & ~mask) | (value & mask);
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snd_sof_dsp_write(sdev, bar, offset, new);
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}
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/* This is for registers bits with attribute RWC */
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void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned long flags;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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snd_sof_dsp_update_bits_forced_unlocked(sdev, bar, offset, mask, value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits_forced);
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void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset)
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{
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dev_err(sdev->dev, "error : DSP panic!\n");
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/*
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* check if DSP is not ready and did not set the dsp_oops_offset.
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* if the dsp_oops_offset is not set, set it from the panic message.
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* Also add a check to memory window setting with panic message.
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*/
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if (!sdev->dsp_oops_offset)
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sdev->dsp_oops_offset = offset;
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else
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dev_dbg(sdev->dev, "panic: dsp_oops_offset %zu offset %d\n",
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sdev->dsp_oops_offset, offset);
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snd_sof_dsp_dbg_dump(sdev, SOF_DBG_REGS | SOF_DBG_MBOX);
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snd_sof_trace_notify_for_error(sdev);
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}
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EXPORT_SYMBOL(snd_sof_dsp_panic);
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@ -0,0 +1,399 @@
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/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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*/
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#ifndef __SOUND_SOC_SOF_IO_H
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#define __SOUND_SOC_SOF_IO_H
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <sound/pcm.h>
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#include "sof-priv.h"
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#define sof_ops(sdev) \
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((sdev)->pdata->desc->ops)
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/* Mandatory operations are verified during probing */
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/* init */
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static inline int snd_sof_probe(struct snd_sof_dev *sdev)
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{
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return sof_ops(sdev)->probe(sdev);
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}
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static inline int snd_sof_remove(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->remove)
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return sof_ops(sdev)->remove(sdev);
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return 0;
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}
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/* control */
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/*
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* snd_sof_dsp_run returns the core mask of the cores that are available
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* after successful fw boot
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*/
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static inline int snd_sof_dsp_run(struct snd_sof_dev *sdev)
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{
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return sof_ops(sdev)->run(sdev);
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}
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static inline int snd_sof_dsp_stall(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->stall)
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return sof_ops(sdev)->stall(sdev);
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return 0;
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}
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static inline int snd_sof_dsp_reset(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->reset)
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return sof_ops(sdev)->reset(sdev);
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return 0;
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}
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/* dsp core power up/power down */
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static inline int snd_sof_dsp_core_power_up(struct snd_sof_dev *sdev,
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unsigned int core_mask)
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{
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if (sof_ops(sdev)->core_power_up)
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return sof_ops(sdev)->core_power_up(sdev, core_mask);
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return 0;
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}
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static inline int snd_sof_dsp_core_power_down(struct snd_sof_dev *sdev,
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unsigned int core_mask)
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{
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if (sof_ops(sdev)->core_power_down)
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return sof_ops(sdev)->core_power_down(sdev, core_mask);
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return 0;
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}
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/* pre/post fw load */
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static inline int snd_sof_dsp_pre_fw_run(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->pre_fw_run)
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return sof_ops(sdev)->pre_fw_run(sdev);
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return 0;
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}
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static inline int snd_sof_dsp_post_fw_run(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->post_fw_run)
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return sof_ops(sdev)->post_fw_run(sdev);
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return 0;
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}
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/* power management */
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static inline int snd_sof_dsp_resume(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->resume)
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return sof_ops(sdev)->resume(sdev);
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return 0;
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}
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static inline int snd_sof_dsp_suspend(struct snd_sof_dev *sdev, int state)
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{
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if (sof_ops(sdev)->suspend)
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return sof_ops(sdev)->suspend(sdev, state);
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return 0;
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}
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static inline int snd_sof_dsp_runtime_resume(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->runtime_resume)
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return sof_ops(sdev)->runtime_resume(sdev);
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return 0;
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}
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static inline int snd_sof_dsp_runtime_suspend(struct snd_sof_dev *sdev,
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int state)
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{
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if (sof_ops(sdev)->runtime_suspend)
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return sof_ops(sdev)->runtime_suspend(sdev, state);
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return 0;
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}
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static inline int snd_sof_dsp_set_clk(struct snd_sof_dev *sdev, u32 freq)
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{
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if (sof_ops(sdev)->set_clk)
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return sof_ops(sdev)->set_clk(sdev, freq);
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return 0;
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}
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/* debug */
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static inline void snd_sof_dsp_dbg_dump(struct snd_sof_dev *sdev, u32 flags)
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{
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if (sof_ops(sdev)->dbg_dump)
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return sof_ops(sdev)->dbg_dump(sdev, flags);
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}
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/* register IO */
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static inline void snd_sof_dsp_write(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 value)
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{
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if (sof_ops(sdev)->write) {
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sof_ops(sdev)->write(sdev, sdev->bar[bar] + offset, value);
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return;
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}
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dev_err_ratelimited(sdev->dev, "error: %s not defined\n", __func__);
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}
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static inline void snd_sof_dsp_write64(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u64 value)
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{
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if (sof_ops(sdev)->write64) {
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sof_ops(sdev)->write64(sdev, sdev->bar[bar] + offset, value);
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return;
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}
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dev_err_ratelimited(sdev->dev, "error: %s not defined\n", __func__);
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}
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static inline u32 snd_sof_dsp_read(struct snd_sof_dev *sdev, u32 bar,
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u32 offset)
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{
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if (sof_ops(sdev)->read)
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return sof_ops(sdev)->read(sdev, sdev->bar[bar] + offset);
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dev_err(sdev->dev, "error: %s not defined\n", __func__);
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return -ENOTSUPP;
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}
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static inline u64 snd_sof_dsp_read64(struct snd_sof_dev *sdev, u32 bar,
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u32 offset)
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{
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if (sof_ops(sdev)->read64)
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return sof_ops(sdev)->read64(sdev, sdev->bar[bar] + offset);
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dev_err(sdev->dev, "error: %s not defined\n", __func__);
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return -ENOTSUPP;
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}
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/* block IO */
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static inline void snd_sof_dsp_block_read(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, void *dest, size_t bytes)
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{
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sof_ops(sdev)->block_read(sdev, bar, offset, dest, bytes);
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}
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static inline void snd_sof_dsp_block_write(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, void *src, size_t bytes)
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{
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sof_ops(sdev)->block_write(sdev, bar, offset, src, bytes);
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}
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/* ipc */
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static inline int snd_sof_dsp_send_msg(struct snd_sof_dev *sdev,
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struct snd_sof_ipc_msg *msg)
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{
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return sof_ops(sdev)->send_msg(sdev, msg);
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}
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/* host DMA trace */
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static inline int snd_sof_dma_trace_init(struct snd_sof_dev *sdev,
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u32 *stream_tag)
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{
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if (sof_ops(sdev)->trace_init)
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return sof_ops(sdev)->trace_init(sdev, stream_tag);
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return 0;
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}
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static inline int snd_sof_dma_trace_release(struct snd_sof_dev *sdev)
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{
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if (sof_ops(sdev)->trace_release)
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return sof_ops(sdev)->trace_release(sdev);
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return 0;
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}
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static inline int snd_sof_dma_trace_trigger(struct snd_sof_dev *sdev, int cmd)
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{
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if (sof_ops(sdev)->trace_trigger)
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return sof_ops(sdev)->trace_trigger(sdev, cmd);
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return 0;
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}
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/* host PCM ops */
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static inline int
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snd_sof_pcm_platform_open(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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if (sof_ops(sdev) && sof_ops(sdev)->pcm_open)
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return sof_ops(sdev)->pcm_open(sdev, substream);
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return 0;
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}
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/* disconnect pcm substream to a host stream */
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static inline int
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snd_sof_pcm_platform_close(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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if (sof_ops(sdev) && sof_ops(sdev)->pcm_close)
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return sof_ops(sdev)->pcm_close(sdev, substream);
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return 0;
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}
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/* host stream hw params */
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static inline int
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snd_sof_pcm_platform_hw_params(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct sof_ipc_stream_params *ipc_params)
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{
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if (sof_ops(sdev) && sof_ops(sdev)->pcm_hw_params)
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return sof_ops(sdev)->pcm_hw_params(sdev, substream,
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params, ipc_params);
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return 0;
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}
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/* host stream trigger */
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static inline int
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snd_sof_pcm_platform_trigger(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream, int cmd)
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{
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if (sof_ops(sdev) && sof_ops(sdev)->pcm_trigger)
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return sof_ops(sdev)->pcm_trigger(sdev, substream, cmd);
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return 0;
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}
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/* host DSP message data */
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static inline void snd_sof_ipc_msg_data(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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void *p, size_t sz)
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{
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sof_ops(sdev)->ipc_msg_data(sdev, substream, p, sz);
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}
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/* host configure DSP HW parameters */
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static inline int
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snd_sof_ipc_pcm_params(struct snd_sof_dev *sdev,
|
||||
struct snd_pcm_substream *substream,
|
||||
const struct sof_ipc_pcm_params_reply *reply)
|
||||
{
|
||||
return sof_ops(sdev)->ipc_pcm_params(sdev, substream, reply);
|
||||
}
|
||||
|
||||
/* host stream pointer */
|
||||
static inline snd_pcm_uframes_t
|
||||
snd_sof_pcm_platform_pointer(struct snd_sof_dev *sdev,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
if (sof_ops(sdev) && sof_ops(sdev)->pcm_pointer)
|
||||
return sof_ops(sdev)->pcm_pointer(sdev, substream);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline const struct snd_sof_dsp_ops
|
||||
*sof_get_ops(const struct sof_dev_desc *d,
|
||||
const struct sof_ops_table mach_ops[], int asize)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < asize; i++) {
|
||||
if (d == mach_ops[i].desc)
|
||||
return mach_ops[i].ops;
|
||||
}
|
||||
|
||||
/* not found */
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* snd_sof_dsp_register_poll_timeout - Periodically poll an address
|
||||
* until a condition is met or a timeout occurs
|
||||
* @op: accessor function (takes @addr as its only argument)
|
||||
* @addr: Address to poll
|
||||
* @val: Variable to read the value into
|
||||
* @cond: Break condition (usually involving @val)
|
||||
* @sleep_us: Maximum time to sleep between reads in us (0
|
||||
* tight-loops). Should be less than ~20ms since usleep_range
|
||||
* is used (see Documentation/timers/timers-howto.txt).
|
||||
* @timeout_us: Timeout in us, 0 means never timeout
|
||||
*
|
||||
* Returns 0 on success and -ETIMEDOUT upon a timeout. In either
|
||||
* case, the last read value at @addr is stored in @val. Must not
|
||||
* be called from atomic context if sleep_us or timeout_us are used.
|
||||
*
|
||||
* This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
|
||||
*/
|
||||
#define snd_sof_dsp_read_poll_timeout(sdev, bar, offset, val, cond, sleep_us, timeout_us) \
|
||||
({ \
|
||||
u64 __timeout_us = (timeout_us); \
|
||||
unsigned long __sleep_us = (sleep_us); \
|
||||
ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
|
||||
might_sleep_if((__sleep_us) != 0); \
|
||||
for (;;) { \
|
||||
(val) = snd_sof_dsp_read(sdev, bar, offset); \
|
||||
if (cond) { \
|
||||
dev_dbg(sdev->dev, \
|
||||
"FW Poll Status: reg=%#x successful\n", (val)); \
|
||||
break; \
|
||||
} \
|
||||
if (__timeout_us && \
|
||||
ktime_compare(ktime_get(), __timeout) > 0) { \
|
||||
(val) = snd_sof_dsp_read(sdev, bar, offset); \
|
||||
dev_dbg(sdev->dev, \
|
||||
"FW Poll Status: reg=%#x timedout\n", (val)); \
|
||||
break; \
|
||||
} \
|
||||
if (__sleep_us) \
|
||||
usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
|
||||
} \
|
||||
(cond) ? 0 : -ETIMEDOUT; \
|
||||
})
|
||||
|
||||
/* This is for registers bits with attribute RWC */
|
||||
bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset,
|
||||
u32 mask, u32 value);
|
||||
|
||||
bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar,
|
||||
u32 offset, u32 mask, u32 value);
|
||||
|
||||
bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar,
|
||||
u32 offset, u64 mask, u64 value);
|
||||
|
||||
bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset,
|
||||
u32 mask, u32 value);
|
||||
|
||||
bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar,
|
||||
u32 offset, u64 mask, u64 value);
|
||||
|
||||
void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar,
|
||||
u32 offset, u32 mask, u32 value);
|
||||
|
||||
int snd_sof_dsp_register_poll(struct snd_sof_dev *sdev, u32 bar, u32 offset,
|
||||
u32 mask, u32 target, u32 timeout_ms,
|
||||
u32 interval_us);
|
||||
|
||||
void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset);
|
||||
#endif
|
||||
Loading…
Reference in New Issue