[PATCH] Indycam / VINO drivers
Rewrite of the Indycam / VINO video v4l2 drivers for the SGI Indy. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Mikael Nousiainen <tmnousia@cc.hut.fi> Cc: <video4linux-list@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Ralf Baechle
Linus Torvalds
parent
0bb6fcc13a
commit
d203a7eca8
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@ -29,7 +29,7 @@ obj-$(CONFIG_VIDEO_ZORAN_LML33R10) += saa7114.o adv7170.o zr36060.o
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obj-$(CONFIG_VIDEO_ZORAN) += zr36067.o videocodec.o
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obj-$(CONFIG_VIDEO_PMS) += pms.o
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obj-$(CONFIG_VIDEO_PLANB) += planb.o
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obj-$(CONFIG_VIDEO_VINO) += vino.o
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obj-$(CONFIG_VIDEO_VINO) += vino.o saa7191.o indycam.o
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obj-$(CONFIG_VIDEO_STRADIS) += stradis.o
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obj-$(CONFIG_VIDEO_CPIA) += cpia.o
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obj-$(CONFIG_VIDEO_CPIA_PP) += cpia_pp.o
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412
drivers/media/video/indycam.c
Normal file
412
drivers/media/video/indycam.c
Normal file
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@ -0,0 +1,412 @@
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/*
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* indycam.c - Silicon Graphics IndyCam digital camera driver
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*
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* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
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* Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/kernel.h>
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#include <linux/major.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/videodev.h>
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/* IndyCam decodes stream of photons into digital image representation ;-) */
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#include <linux/video_decoder.h>
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#include <linux/i2c.h>
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#include "indycam.h"
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//#define INDYCAM_DEBUG
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#define INDYCAM_MODULE_VERSION "0.0.3"
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MODULE_DESCRIPTION("SGI IndyCam driver");
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MODULE_VERSION(INDYCAM_MODULE_VERSION);
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MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
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MODULE_LICENSE("GPL");
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#ifdef INDYCAM_DEBUG
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#define dprintk(x...) printk("IndyCam: " x);
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#define indycam_regdump(client) indycam_regdump_debug(client)
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#else
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#define dprintk(x...)
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#define indycam_regdump(client)
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#endif
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#define VINO_ADAPTER (I2C_ALGO_SGI | I2C_HW_SGI_VINO)
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struct indycam {
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struct i2c_client *client;
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int version;
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};
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static struct i2c_driver i2c_driver_indycam;
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static const unsigned char initseq[] = {
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INDYCAM_CONTROL_AGCENA, /* INDYCAM_CONTROL */
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INDYCAM_SHUTTER_DEFAULT, /* INDYCAM_SHUTTER */
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INDYCAM_GAIN_DEFAULT, /* INDYCAM_GAIN */
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0x00, /* INDYCAM_BRIGHTNESS (read-only) */
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INDYCAM_RED_BALANCE_DEFAULT, /* INDYCAM_RED_BALANCE */
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INDYCAM_BLUE_BALANCE_DEFAULT, /* INDYCAM_BLUE_BALANCE */
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INDYCAM_RED_SATURATION_DEFAULT, /* INDYCAM_RED_SATURATION */
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INDYCAM_BLUE_SATURATION_DEFAULT,/* INDYCAM_BLUE_SATURATION */
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};
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/* IndyCam register handling */
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static int indycam_read_reg(struct i2c_client *client, unsigned char reg,
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unsigned char *value)
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{
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int ret;
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if (reg == INDYCAM_RESET) {
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dprintk("indycam_read_reg(): "
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"skipping write-only register %d\n", reg);
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*value = 0;
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return 0;
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}
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ret = i2c_smbus_read_byte_data(client, reg);
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if (ret < 0) {
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printk(KERN_ERR "IndyCam: indycam_read_reg(): read failed, "
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"register = 0x%02x\n", reg);
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return ret;
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}
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*value = (unsigned char)ret;
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return 0;
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}
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static int indycam_write_reg(struct i2c_client *client, unsigned char reg,
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unsigned char value)
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{
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int err;
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if ((reg == INDYCAM_BRIGHTNESS)
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|| (reg == INDYCAM_VERSION)) {
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dprintk("indycam_write_reg(): "
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"skipping read-only register %d\n", reg);
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return 0;
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}
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dprintk("Writing Reg %d = 0x%02x\n", reg, value);
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err = i2c_smbus_write_byte_data(client, reg, value);
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if (err) {
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printk(KERN_ERR "IndyCam: indycam_write_reg(): write failed, "
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"register = 0x%02x, value = 0x%02x\n", reg, value);
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}
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return err;
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}
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static int indycam_write_block(struct i2c_client *client, unsigned char reg,
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unsigned char length, unsigned char *data)
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{
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unsigned char i;
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int err;
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for (i = reg; i < length; i++) {
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err = indycam_write_reg(client, reg + i, data[i]);
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if (err)
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return err;
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}
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return 0;
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}
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/* Helper functions */
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#ifdef INDYCAM_DEBUG
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static void indycam_regdump_debug(struct i2c_client *client)
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{
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int i;
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unsigned char val;
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for (i = 0; i < 9; i++) {
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indycam_read_reg(client, i, &val);
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dprintk("Reg %d = 0x%02x\n", i, val);
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}
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}
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#endif
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static int indycam_get_controls(struct i2c_client *client,
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struct indycam_control *ctrl)
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{
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unsigned char ctrl_reg;
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indycam_read_reg(client, INDYCAM_CONTROL, &ctrl_reg);
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ctrl->agc = (ctrl_reg & INDYCAM_CONTROL_AGCENA)
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? INDYCAM_VALUE_ENABLED
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: INDYCAM_VALUE_DISABLED;
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ctrl->awb = (ctrl_reg & INDYCAM_CONTROL_AWBCTL)
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? INDYCAM_VALUE_ENABLED
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: INDYCAM_VALUE_DISABLED;
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indycam_read_reg(client, INDYCAM_SHUTTER,
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(unsigned char *)&ctrl->shutter);
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indycam_read_reg(client, INDYCAM_GAIN,
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(unsigned char *)&ctrl->gain);
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indycam_read_reg(client, INDYCAM_RED_BALANCE,
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(unsigned char *)&ctrl->red_balance);
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indycam_read_reg(client, INDYCAM_BLUE_BALANCE,
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(unsigned char *)&ctrl->blue_balance);
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indycam_read_reg(client, INDYCAM_RED_SATURATION,
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(unsigned char *)&ctrl->red_saturation);
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indycam_read_reg(client, INDYCAM_BLUE_SATURATION,
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(unsigned char *)&ctrl->blue_saturation);
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indycam_read_reg(client, INDYCAM_GAMMA,
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(unsigned char *)&ctrl->gamma);
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return 0;
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}
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static int indycam_set_controls(struct i2c_client *client,
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struct indycam_control *ctrl)
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{
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unsigned char ctrl_reg;
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indycam_read_reg(client, INDYCAM_CONTROL, &ctrl_reg);
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if (ctrl->agc != INDYCAM_VALUE_UNCHANGED) {
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if (ctrl->agc)
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ctrl_reg |= INDYCAM_CONTROL_AGCENA;
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else
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ctrl_reg &= ~INDYCAM_CONTROL_AGCENA;
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}
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if (ctrl->awb != INDYCAM_VALUE_UNCHANGED) {
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if (ctrl->awb)
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ctrl_reg |= INDYCAM_CONTROL_AWBCTL;
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else
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ctrl_reg &= ~INDYCAM_CONTROL_AWBCTL;
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}
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indycam_write_reg(client, INDYCAM_CONTROL, ctrl_reg);
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if (ctrl->shutter >= 0)
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indycam_write_reg(client, INDYCAM_SHUTTER, ctrl->shutter);
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if (ctrl->gain >= 0)
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indycam_write_reg(client, INDYCAM_GAIN, ctrl->gain);
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if (ctrl->red_balance >= 0)
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indycam_write_reg(client, INDYCAM_RED_BALANCE,
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ctrl->red_balance);
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if (ctrl->blue_balance >= 0)
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indycam_write_reg(client, INDYCAM_BLUE_BALANCE,
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ctrl->blue_balance);
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if (ctrl->red_saturation >= 0)
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indycam_write_reg(client, INDYCAM_RED_SATURATION,
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ctrl->red_saturation);
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if (ctrl->blue_saturation >= 0)
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indycam_write_reg(client, INDYCAM_BLUE_SATURATION,
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ctrl->blue_saturation);
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if (ctrl->gamma >= 0)
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indycam_write_reg(client, INDYCAM_GAMMA, ctrl->gamma);
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return 0;
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}
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/* I2C-interface */
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static int indycam_attach(struct i2c_adapter *adap, int addr, int kind)
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{
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int err = 0;
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struct indycam *camera;
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struct i2c_client *client;
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printk(KERN_INFO "SGI IndyCam driver version %s\n",
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INDYCAM_MODULE_VERSION);
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client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
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if (!client)
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return -ENOMEM;
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camera = kmalloc(sizeof(struct indycam), GFP_KERNEL);
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if (!camera) {
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err = -ENOMEM;
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goto out_free_client;
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}
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memset(client, 0, sizeof(struct i2c_client));
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memset(camera, 0, sizeof(struct indycam));
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client->addr = addr;
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client->adapter = adap;
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client->driver = &i2c_driver_indycam;
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client->flags = 0;
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strcpy(client->name, "IndyCam client");
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i2c_set_clientdata(client, camera);
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camera->client = client;
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err = i2c_attach_client(client);
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if (err)
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goto out_free_camera;
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camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
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if (camera->version != CAMERA_VERSION_INDY &&
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camera->version != CAMERA_VERSION_MOOSE) {
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err = -ENODEV;
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goto out_detach_client;
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}
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printk(KERN_INFO "IndyCam v%d.%d detected\n",
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INDYCAM_VERSION_MAJOR(camera->version),
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INDYCAM_VERSION_MINOR(camera->version));
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indycam_regdump(client);
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// initialize
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err = indycam_write_block(client, 0, sizeof(initseq),
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(unsigned char *)&initseq);
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if (err) {
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printk(KERN_ERR "IndyCam initalization failed\n");
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err = -EIO;
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goto out_detach_client;
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}
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indycam_regdump(client);
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// white balance
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err = indycam_write_reg(client, INDYCAM_CONTROL,
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INDYCAM_CONTROL_AGCENA | INDYCAM_CONTROL_AWBCTL);
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if (err) {
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printk(KERN_ERR "IndyCam white balance "
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"initialization failed\n");
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err = -EIO;
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goto out_detach_client;
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}
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indycam_regdump(client);
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printk(KERN_INFO "IndyCam initialized\n");
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return 0;
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out_detach_client:
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i2c_detach_client(client);
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out_free_camera:
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kfree(camera);
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out_free_client:
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kfree(client);
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return err;
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}
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static int indycam_probe(struct i2c_adapter *adap)
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{
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/* Indy specific crap */
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if (adap->id == VINO_ADAPTER)
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return indycam_attach(adap, INDYCAM_ADDR, 0);
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/* Feel free to add probe here :-) */
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return -ENODEV;
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}
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static int indycam_detach(struct i2c_client *client)
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{
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struct indycam *camera = i2c_get_clientdata(client);
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i2c_detach_client(client);
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kfree(camera);
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kfree(client);
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return 0;
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}
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static int indycam_command(struct i2c_client *client, unsigned int cmd,
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void *arg)
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{
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// struct indycam *camera = i2c_get_clientdata(client);
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/* The old video_decoder interface just isn't enough,
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* so we'll use some custom commands. */
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switch (cmd) {
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case DECODER_GET_CAPABILITIES: {
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struct video_decoder_capability *cap = arg;
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cap->flags = VIDEO_DECODER_NTSC;
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cap->inputs = 1;
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cap->outputs = 1;
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break;
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}
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case DECODER_GET_STATUS: {
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int *iarg = arg;
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*iarg = DECODER_STATUS_GOOD | DECODER_STATUS_NTSC |
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DECODER_STATUS_COLOR;
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break;
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}
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case DECODER_SET_NORM: {
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int *iarg = arg;
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switch (*iarg) {
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case VIDEO_MODE_NTSC:
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break;
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default:
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return -EINVAL;
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}
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break;
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}
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case DECODER_SET_INPUT: {
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int *iarg = arg;
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if (*iarg != 0)
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return -EINVAL;
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break;
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}
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case DECODER_SET_OUTPUT: {
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int *iarg = arg;
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if (*iarg != 0)
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return -EINVAL;
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break;
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}
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case DECODER_ENABLE_OUTPUT: {
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/* Always enabled */
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break;
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}
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case DECODER_SET_PICTURE: {
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// struct video_picture *pic = arg;
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/* TODO: convert values for indycam_set_controls() */
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break;
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}
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case DECODER_INDYCAM_GET_CONTROLS: {
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struct indycam_control *ctrl = arg;
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indycam_get_controls(client, ctrl);
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}
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case DECODER_INDYCAM_SET_CONTROLS: {
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struct indycam_control *ctrl = arg;
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indycam_set_controls(client, ctrl);
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}
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default:
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return -EINVAL;
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}
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return 0;
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}
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static struct i2c_driver i2c_driver_indycam = {
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.owner = THIS_MODULE,
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.name = "indycam",
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.id = I2C_DRIVERID_INDYCAM,
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.flags = I2C_DF_NOTIFY,
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.attach_adapter = indycam_probe,
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.detach_client = indycam_detach,
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.command = indycam_command,
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};
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static int __init indycam_init(void)
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{
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return i2c_add_driver(&i2c_driver_indycam);
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}
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static void __exit indycam_exit(void)
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{
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i2c_del_driver(&i2c_driver_indycam);
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}
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module_init(indycam_init);
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module_exit(indycam_exit);
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112
drivers/media/video/indycam.h
Normal file
112
drivers/media/video/indycam.h
Normal file
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@ -0,0 +1,112 @@
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/*
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* indycam.h - Silicon Graphics IndyCam digital camera driver
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*
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* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
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* Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
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*
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* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _INDYCAM_H_
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#define _INDYCAM_H_
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/* I2C address for the Guinness Camera */
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#define INDYCAM_ADDR 0x56
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/* Camera version */
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#define CAMERA_VERSION_INDY 0x10 /* v1.0 */
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#define CAMERA_VERSION_MOOSE 0x12 /* v1.2 */
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#define INDYCAM_VERSION_MAJOR(x) (((x) & 0xf0) >> 4)
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#define INDYCAM_VERSION_MINOR(x) ((x) & 0x0f)
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/* Register bus addresses */
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#define INDYCAM_CONTROL 0x00
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#define INDYCAM_SHUTTER 0x01
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#define INDYCAM_GAIN 0x02
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#define INDYCAM_BRIGHTNESS 0x03 /* read-only */
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#define INDYCAM_RED_BALANCE 0x04
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#define INDYCAM_BLUE_BALANCE 0x05
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#define INDYCAM_RED_SATURATION 0x06
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#define INDYCAM_BLUE_SATURATION 0x07
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#define INDYCAM_GAMMA 0x08
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#define INDYCAM_VERSION 0x0e /* read-only */
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#define INDYCAM_RESET 0x0f /* write-only */
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#define INDYCAM_LED 0x46
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#define INDYCAM_ORIENTATION 0x47
|
||||
#define INDYCAM_BUTTON 0x48
|
||||
|
||||
/* Field definitions of registers */
|
||||
#define INDYCAM_CONTROL_AGCENA (1<<0) /* automatic gain control */
|
||||
#define INDYCAM_CONTROL_AWBCTL (1<<1) /* automatic white balance */
|
||||
/* 2-3 are reserved */
|
||||
#define INDYCAM_CONTROL_EVNFLD (1<<4) /* read-only */
|
||||
|
||||
#define INDYCAM_SHUTTER_10000 0x02 /* 1/10000 second */
|
||||
#define INDYCAM_SHUTTER_4000 0x04 /* 1/4000 second */
|
||||
#define INDYCAM_SHUTTER_2000 0x08 /* 1/2000 second */
|
||||
#define INDYCAM_SHUTTER_1000 0x10 /* 1/1000 second */
|
||||
#define INDYCAM_SHUTTER_500 0x20 /* 1/500 second */
|
||||
#define INDYCAM_SHUTTER_250 0x3f /* 1/250 second */
|
||||
#define INDYCAM_SHUTTER_125 0x7e /* 1/125 second */
|
||||
#define INDYCAM_SHUTTER_100 0x9e /* 1/100 second */
|
||||
#define INDYCAM_SHUTTER_60 0x00 /* 1/60 second */
|
||||
|
||||
#define INDYCAM_LED_ACTIVE 0x10
|
||||
#define INDYCAM_LED_INACTIVE 0x30
|
||||
#define INDYCAM_ORIENTATION_BOTTOM_TO_TOP 0x40
|
||||
#define INDYCAM_BUTTON_RELEASED 0x10
|
||||
|
||||
#define INDYCAM_SHUTTER_MIN 0x00
|
||||
#define INDYCAM_SHUTTER_MAX 0xff
|
||||
#define INDYCAM_GAIN_MIN 0x00
|
||||
#define INDYCAM_GAIN_MAX 0xff
|
||||
#define INDYCAM_RED_BALANCE_MIN 0x00 /* the effect is the opposite? */
|
||||
#define INDYCAM_RED_BALANCE_MAX 0xff
|
||||
#define INDYCAM_BLUE_BALANCE_MIN 0x00 /* the effect is the opposite? */
|
||||
#define INDYCAM_BLUE_BALANCE_MAX 0xff
|
||||
#define INDYCAM_RED_SATURATION_MIN 0x00
|
||||
#define INDYCAM_RED_SATURATION_MAX 0xff
|
||||
#define INDYCAM_BLUE_SATURATION_MIN 0x00
|
||||
#define INDYCAM_BLUE_SATURATION_MAX 0xff
|
||||
#define INDYCAM_GAMMA_MIN 0x00
|
||||
#define INDYCAM_GAMMA_MAX 0xff
|
||||
|
||||
/* Driver interface definitions */
|
||||
|
||||
#define INDYCAM_VALUE_ENABLED 1
|
||||
#define INDYCAM_VALUE_DISABLED 0
|
||||
#define INDYCAM_VALUE_UNCHANGED -1
|
||||
|
||||
/* When setting controls, a value of -1 leaves the control unchanged. */
|
||||
struct indycam_control {
|
||||
int agc; /* boolean */
|
||||
int awb; /* boolean */
|
||||
int shutter;
|
||||
int gain;
|
||||
int red_balance;
|
||||
int blue_balance;
|
||||
int red_saturation;
|
||||
int blue_saturation;
|
||||
int gamma;
|
||||
};
|
||||
|
||||
#define DECODER_INDYCAM_GET_CONTROLS _IOR('d', 193, struct indycam_control)
|
||||
#define DECODER_INDYCAM_SET_CONTROLS _IOW('d', 194, struct indycam_control)
|
||||
|
||||
/* Default values for controls */
|
||||
|
||||
#define INDYCAM_AGC_DEFAULT INDYCAM_VALUE_ENABLED
|
||||
#define INDYCAM_AWB_DEFAULT INDYCAM_VALUE_ENABLED
|
||||
|
||||
#define INDYCAM_SHUTTER_DEFAULT INDYCAM_SHUTTER_60
|
||||
#define INDYCAM_GAIN_DEFAULT 0x80
|
||||
#define INDYCAM_RED_BALANCE_DEFAULT 0x18
|
||||
#define INDYCAM_BLUE_BALANCE_DEFAULT 0xa4
|
||||
#define INDYCAM_RED_SATURATION_DEFAULT 0x80
|
||||
#define INDYCAM_BLUE_SATURATION_DEFAULT 0xc0
|
||||
#define INDYCAM_GAMMA_DEFAULT 0x80
|
||||
|
||||
#endif
|
||||
512
drivers/media/video/saa7191.c
Normal file
512
drivers/media/video/saa7191.c
Normal file
|
|
@ -0,0 +1,512 @@
|
|||
/*
|
||||
* saa7191.c - Philips SAA7191 video decoder driver
|
||||
*
|
||||
* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
|
||||
* Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <linux/videodev.h>
|
||||
#include <linux/video_decoder.h>
|
||||
#include <linux/i2c.h>
|
||||
|
||||
#include "saa7191.h"
|
||||
|
||||
#define SAA7191_MODULE_VERSION "0.0.3"
|
||||
|
||||
MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
|
||||
MODULE_VERSION(SAA7191_MODULE_VERSION);
|
||||
MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
#define VINO_ADAPTER (I2C_ALGO_SGI | I2C_HW_SGI_VINO)
|
||||
|
||||
struct saa7191 {
|
||||
struct i2c_client *client;
|
||||
|
||||
/* the register values are stored here as the actual
|
||||
* I2C-registers are write-only */
|
||||
unsigned char reg[25];
|
||||
|
||||
unsigned char norm;
|
||||
unsigned char input;
|
||||
};
|
||||
|
||||
static struct i2c_driver i2c_driver_saa7191;
|
||||
|
||||
static const unsigned char initseq[] = {
|
||||
0, /* Subaddress */
|
||||
0x50, /* SAA7191_REG_IDEL */
|
||||
0x30, /* SAA7191_REG_HSYB */
|
||||
0x00, /* SAA7191_REG_HSYS */
|
||||
0xe8, /* SAA7191_REG_HCLB */
|
||||
0xb6, /* SAA7191_REG_HCLS */
|
||||
0xf4, /* SAA7191_REG_HPHI */
|
||||
0x01, /* SAA7191_REG_LUMA - chrominance trap active (CVBS) */
|
||||
0x00, /* SAA7191_REG_HUEC */
|
||||
0xf8, /* SAA7191_REG_CKTQ */
|
||||
0xf8, /* SAA7191_REG_CKTS */
|
||||
0x90, /* SAA7191_REG_PLSE */
|
||||
0x90, /* SAA7191_REG_SESE */
|
||||
0x00, /* SAA7191_REG_GAIN */
|
||||
0x0c, /* SAA7191_REG_STDC - not SECAM, slow time constant */
|
||||
0x78, /* SAA7191_REG_IOCK - chrominance from CVBS, GPSW1 & 2 off */
|
||||
0x99, /* SAA7191_REG_CTL3 - automatic field detection */
|
||||
0x00, /* SAA7191_REG_CTL4 */
|
||||
0x2c, /* SAA7191_REG_CHCV */
|
||||
0x00, /* unused */
|
||||
0x00, /* unused */
|
||||
0x34, /* SAA7191_REG_HS6B */
|
||||
0x0a, /* SAA7191_REG_HS6S */
|
||||
0xf4, /* SAA7191_REG_HC6B */
|
||||
0xce, /* SAA7191_REG_HC6S */
|
||||
0xf4, /* SAA7191_REG_HP6I */
|
||||
};
|
||||
|
||||
/* SAA7191 register handling */
|
||||
|
||||
static unsigned char saa7191_read_reg(struct i2c_client *client,
|
||||
unsigned char reg)
|
||||
{
|
||||
return ((struct saa7191 *)i2c_get_clientdata(client))->reg[reg];
|
||||
}
|
||||
|
||||
static int saa7191_read_status(struct i2c_client *client,
|
||||
unsigned char *value)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = i2c_master_recv(client, value, 1);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int saa7191_write_reg(struct i2c_client *client, unsigned char reg,
|
||||
unsigned char value)
|
||||
{
|
||||
|
||||
((struct saa7191 *)i2c_get_clientdata(client))->reg[reg] = value;
|
||||
return i2c_smbus_write_byte_data(client, reg, value);
|
||||
}
|
||||
|
||||
/* the first byte of data must be the first subaddress number (register) */
|
||||
static int saa7191_write_block(struct i2c_client *client,
|
||||
unsigned char length, unsigned char *data)
|
||||
{
|
||||
int i;
|
||||
int ret;
|
||||
|
||||
struct saa7191 *decoder = (struct saa7191 *)i2c_get_clientdata(client);
|
||||
for (i = 0; i < (length - 1); i++) {
|
||||
decoder->reg[data[0] + i] = data[i + 1];
|
||||
}
|
||||
|
||||
ret = i2c_master_send(client, data, length);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "SAA7191: saa7191_write_block(): "
|
||||
"write failed");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Helper functions */
|
||||
|
||||
static int saa7191_set_input(struct i2c_client *client, int input)
|
||||
{
|
||||
unsigned char luma = saa7191_read_reg(client, SAA7191_REG_LUMA);
|
||||
unsigned char iock = saa7191_read_reg(client, SAA7191_REG_IOCK);
|
||||
int err;
|
||||
|
||||
switch (input) {
|
||||
case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
|
||||
iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
|
||||
| SAA7191_IOCK_GPSW2);
|
||||
/* Chrominance trap active */
|
||||
luma &= ~SAA7191_LUMA_BYPS;
|
||||
break;
|
||||
case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
|
||||
iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
|
||||
/* Chrominance trap bypassed */
|
||||
luma |= SAA7191_LUMA_BYPS;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = saa7191_write_reg(client, SAA7191_REG_LUMA, luma);
|
||||
if (err)
|
||||
return -EIO;
|
||||
err = saa7191_write_reg(client, SAA7191_REG_IOCK, iock);
|
||||
if (err)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int saa7191_set_norm(struct i2c_client *client, int norm)
|
||||
{
|
||||
struct saa7191 *decoder = i2c_get_clientdata(client);
|
||||
unsigned char stdc = saa7191_read_reg(client, SAA7191_REG_STDC);
|
||||
unsigned char ctl3 = saa7191_read_reg(client, SAA7191_REG_CTL3);
|
||||
unsigned char chcv = saa7191_read_reg(client, SAA7191_REG_CHCV);
|
||||
int err;
|
||||
|
||||
switch(norm) {
|
||||
case SAA7191_NORM_AUTO: {
|
||||
unsigned char status;
|
||||
|
||||
// does status depend on current norm ?
|
||||
if (saa7191_read_status(client, &status))
|
||||
return -EIO;
|
||||
|
||||
stdc &= ~SAA7191_STDC_SECS;
|
||||
ctl3 &= ~SAA7191_CTL3_FSEL;
|
||||
ctl3 |= SAA7191_CTL3_AUFD;
|
||||
chcv = (status & SAA7191_STATUS_FIDT)
|
||||
? SAA7191_CHCV_NTSC : SAA7191_CHCV_PAL;
|
||||
break;
|
||||
}
|
||||
case SAA7191_NORM_PAL:
|
||||
stdc &= ~SAA7191_STDC_SECS;
|
||||
ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
|
||||
chcv = SAA7191_CHCV_PAL;
|
||||
break;
|
||||
case SAA7191_NORM_NTSC:
|
||||
stdc &= ~SAA7191_STDC_SECS;
|
||||
ctl3 &= ~SAA7191_CTL3_AUFD;
|
||||
ctl3 |= SAA7191_CTL3_FSEL;
|
||||
chcv = SAA7191_CHCV_NTSC;
|
||||
break;
|
||||
case SAA7191_NORM_SECAM:
|
||||
stdc |= SAA7191_STDC_SECS;
|
||||
ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
|
||||
chcv = SAA7191_CHCV_PAL;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = saa7191_write_reg(client, SAA7191_REG_CTL3, ctl3);
|
||||
if (err)
|
||||
return -EIO;
|
||||
err = saa7191_write_reg(client, SAA7191_REG_STDC, stdc);
|
||||
if (err)
|
||||
return -EIO;
|
||||
err = saa7191_write_reg(client, SAA7191_REG_CHCV, chcv);
|
||||
if (err)
|
||||
return -EIO;
|
||||
|
||||
decoder->norm = norm;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int saa7191_get_controls(struct i2c_client *client,
|
||||
struct saa7191_control *ctrl)
|
||||
{
|
||||
unsigned char hue = saa7191_read_reg(client, SAA7191_REG_HUEC);
|
||||
unsigned char stdc = saa7191_read_reg(client, SAA7191_REG_STDC);
|
||||
|
||||
if (hue < 0x80) {
|
||||
hue += 0x80;
|
||||
} else {
|
||||
hue -= 0x80;
|
||||
}
|
||||
ctrl->hue = hue;
|
||||
|
||||
ctrl->vtrc = (stdc & SAA7191_STDC_VTRC)
|
||||
? SAA7191_VALUE_ENABLED : SAA7191_VALUE_DISABLED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int saa7191_set_controls(struct i2c_client *client,
|
||||
struct saa7191_control *ctrl)
|
||||
{
|
||||
int err;
|
||||
|
||||
if (ctrl->hue >= 0) {
|
||||
unsigned char hue = ctrl->hue & 0xff;
|
||||
if (hue < 0x80) {
|
||||
hue += 0x80;
|
||||
} else {
|
||||
hue -= 0x80;
|
||||
}
|
||||
err = saa7191_write_reg(client, SAA7191_REG_HUEC, hue);
|
||||
if (err)
|
||||
return -EIO;
|
||||
}
|
||||
if (ctrl->vtrc >= 0) {
|
||||
unsigned char stdc =
|
||||
saa7191_read_reg(client, SAA7191_REG_STDC);
|
||||
|
||||
if (ctrl->vtrc) {
|
||||
stdc |= SAA7191_STDC_VTRC;
|
||||
} else {
|
||||
stdc &= ~SAA7191_STDC_VTRC;
|
||||
}
|
||||
|
||||
err = saa7191_write_reg(client, SAA7191_REG_STDC, stdc);
|
||||
if (err)
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* I2C-interface */
|
||||
|
||||
static int saa7191_attach(struct i2c_adapter *adap, int addr, int kind)
|
||||
{
|
||||
int err = 0;
|
||||
struct saa7191 *decoder;
|
||||
struct i2c_client *client;
|
||||
|
||||
printk(KERN_INFO "Philips SAA7191 driver version %s\n",
|
||||
SAA7191_MODULE_VERSION);
|
||||
|
||||
client = kmalloc(sizeof(*client), GFP_KERNEL);
|
||||
if (!client)
|
||||
return -ENOMEM;
|
||||
decoder = kmalloc(sizeof(*decoder), GFP_KERNEL);
|
||||
if (!decoder) {
|
||||
err = -ENOMEM;
|
||||
goto out_free_client;
|
||||
}
|
||||
|
||||
memset(client, 0, sizeof(struct i2c_client));
|
||||
memset(decoder, 0, sizeof(struct saa7191));
|
||||
|
||||
client->addr = addr;
|
||||
client->adapter = adap;
|
||||
client->driver = &i2c_driver_saa7191;
|
||||
client->flags = 0;
|
||||
strcpy(client->name, "saa7191 client");
|
||||
i2c_set_clientdata(client, decoder);
|
||||
|
||||
decoder->client = client;
|
||||
|
||||
err = i2c_attach_client(client);
|
||||
if (err)
|
||||
goto out_free_decoder;
|
||||
|
||||
decoder->input = SAA7191_INPUT_COMPOSITE;
|
||||
decoder->norm = SAA7191_NORM_AUTO;
|
||||
|
||||
err = saa7191_write_block(client, sizeof(initseq),
|
||||
(unsigned char *)initseq);
|
||||
if (err) {
|
||||
printk(KERN_ERR "SAA7191 initialization failed\n");
|
||||
goto out_detach_client;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "SAA7191 initialized\n");
|
||||
|
||||
return 0;
|
||||
|
||||
out_detach_client:
|
||||
i2c_detach_client(client);
|
||||
out_free_decoder:
|
||||
kfree(decoder);
|
||||
out_free_client:
|
||||
kfree(client);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int saa7191_probe(struct i2c_adapter *adap)
|
||||
{
|
||||
/* Always connected to VINO */
|
||||
if (adap->id == VINO_ADAPTER)
|
||||
return saa7191_attach(adap, SAA7191_ADDR, 0);
|
||||
/* Feel free to add probe here :-) */
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int saa7191_detach(struct i2c_client *client)
|
||||
{
|
||||
struct saa7191 *decoder = i2c_get_clientdata(client);
|
||||
|
||||
i2c_detach_client(client);
|
||||
kfree(decoder);
|
||||
kfree(client);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int saa7191_command(struct i2c_client *client, unsigned int cmd,
|
||||
void *arg)
|
||||
{
|
||||
struct saa7191 *decoder = i2c_get_clientdata(client);
|
||||
|
||||
switch (cmd) {
|
||||
case DECODER_GET_CAPABILITIES: {
|
||||
struct video_decoder_capability *cap = arg;
|
||||
|
||||
cap->flags = VIDEO_DECODER_PAL | VIDEO_DECODER_NTSC |
|
||||
VIDEO_DECODER_SECAM | VIDEO_DECODER_AUTO;
|
||||
cap->inputs = (client->adapter->id == VINO_ADAPTER) ? 2 : 1;
|
||||
cap->outputs = 1;
|
||||
break;
|
||||
}
|
||||
case DECODER_GET_STATUS: {
|
||||
int *iarg = arg;
|
||||
unsigned char status;
|
||||
int res = 0;
|
||||
|
||||
if (saa7191_read_status(client, &status)) {
|
||||
return -EIO;
|
||||
}
|
||||
if ((status & SAA7191_STATUS_HLCK) == 0)
|
||||
res |= DECODER_STATUS_GOOD;
|
||||
if (status & SAA7191_STATUS_CODE)
|
||||
res |= DECODER_STATUS_COLOR;
|
||||
switch (decoder->norm) {
|
||||
case SAA7191_NORM_NTSC:
|
||||
res |= DECODER_STATUS_NTSC;
|
||||
break;
|
||||
case SAA7191_NORM_PAL:
|
||||
res |= DECODER_STATUS_PAL;
|
||||
break;
|
||||
case SAA7191_NORM_SECAM:
|
||||
res |= DECODER_STATUS_SECAM;
|
||||
break;
|
||||
case SAA7191_NORM_AUTO:
|
||||
default:
|
||||
if (status & SAA7191_STATUS_FIDT)
|
||||
res |= DECODER_STATUS_NTSC;
|
||||
else
|
||||
res |= DECODER_STATUS_PAL;
|
||||
break;
|
||||
}
|
||||
*iarg = res;
|
||||
break;
|
||||
}
|
||||
case DECODER_SET_NORM: {
|
||||
int *iarg = arg;
|
||||
|
||||
switch (*iarg) {
|
||||
case VIDEO_MODE_AUTO:
|
||||
return saa7191_set_norm(client, SAA7191_NORM_AUTO);
|
||||
case VIDEO_MODE_PAL:
|
||||
return saa7191_set_norm(client, SAA7191_NORM_PAL);
|
||||
case VIDEO_MODE_NTSC:
|
||||
return saa7191_set_norm(client, SAA7191_NORM_NTSC);
|
||||
case VIDEO_MODE_SECAM:
|
||||
return saa7191_set_norm(client, SAA7191_NORM_SECAM);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case DECODER_SET_INPUT: {
|
||||
int *iarg = arg;
|
||||
|
||||
switch (client->adapter->id) {
|
||||
case VINO_ADAPTER:
|
||||
return saa7191_set_input(client, *iarg);
|
||||
default:
|
||||
if (*iarg != 0)
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case DECODER_SET_OUTPUT: {
|
||||
int *iarg = arg;
|
||||
|
||||
/* not much choice of outputs */
|
||||
if (*iarg != 0)
|
||||
return -EINVAL;
|
||||
break;
|
||||
}
|
||||
case DECODER_ENABLE_OUTPUT: {
|
||||
/* Always enabled */
|
||||
break;
|
||||
}
|
||||
case DECODER_SET_PICTURE: {
|
||||
struct video_picture *pic = arg;
|
||||
unsigned val;
|
||||
int err;
|
||||
|
||||
val = (pic->hue >> 8) - 0x80;
|
||||
err = saa7191_write_reg(client, SAA7191_REG_HUEC, val);
|
||||
if (err)
|
||||
return -EIO;
|
||||
break;
|
||||
}
|
||||
case DECODER_SAA7191_GET_STATUS: {
|
||||
struct saa7191_status *status = arg;
|
||||
unsigned char status_reg;
|
||||
|
||||
if (saa7191_read_status(client, &status_reg))
|
||||
return -EIO;
|
||||
status->signal = ((status_reg & SAA7191_STATUS_HLCK) == 0)
|
||||
? SAA7191_VALUE_ENABLED : SAA7191_VALUE_DISABLED;
|
||||
status->ntsc = (status_reg & SAA7191_STATUS_FIDT)
|
||||
? SAA7191_VALUE_ENABLED : SAA7191_VALUE_DISABLED;
|
||||
status->color = (status_reg & SAA7191_STATUS_CODE)
|
||||
? SAA7191_VALUE_ENABLED : SAA7191_VALUE_DISABLED;
|
||||
|
||||
status->input = decoder->input;
|
||||
status->norm = decoder->norm;
|
||||
}
|
||||
case DECODER_SAA7191_SET_NORM: {
|
||||
int *norm = arg;
|
||||
return saa7191_set_norm(client, *norm);
|
||||
}
|
||||
case DECODER_SAA7191_GET_CONTROLS: {
|
||||
struct saa7191_control *ctrl = arg;
|
||||
return saa7191_get_controls(client, ctrl);
|
||||
}
|
||||
case DECODER_SAA7191_SET_CONTROLS: {
|
||||
struct saa7191_control *ctrl = arg;
|
||||
return saa7191_set_controls(client, ctrl);
|
||||
}
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct i2c_driver i2c_driver_saa7191 = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "saa7191",
|
||||
.id = I2C_DRIVERID_SAA7191,
|
||||
.flags = I2C_DF_NOTIFY,
|
||||
.attach_adapter = saa7191_probe,
|
||||
.detach_client = saa7191_detach,
|
||||
.command = saa7191_command
|
||||
};
|
||||
|
||||
static int saa7191_init(void)
|
||||
{
|
||||
return i2c_add_driver(&i2c_driver_saa7191);
|
||||
}
|
||||
|
||||
static void saa7191_exit(void)
|
||||
{
|
||||
i2c_del_driver(&i2c_driver_saa7191);
|
||||
}
|
||||
|
||||
module_init(saa7191_init);
|
||||
module_exit(saa7191_exit);
|
||||
139
drivers/media/video/saa7191.h
Normal file
139
drivers/media/video/saa7191.h
Normal file
|
|
@ -0,0 +1,139 @@
|
|||
/*
|
||||
* saa7191.h - Philips SAA7191 video decoder driver
|
||||
*
|
||||
* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
|
||||
* Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _SAA7191_H_
|
||||
#define _SAA7191_H_
|
||||
|
||||
/* Philips SAA7191 DMSD I2C bus address */
|
||||
#define SAA7191_ADDR 0x8a
|
||||
|
||||
/* Register subaddresses. */
|
||||
#define SAA7191_REG_IDEL 0x00
|
||||
#define SAA7191_REG_HSYB 0x01
|
||||
#define SAA7191_REG_HSYS 0x02
|
||||
#define SAA7191_REG_HCLB 0x03
|
||||
#define SAA7191_REG_HCLS 0x04
|
||||
#define SAA7191_REG_HPHI 0x05
|
||||
#define SAA7191_REG_LUMA 0x06
|
||||
#define SAA7191_REG_HUEC 0x07
|
||||
#define SAA7191_REG_CKTQ 0x08
|
||||
#define SAA7191_REG_CKTS 0x09
|
||||
#define SAA7191_REG_PLSE 0x0a
|
||||
#define SAA7191_REG_SESE 0x0b
|
||||
#define SAA7191_REG_GAIN 0x0c
|
||||
#define SAA7191_REG_STDC 0x0d
|
||||
#define SAA7191_REG_IOCK 0x0e
|
||||
#define SAA7191_REG_CTL3 0x0f
|
||||
#define SAA7191_REG_CTL4 0x10
|
||||
#define SAA7191_REG_CHCV 0x11
|
||||
#define SAA7191_REG_HS6B 0x14
|
||||
#define SAA7191_REG_HS6S 0x15
|
||||
#define SAA7191_REG_HC6B 0x16
|
||||
#define SAA7191_REG_HC6S 0x17
|
||||
#define SAA7191_REG_HP6I 0x18
|
||||
#define SAA7191_REG_STATUS 0xff /* not really a subaddress */
|
||||
|
||||
/* Status Register definitions */
|
||||
#define SAA7191_STATUS_CODE 0x01 /* color detected flag */
|
||||
#define SAA7191_STATUS_FIDT 0x20 /* format type NTSC/PAL */
|
||||
#define SAA7191_STATUS_HLCK 0x40 /* PLL unlocked/locked */
|
||||
#define SAA7191_STATUS_STTC 0x80 /* tv/vtr time constant */
|
||||
|
||||
/* Luminance Control Register definitions */
|
||||
#define SAA7191_LUMA_BYPS 0x80
|
||||
|
||||
/* Chroma Gain Control Settings Register definitions */
|
||||
/* 0=automatic colour-killer enabled, 1=forced colour on */
|
||||
#define SAA7191_GAIN_COLO 0x80
|
||||
|
||||
/* Standard/Mode Control Register definitions */
|
||||
/* tv/vtr mode bit: 0=TV mode (slow time constant),
|
||||
* 1=VTR mode (fast time constant) */
|
||||
#define SAA7191_STDC_VTRC 0x80
|
||||
/* SECAM mode bit: 0=other standards, 1=SECAM */
|
||||
#define SAA7191_STDC_SECS 0x01
|
||||
/* the bit fields above must be or'd with this value */
|
||||
#define SAA7191_STDC_VALUE 0x0c
|
||||
|
||||
/* I/O and Clock Control Register definitions */
|
||||
/* horizontal clock PLL: 0=PLL closed,
|
||||
* 1=PLL circuit open and horizontal freq fixed */
|
||||
#define SAA7191_IOCK_HPLL 0x80
|
||||
/* S-VHS bit (chrominance from CVBS or from chrominance input):
|
||||
* 0=controlled by BYPS-bit, 1=from chrominance input */
|
||||
#define SAA7191_IOCK_CHRS 0x04
|
||||
/* general purpose switch 2
|
||||
* VINO-specific: 0=used with CVBS, 1=used with S-Video */
|
||||
#define SAA7191_IOCK_GPSW2 0x02
|
||||
/* general purpose switch 1 */
|
||||
/* VINO-specific: 0=always, 1=not used!*/
|
||||
#define SAA7191_IOCK_GPSW1 0x01
|
||||
|
||||
/* Miscellaneous Control #1 Register definitions */
|
||||
/* automatic field detection (50/60Hz standard) */
|
||||
#define SAA7191_CTL3_AUFD 0x80
|
||||
/* field select: (if AUFD=0)
|
||||
* 0=50Hz (625 lines), 1=60Hz (525 lines) */
|
||||
#define SAA7191_CTL3_FSEL 0x40
|
||||
/* the bit fields above must be or'd with this value */
|
||||
#define SAA7191_CTL3_VALUE 0x19
|
||||
|
||||
/* Chrominance Gain Control Register definitions
|
||||
* (nominal value for UV CCIR level) */
|
||||
#define SAA7191_CHCV_NTSC 0x2c
|
||||
#define SAA7191_CHCV_PAL 0x59
|
||||
|
||||
/* Driver interface definitions */
|
||||
#define SAA7191_INPUT_COMPOSITE 0
|
||||
#define SAA7191_INPUT_SVIDEO 1
|
||||
|
||||
#define SAA7191_NORM_AUTO 0
|
||||
#define SAA7191_NORM_PAL 1
|
||||
#define SAA7191_NORM_NTSC 2
|
||||
#define SAA7191_NORM_SECAM 3
|
||||
|
||||
#define SAA7191_VALUE_ENABLED 1
|
||||
#define SAA7191_VALUE_DISABLED 0
|
||||
#define SAA7191_VALUE_UNCHANGED -1
|
||||
|
||||
struct saa7191_status {
|
||||
/* 0=no signal, 1=signal active*/
|
||||
int signal;
|
||||
/* 0=50hz (pal) signal, 1=60hz (ntsc) signal */
|
||||
int ntsc;
|
||||
/* 0=no color detected, 1=color detected */
|
||||
int color;
|
||||
|
||||
/* current SAA7191_INPUT_ */
|
||||
int input;
|
||||
/* current SAA7191_NORM_ */
|
||||
int norm;
|
||||
};
|
||||
|
||||
#define SAA7191_HUE_MIN 0x00
|
||||
#define SAA7191_HUE_MAX 0xff
|
||||
#define SAA7191_HUE_DEFAULT 0x80
|
||||
|
||||
#define SAA7191_VTRC_MIN 0x00
|
||||
#define SAA7191_VTRC_MAX 0x01
|
||||
#define SAA7191_VTRC_DEFAULT 0x00
|
||||
|
||||
struct saa7191_control {
|
||||
int hue;
|
||||
int vtrc;
|
||||
};
|
||||
|
||||
#define DECODER_SAA7191_GET_STATUS _IOR('d', 195, struct saa7191_status)
|
||||
#define DECODER_SAA7191_SET_NORM _IOW('d', 196, int)
|
||||
#define DECODER_SAA7191_GET_CONTROLS _IOR('d', 197, struct saa7191_control)
|
||||
#define DECODER_SAA7191_SET_CONTROLS _IOW('d', 198, struct saa7191_control)
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,13 +1,19 @@
|
|||
/*
|
||||
* Driver for the VINO (Video In No Out) system found in SGI Indys.
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* Copyright (C) 1999 Ulf Karlsson <ulfc@bun.falkenberg.se>
|
||||
* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
|
||||
*/
|
||||
|
||||
#ifndef VINO_H
|
||||
#define VINO_H
|
||||
#ifndef _VINO_H_
|
||||
#define _VINO_H_
|
||||
|
||||
#define VINO_BASE 0x00080000 /* Vino is in the EISA address space,
|
||||
* but it is not an EISA bus card */
|
||||
#define VINO_PAGE_SIZE 4096
|
||||
|
||||
struct sgi_vino_channel {
|
||||
u32 _pad_alpha;
|
||||
|
|
@ -21,8 +27,9 @@ struct sgi_vino_channel {
|
|||
u32 _pad_clip_end;
|
||||
volatile u32 clip_end;
|
||||
|
||||
#define VINO_FRAMERT_FULL 0xfff
|
||||
#define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */
|
||||
#define VINO_FRAMERT_RT(x) (((x) & 0x1fff) << 1) /* bits 1:12 */
|
||||
#define VINO_FRAMERT_RT(x) (((x) & 0xfff) << 1) /* bits 1:12 */
|
||||
u32 _pad_frame_rate;
|
||||
volatile u32 frame_rate;
|
||||
|
||||
|
|
@ -67,18 +74,18 @@ struct sgi_vino {
|
|||
volatile u32 rev_id;
|
||||
|
||||
#define VINO_CTRL_LITTLE_ENDIAN (1<<0)
|
||||
#define VINO_CTRL_A_FIELD_TRANS_INT (1<<1) /* Field transferred int */
|
||||
#define VINO_CTRL_A_FIFO_OF_INT (1<<2) /* FIFO overflow int */
|
||||
#define VINO_CTRL_A_END_DESC_TBL_INT (1<<3) /* End of desc table int */
|
||||
#define VINO_CTRL_A_INT (VINO_CTRL_A_FIELD_TRANS_INT | \
|
||||
VINO_CTRL_A_FIFO_OF_INT | \
|
||||
VINO_CTRL_A_END_DESC_TBL_INT)
|
||||
#define VINO_CTRL_B_FIELD_TRANS_INT (1<<4) /* Field transferred int */
|
||||
#define VINO_CTRL_B_FIFO_OF_INT (1<<5) /* FIFO overflow int */
|
||||
#define VINO_CTRL_B_END_DESC_TBL_INT (1<<6) /* End of desc table int */
|
||||
#define VINO_CTRL_B_INT (VINO_CTRL_B_FIELD_TRANS_INT | \
|
||||
VINO_CTRL_B_FIFO_OF_INT | \
|
||||
VINO_CTRL_B_END_DESC_TBL_INT)
|
||||
#define VINO_CTRL_A_EOF_INT (1<<1) /* Field transferred int */
|
||||
#define VINO_CTRL_A_FIFO_INT (1<<2) /* FIFO overflow int */
|
||||
#define VINO_CTRL_A_EOD_INT (1<<3) /* End of desc table int */
|
||||
#define VINO_CTRL_A_INT (VINO_CTRL_A_EOF_INT | \
|
||||
VINO_CTRL_A_FIFO_INT | \
|
||||
VINO_CTRL_A_EOD_INT)
|
||||
#define VINO_CTRL_B_EOF_INT (1<<4) /* Field transferred int */
|
||||
#define VINO_CTRL_B_FIFO_INT (1<<5) /* FIFO overflow int */
|
||||
#define VINO_CTRL_B_EOD_INT (1<<6) /* End of desc table int */
|
||||
#define VINO_CTRL_B_INT (VINO_CTRL_B_EOF_INT | \
|
||||
VINO_CTRL_B_FIFO_INT | \
|
||||
VINO_CTRL_B_EOD_INT)
|
||||
#define VINO_CTRL_A_DMA_ENBL (1<<7)
|
||||
#define VINO_CTRL_A_INTERLEAVE_ENBL (1<<8)
|
||||
#define VINO_CTRL_A_SYNC_ENBL (1<<9)
|
||||
|
|
@ -104,18 +111,18 @@ struct sgi_vino {
|
|||
u32 _pad_control;
|
||||
volatile u32 control;
|
||||
|
||||
#define VINO_INTSTAT_A_FIELD_TRANS (1<<0) /* Field transferred int */
|
||||
#define VINO_INTSTAT_A_FIFO_OF (1<<1) /* FIFO overflow int */
|
||||
#define VINO_INTSTAT_A_END_DESC_TBL (1<<2) /* End of desc table int */
|
||||
#define VINO_INTSTAT_A (VINO_INTSTAT_A_FIELD_TRANS | \
|
||||
VINO_INTSTAT_A_FIFO_OF | \
|
||||
VINO_INTSTAT_A_END_DESC_TBL)
|
||||
#define VINO_INTSTAT_B_FIELD_TRANS (1<<3) /* Field transferred int */
|
||||
#define VINO_INTSTAT_B_FIFO_OF (1<<4) /* FIFO overflow int */
|
||||
#define VINO_INTSTAT_B_END_DESC_TBL (1<<5) /* End of desc table int */
|
||||
#define VINO_INTSTAT_B (VINO_INTSTAT_B_FIELD_TRANS | \
|
||||
VINO_INTSTAT_B_FIFO_OF | \
|
||||
VINO_INTSTAT_B_END_DESC_TBL)
|
||||
#define VINO_INTSTAT_A_EOF (1<<0) /* Field transferred int */
|
||||
#define VINO_INTSTAT_A_FIFO (1<<1) /* FIFO overflow int */
|
||||
#define VINO_INTSTAT_A_EOD (1<<2) /* End of desc table int */
|
||||
#define VINO_INTSTAT_A (VINO_INTSTAT_A_EOF | \
|
||||
VINO_INTSTAT_A_FIFO | \
|
||||
VINO_INTSTAT_A_EOD)
|
||||
#define VINO_INTSTAT_B_EOF (1<<3) /* Field transferred int */
|
||||
#define VINO_INTSTAT_B_FIFO (1<<4) /* FIFO overflow int */
|
||||
#define VINO_INTSTAT_B_EOD (1<<5) /* End of desc table int */
|
||||
#define VINO_INTSTAT_B (VINO_INTSTAT_B_EOF | \
|
||||
VINO_INTSTAT_B_FIFO | \
|
||||
VINO_INTSTAT_B_EOD)
|
||||
u32 _pad_intr_status;
|
||||
volatile u32 intr_status;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue