x86, MCA: Convert dont_log_ce, banks and tolerant
Move those MCA configuration variables into struct mca_config and adjust the places they're used accordingly. Signed-off-by: Borislav Petkov <bp@alien8.de> Acked-by: Tony Luck <tony.luck@intel.com>hifive-unleashed-5.1
Borislav Petkov
parent
91872392f0
commit
d203f0b824
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@ -119,6 +119,13 @@ struct mce_log {
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#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1)
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#ifdef __KERNEL__
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struct mca_config {
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bool dont_log_ce;
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u8 banks;
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int tolerant;
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};
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extern void mce_register_decode_chain(struct notifier_block *nb);
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extern void mce_unregister_decode_chain(struct notifier_block *nb);
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@ -66,20 +66,10 @@ atomic_t mce_entry;
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DEFINE_PER_CPU(unsigned, mce_exception_count);
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/*
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* Tolerant levels:
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* 0: always panic on uncorrected errors, log corrected errors
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* 1: panic or SIGBUS on uncorrected errors, log corrected errors
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* 2: SIGBUS or log uncorrected errors (if possible), log corrected errors
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* 3: never panic or SIGBUS, log all errors (for testing only)
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*/
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static int tolerant __read_mostly = 1;
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static int banks __read_mostly;
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static int rip_msr __read_mostly;
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static int mce_bootlog __read_mostly = -1;
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static int monarch_timeout __read_mostly = -1;
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static int mce_panic_timeout __read_mostly;
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static int mce_dont_log_ce __read_mostly;
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int mce_cmci_disabled __read_mostly;
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int mce_ignore_ce __read_mostly;
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int mce_ser __read_mostly;
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@ -87,6 +77,17 @@ int mce_bios_cmci_threshold __read_mostly;
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struct mce_bank *mce_banks __read_mostly;
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struct mca_config mca_cfg __read_mostly = {
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/*
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* Tolerant levels:
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* 0: always panic on uncorrected errors, log corrected errors
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* 1: panic or SIGBUS on uncorrected errors, log corrected errors
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* 2: SIGBUS or log uncorrected errors (if possible), log corr. errors
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* 3: never panic or SIGBUS, log all errors (for testing only)
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*/
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.tolerant = 1
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};
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/* User mode helper program triggered by machine check event */
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static unsigned long mce_need_notify;
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static char mce_helper[128];
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@ -599,7 +600,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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mce_gather_info(&m, NULL);
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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if (!mce_banks[i].ctl || !test_bit(i, *b))
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continue;
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@ -631,7 +632,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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* Don't get the IP here because it's unlikely to
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* have anything to do with the actual error location.
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*/
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if (!(flags & MCP_DONTLOG) && !mce_dont_log_ce)
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if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
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mce_log(&m);
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/*
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@ -658,14 +659,14 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
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{
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int i, ret = 0;
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
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if (m->status & MCI_STATUS_VAL) {
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__set_bit(i, validp);
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if (quirk_no_way_out)
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quirk_no_way_out(i, m, regs);
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}
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if (mce_severity(m, tolerant, msg) >= MCE_PANIC_SEVERITY)
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if (mce_severity(m, mca_cfg.tolerant, msg) >= MCE_PANIC_SEVERITY)
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ret = 1;
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}
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return ret;
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@ -700,7 +701,7 @@ static int mce_timed_out(u64 *t)
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goto out;
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if ((s64)*t < SPINUNIT) {
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/* CHECKME: Make panic default for 1 too? */
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if (tolerant < 1)
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if (mca_cfg.tolerant < 1)
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mce_panic("Timeout synchronizing machine check over CPUs",
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NULL, NULL);
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cpu_missing = 1;
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@ -750,7 +751,8 @@ static void mce_reign(void)
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* Grade the severity of the errors of all the CPUs.
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*/
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for_each_possible_cpu(cpu) {
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int severity = mce_severity(&per_cpu(mces_seen, cpu), tolerant,
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int severity = mce_severity(&per_cpu(mces_seen, cpu),
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mca_cfg.tolerant,
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&nmsg);
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if (severity > global_worst) {
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msg = nmsg;
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@ -764,7 +766,7 @@ static void mce_reign(void)
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* This dumps all the mces in the log buffer and stops the
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* other CPUs.
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*/
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if (m && global_worst >= MCE_PANIC_SEVERITY && tolerant < 3)
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if (m && global_worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
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mce_panic("Fatal Machine check", m, msg);
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/*
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@ -777,7 +779,7 @@ static void mce_reign(void)
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* No machine check event found. Must be some external
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* source or one CPU is hung. Panic.
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*/
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if (global_worst <= MCE_KEEP_SEVERITY && tolerant < 3)
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if (global_worst <= MCE_KEEP_SEVERITY && mca_cfg.tolerant < 3)
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mce_panic("Machine check from unknown source", NULL, NULL);
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/*
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@ -946,7 +948,7 @@ static void mce_clear_state(unsigned long *toclear)
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{
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int i;
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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if (test_bit(i, toclear))
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mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
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}
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@ -1022,7 +1024,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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int order;
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/*
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* If no_way_out gets set, there is no safe way to recover from this
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* MCE. If tolerant is cranked up, we'll try anyway.
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* MCE. If mca_cfg.tolerant is cranked up, we'll try anyway.
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*/
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int no_way_out = 0;
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/*
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@ -1038,7 +1040,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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this_cpu_inc(mce_exception_count);
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if (!banks)
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if (!mca_cfg.banks)
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goto out;
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mce_gather_info(&m, regs);
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@ -1065,7 +1067,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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* because the first one to see it will clear it.
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*/
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order = mce_start(&no_way_out);
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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__clear_bit(i, toclear);
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if (!test_bit(i, valid_banks))
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continue;
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@ -1093,7 +1095,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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*/
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add_taint(TAINT_MACHINE_CHECK);
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severity = mce_severity(&m, tolerant, NULL);
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severity = mce_severity(&m, mca_cfg.tolerant, NULL);
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/*
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* When machine check was for corrected handler don't touch,
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@ -1117,7 +1119,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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* When the ring overflows we just ignore the AO error.
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* RED-PEN add some logging mechanism when
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* usable_address or mce_add_ring fails.
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* RED-PEN don't ignore overflow for tolerant == 0
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* RED-PEN don't ignore overflow for mca_cfg.tolerant == 0
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*/
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if (severity == MCE_AO_SEVERITY && mce_usable_address(&m))
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mce_ring_add(m.addr >> PAGE_SHIFT);
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@ -1149,7 +1151,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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* issues we try to recover, or limit damage to the current
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* process.
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*/
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if (tolerant < 3) {
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if (mca_cfg.tolerant < 3) {
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if (no_way_out)
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mce_panic("Fatal machine check on current CPU", &m, msg);
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if (worst == MCE_AR_SEVERITY) {
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@ -1377,11 +1379,13 @@ EXPORT_SYMBOL_GPL(mce_notify_irq);
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static int __cpuinit __mcheck_cpu_mce_banks_init(void)
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{
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int i;
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u8 num_banks = mca_cfg.banks;
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mce_banks = kzalloc(banks * sizeof(struct mce_bank), GFP_KERNEL);
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mce_banks = kzalloc(num_banks * sizeof(struct mce_bank), GFP_KERNEL);
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if (!mce_banks)
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return -ENOMEM;
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for (i = 0; i < banks; i++) {
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for (i = 0; i < num_banks; i++) {
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struct mce_bank *b = &mce_banks[i];
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b->ctl = -1ULL;
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@ -1401,7 +1405,7 @@ static int __cpuinit __mcheck_cpu_cap_init(void)
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rdmsrl(MSR_IA32_MCG_CAP, cap);
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b = cap & MCG_BANKCNT_MASK;
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if (!banks)
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if (!mca_cfg.banks)
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pr_info("CPU supports %d MCE banks\n", b);
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if (b > MAX_NR_BANKS) {
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@ -1411,8 +1415,9 @@ static int __cpuinit __mcheck_cpu_cap_init(void)
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}
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/* Don't support asymmetric configurations today */
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WARN_ON(banks != 0 && b != banks);
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banks = b;
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WARN_ON(mca_cfg.banks != 0 && b != mca_cfg.banks);
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mca_cfg.banks = b;
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if (!mce_banks) {
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int err = __mcheck_cpu_mce_banks_init();
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@ -1448,7 +1453,7 @@ static void __mcheck_cpu_init_generic(void)
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if (cap & MCG_CTL_P)
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wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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struct mce_bank *b = &mce_banks[i];
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if (!b->init)
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@ -1489,6 +1494,8 @@ static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
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/* Add per CPU specific workarounds here */
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static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
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{
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struct mca_config *cfg = &mca_cfg;
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if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
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pr_info("unknown CPU type - not enabling MCE support\n");
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return -EOPNOTSUPP;
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@ -1496,7 +1503,7 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
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/* This should be disabled by the BIOS, but isn't always */
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if (c->x86_vendor == X86_VENDOR_AMD) {
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if (c->x86 == 15 && banks > 4) {
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if (c->x86 == 15 && cfg->banks > 4) {
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/*
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* disable GART TBL walk error reporting, which
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* trips off incorrectly with the IOMMU & 3ware
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@ -1515,7 +1522,7 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
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* Various K7s with broken bank 0 around. Always disable
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* by default.
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*/
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if (c->x86 == 6 && banks > 0)
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if (c->x86 == 6 && cfg->banks > 0)
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mce_banks[0].ctl = 0;
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/*
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@ -1566,7 +1573,7 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
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* valid event later, merely don't write CTL0.
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*/
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if (c->x86 == 6 && c->x86_model < 0x1A && banks > 0)
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if (c->x86 == 6 && c->x86_model < 0x1A && cfg->banks > 0)
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mce_banks[0].init = 0;
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/*
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@ -1951,6 +1958,8 @@ static struct miscdevice mce_chrdev_device = {
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*/
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static int __init mcheck_enable(char *str)
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{
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struct mca_config *cfg = &mca_cfg;
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if (*str == 0) {
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enable_p5_mce();
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return 1;
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@ -1962,7 +1971,7 @@ static int __init mcheck_enable(char *str)
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else if (!strcmp(str, "no_cmci"))
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mce_cmci_disabled = 1;
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else if (!strcmp(str, "dont_log_ce"))
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mce_dont_log_ce = 1;
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cfg->dont_log_ce = true;
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else if (!strcmp(str, "ignore_ce"))
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mce_ignore_ce = 1;
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else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
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@ -1970,7 +1979,7 @@ static int __init mcheck_enable(char *str)
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else if (!strcmp(str, "bios_cmci_threshold"))
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mce_bios_cmci_threshold = 1;
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else if (isdigit(str[0])) {
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get_option(&str, &tolerant);
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get_option(&str, &(cfg->tolerant));
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if (*str == ',') {
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++str;
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get_option(&str, &monarch_timeout);
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@ -2002,7 +2011,7 @@ static int mce_disable_error_reporting(void)
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{
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int i;
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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struct mce_bank *b = &mce_banks[i];
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if (b->init)
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@ -2190,9 +2199,9 @@ static ssize_t store_int_with_restart(struct device *s,
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}
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static DEVICE_ATTR(trigger, 0644, show_trigger, set_trigger);
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static DEVICE_INT_ATTR(tolerant, 0644, tolerant);
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static DEVICE_INT_ATTR(tolerant, 0644, mca_cfg.tolerant);
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static DEVICE_INT_ATTR(monarch_timeout, 0644, monarch_timeout);
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static DEVICE_INT_ATTR(dont_log_ce, 0644, mce_dont_log_ce);
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static DEVICE_BOOL_ATTR(dont_log_ce, 0644, mca_cfg.dont_log_ce);
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static struct dev_ext_attribute dev_attr_check_interval = {
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__ATTR(check_interval, 0644, device_show_int, store_int_with_restart),
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@ -2253,7 +2262,7 @@ static __cpuinit int mce_device_create(unsigned int cpu)
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if (err)
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goto error;
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}
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for (j = 0; j < banks; j++) {
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for (j = 0; j < mca_cfg.banks; j++) {
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err = device_create_file(dev, &mce_banks[j].attr);
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if (err)
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goto error2;
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@ -2285,7 +2294,7 @@ static __cpuinit void mce_device_remove(unsigned int cpu)
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for (i = 0; mce_device_attrs[i]; i++)
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device_remove_file(dev, mce_device_attrs[i]);
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for (i = 0; i < banks; i++)
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for (i = 0; i < mca_cfg.banks; i++)
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device_remove_file(dev, &mce_banks[i].attr);
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device_unregister(dev);
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@ -2304,7 +2313,7 @@ static void __cpuinit mce_disable_cpu(void *h)
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if (!(action & CPU_TASKS_FROZEN))
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cmci_clear();
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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struct mce_bank *b = &mce_banks[i];
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if (b->init)
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@ -2322,7 +2331,7 @@ static void __cpuinit mce_reenable_cpu(void *h)
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if (!(action & CPU_TASKS_FROZEN))
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cmci_reenable();
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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struct mce_bank *b = &mce_banks[i];
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if (b->init)
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@ -2375,7 +2384,7 @@ static __init void mce_init_banks(void)
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{
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int i;
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for (i = 0; i < banks; i++) {
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for (i = 0; i < mca_cfg.banks; i++) {
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struct mce_bank *b = &mce_banks[i];
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struct device_attribute *a = &b->attr;
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