Add support for Y21x and Y41x to drm core and i915, and P01x support to i915.
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEuXvWqAysSYEJGuVH/lWMcqZwE8MFAlyA6D8ACgkQ/lWMcqZw E8MkeA/+KRMSXY2ljbi59SKRx0/pQ0HPoZv4sb7J7Rr0IHTEOfTfxJRNjIbJDHvu DR9F6+dx43XExWNr4mbKQ3Fooc7zKUJ/Fn1MrwVwr647LIBHtsw2VQ3PAcIK50Ph ml+rDahrEAoUF8FMAXAK8IjXh5BXG/HSOAu14JMxQvKGm4/CmAgKFnPYU16Eg1Oc kEi394cJ/DKsalXqIQiFDmCViuAYKUbMRoYYkAa/gr451zuGVoIOwSbhHTNcvjc2 cnF8oMAgjVdhp0egtKOqCHGXqSd0l4LMxjy5zOyatpgmMELK7Ns1dyWMtyPFQWKp pgD/QoGWn7aTMR1ihh6u0tNOfRIHQxrXVXAjHfA2uWVQC6Ms9cDilNkyizOXrcb6 r9tAOTeGQI6mhVhQhaVzi/NSYxrsXBt8Bo6Spj8QYupfNGU0tlOxwMqtcHXrJZ1N 06/+IPXwzYVkxzhtR3ORvwqFOkIT4ZvOc5zxT27TKSBR/HMDa4CFJFrcAAR+3eN+ Wn6wLDDxPW+ZA7Oitrq5iAJaXif8QEEtXETS/S3ZubDFw0qQYvFJbmpNOSMd9qk4 WfxUhzMiLm2DuD44b3x28fi0ekLehquWFuyBrIyAic5K+GDMJamqSBgKXXB5Oen6 hbL1mBq5ZdMZRfOR+ss2QwlbI47deHdhhEq36Rl7gi1Pub2qNuY= =u0KV -----END PGP SIGNATURE----- Merge tag 'topic/hdr-formats-2019-03-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-misc-next Add support for Y21x and Y41x to drm core and i915, and P01x support to i915. Signed-off-by: Sean Paul <seanpaul@chromium.org> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f2485309-d645-bed4-95f4-e66ff312aa05@linux.intel.com
This commit is contained in:
commit
d26f9c7f88
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@ -226,6 +226,12 @@ const struct drm_format_info *__drm_format_info(u32 format)
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{ .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
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{ .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
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{ .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
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.char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
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.hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
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@ -6557,13 +6557,22 @@ enum {
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#define PLANE_CTL_FORMAT_YUV422 (0 << 24)
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#define PLANE_CTL_FORMAT_NV12 (1 << 24)
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#define PLANE_CTL_FORMAT_XRGB_2101010 (2 << 24)
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#define PLANE_CTL_FORMAT_P010 (3 << 24)
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#define PLANE_CTL_FORMAT_XRGB_8888 (4 << 24)
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#define PLANE_CTL_FORMAT_P012 (5 << 24)
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#define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
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#define PLANE_CTL_FORMAT_P016 (7 << 24)
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#define PLANE_CTL_FORMAT_AYUV (8 << 24)
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#define PLANE_CTL_FORMAT_INDEXED (12 << 24)
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#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
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#define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
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#define PLANE_CTL_PIPE_CSC_ENABLE (1 << 23) /* Pre-GLK */
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#define PLANE_CTL_FORMAT_Y210 (1 << 23)
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#define PLANE_CTL_FORMAT_Y212 (3 << 23)
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#define PLANE_CTL_FORMAT_Y216 (5 << 23)
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#define PLANE_CTL_FORMAT_Y410 (7 << 23)
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#define PLANE_CTL_FORMAT_Y412 (9 << 23)
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#define PLANE_CTL_FORMAT_Y416 (0xb << 23)
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#define PLANE_CTL_KEY_ENABLE_MASK (0x3 << 21)
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#define PLANE_CTL_KEY_ENABLE_SOURCE (1 << 21)
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#define PLANE_CTL_KEY_ENABLE_DESTINATION (2 << 21)
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@ -135,7 +135,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
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new_crtc_state->active_planes |= BIT(plane->id);
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if (new_plane_state->base.visible &&
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new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
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is_planar_yuv_format(new_plane_state->base.fb->format->format))
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new_crtc_state->nv12_planes |= BIT(plane->id);
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if (new_plane_state->base.visible || old_plane_state->base.visible)
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@ -2677,6 +2677,24 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
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return DRM_FORMAT_RGB565;
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case PLANE_CTL_FORMAT_NV12:
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return DRM_FORMAT_NV12;
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case PLANE_CTL_FORMAT_P010:
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return DRM_FORMAT_P010;
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case PLANE_CTL_FORMAT_P012:
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return DRM_FORMAT_P012;
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case PLANE_CTL_FORMAT_P016:
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return DRM_FORMAT_P016;
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case PLANE_CTL_FORMAT_Y210:
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return DRM_FORMAT_Y210;
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case PLANE_CTL_FORMAT_Y212:
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return DRM_FORMAT_Y212;
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case PLANE_CTL_FORMAT_Y216:
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return DRM_FORMAT_Y216;
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case PLANE_CTL_FORMAT_Y410:
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return DRM_FORMAT_Y410;
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case PLANE_CTL_FORMAT_Y412:
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return DRM_FORMAT_Y412;
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case PLANE_CTL_FORMAT_Y416:
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return DRM_FORMAT_Y416;
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default:
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case PLANE_CTL_FORMAT_XRGB_8888:
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if (rgb_order) {
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@ -3176,7 +3194,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
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* Handle the AUX surface first since
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* the main surface setup depends on it.
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*/
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if (fb->format->format == DRM_FORMAT_NV12) {
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if (is_planar_yuv_format(fb->format->format)) {
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ret = skl_check_nv12_aux_surface(plane_state);
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if (ret)
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return ret;
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@ -3600,6 +3618,24 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
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return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
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case DRM_FORMAT_NV12:
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return PLANE_CTL_FORMAT_NV12;
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case DRM_FORMAT_P010:
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return PLANE_CTL_FORMAT_P010;
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case DRM_FORMAT_P012:
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return PLANE_CTL_FORMAT_P012;
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case DRM_FORMAT_P016:
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return PLANE_CTL_FORMAT_P016;
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case DRM_FORMAT_Y210:
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return PLANE_CTL_FORMAT_Y210;
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case DRM_FORMAT_Y212:
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return PLANE_CTL_FORMAT_Y212;
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case DRM_FORMAT_Y216:
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return PLANE_CTL_FORMAT_Y216;
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case DRM_FORMAT_Y410:
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return PLANE_CTL_FORMAT_Y410;
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case DRM_FORMAT_Y412:
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return PLANE_CTL_FORMAT_Y412;
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case DRM_FORMAT_Y416:
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return PLANE_CTL_FORMAT_Y416;
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default:
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MISSING_CASE(pixel_format);
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}
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@ -5036,9 +5072,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
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return 0;
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}
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if (format && format->format == DRM_FORMAT_NV12 &&
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if (format && is_planar_yuv_format(format->format) &&
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(src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {
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DRM_DEBUG_KMS("NV12: src dimensions not met\n");
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DRM_DEBUG_KMS("Planar YUV: src dimensions not met\n");
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return -EINVAL;
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}
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@ -5112,7 +5148,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
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/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
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if (!icl_is_hdr_plane(intel_plane) &&
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fb && fb->format->format == DRM_FORMAT_NV12)
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fb && is_planar_yuv_format(fb->format->format))
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need_scaler = true;
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ret = skl_update_scaler(crtc_state, force_detach,
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@ -5149,6 +5185,15 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
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case DRM_FORMAT_UYVY:
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case DRM_FORMAT_VYUY:
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case DRM_FORMAT_NV12:
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case DRM_FORMAT_P010:
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case DRM_FORMAT_P012:
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case DRM_FORMAT_P016:
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case DRM_FORMAT_Y210:
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case DRM_FORMAT_Y212:
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case DRM_FORMAT_Y216:
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case DRM_FORMAT_Y410:
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case DRM_FORMAT_Y412:
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case DRM_FORMAT_Y416:
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break;
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default:
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DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
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@ -11134,7 +11179,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
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}
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if (!linked_state) {
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DRM_DEBUG_KMS("Need %d free Y planes for NV12\n",
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DRM_DEBUG_KMS("Need %d free Y planes for planar YUV\n",
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hweight8(crtc_state->nv12_planes));
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return -EINVAL;
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@ -13767,7 +13812,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state,
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* or
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* cdclk/crtc_clock
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*/
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mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3;
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mult = is_planar_yuv_format(pixel_format) ? 2 : 3;
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tmpclk1 = (1 << 16) * mult - 1;
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tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
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max_scale = min(tmpclk1, tmpclk2);
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@ -2301,6 +2301,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
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/* intel_sprite.c */
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bool is_planar_yuv_format(u32 pixelformat);
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int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
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int usecs);
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struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
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@ -3970,7 +3970,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv,
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val = I915_READ(PLANE_BUF_CFG(pipe, plane_id));
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val2 = I915_READ(PLANE_NV12_BUF_CFG(pipe, plane_id));
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if (fourcc == DRM_FORMAT_NV12)
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if (is_planar_yuv_format(fourcc))
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swap(val, val2);
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skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
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@ -4180,7 +4180,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
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if (intel_plane->id == PLANE_CURSOR)
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return 0;
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if (plane == 1 && format != DRM_FORMAT_NV12)
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if (plane == 1 && !is_planar_yuv_format(format))
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return 0;
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/*
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@ -4192,7 +4192,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
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height = drm_rect_height(&intel_pstate->base.src) >> 16;
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/* UV plane does 1/2 pixel sub-sampling */
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if (plane == 1 && format == DRM_FORMAT_NV12) {
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if (plane == 1 && is_planar_yuv_format(format)) {
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width /= 2;
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height /= 2;
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}
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@ -4578,9 +4578,9 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
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const struct drm_framebuffer *fb = pstate->fb;
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u32 interm_pbpl;
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/* only NV12 format has two planes */
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if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
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DRM_DEBUG_KMS("Non NV12 format have single plane\n");
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/* only planar format has two planes */
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if (color_plane == 1 && !is_planar_yuv_format(fb->format->format)) {
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DRM_DEBUG_KMS("Non planar format have single plane\n");
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return -EINVAL;
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}
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@ -4591,7 +4591,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
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wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
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wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
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fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
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wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
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wp->is_planar = is_planar_yuv_format(fb->format->format);
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if (plane->id == PLANE_CURSOR) {
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wp->width = intel_pstate->base.crtc_w;
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@ -41,6 +41,19 @@
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#include "i915_drv.h"
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#include <drm/drm_color_mgmt.h>
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bool is_planar_yuv_format(u32 pixelformat)
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{
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switch (pixelformat) {
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case DRM_FORMAT_NV12:
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case DRM_FORMAT_P010:
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case DRM_FORMAT_P012:
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case DRM_FORMAT_P016:
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return true;
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default:
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return false;
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}
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}
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int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
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int usecs)
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{
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@ -335,7 +348,7 @@ skl_program_scaler(struct intel_plane *plane,
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0, INT_MAX);
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/* TODO: handle sub-pixel coordinates */
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if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
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if (is_planar_yuv_format(plane_state->base.fb->format->format) &&
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!icl_is_hdr_plane(plane)) {
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y_hphase = skl_scaler_calc_phase(1, hscale, false);
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y_vphase = skl_scaler_calc_phase(1, vscale, false);
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@ -1551,10 +1564,10 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
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int src_w = drm_rect_width(&plane_state->base.src) >> 16;
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/* Display WA #1106 */
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if (fb->format->format == DRM_FORMAT_NV12 && src_w & 3 &&
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if (is_planar_yuv_format(fb->format->format) && src_w & 3 &&
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(rotation == DRM_MODE_ROTATE_270 ||
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rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
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DRM_DEBUG_KMS("src width must be multiple of 4 for rotated NV12\n");
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DRM_DEBUG_KMS("src width must be multiple of 4 for rotated planar YUV\n");
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return -EINVAL;
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}
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@ -1790,6 +1803,27 @@ static const u32 skl_plane_formats[] = {
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DRM_FORMAT_VYUY,
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};
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static const uint32_t icl_plane_formats[] = {
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DRM_FORMAT_C8,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XRGB2101010,
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DRM_FORMAT_XBGR2101010,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_VYUY,
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DRM_FORMAT_Y210,
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DRM_FORMAT_Y212,
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DRM_FORMAT_Y216,
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DRM_FORMAT_Y410,
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DRM_FORMAT_Y412,
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DRM_FORMAT_Y416,
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};
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static const u32 skl_planar_formats[] = {
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DRM_FORMAT_C8,
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DRM_FORMAT_RGB565,
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@ -1806,6 +1840,50 @@ static const u32 skl_planar_formats[] = {
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DRM_FORMAT_NV12,
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};
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static const uint32_t glk_planar_formats[] = {
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DRM_FORMAT_C8,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XRGB2101010,
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DRM_FORMAT_XBGR2101010,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_VYUY,
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DRM_FORMAT_NV12,
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DRM_FORMAT_P010,
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DRM_FORMAT_P012,
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DRM_FORMAT_P016,
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||||
};
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||||
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||||
static const uint32_t icl_planar_formats[] = {
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||||
DRM_FORMAT_C8,
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||||
DRM_FORMAT_RGB565,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_XBGR8888,
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||||
DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XRGB2101010,
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||||
DRM_FORMAT_XBGR2101010,
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||||
DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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||||
DRM_FORMAT_UYVY,
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||||
DRM_FORMAT_VYUY,
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DRM_FORMAT_NV12,
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||||
DRM_FORMAT_P010,
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||||
DRM_FORMAT_P012,
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DRM_FORMAT_P016,
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||||
DRM_FORMAT_Y210,
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DRM_FORMAT_Y212,
|
||||
DRM_FORMAT_Y216,
|
||||
DRM_FORMAT_Y410,
|
||||
DRM_FORMAT_Y412,
|
||||
DRM_FORMAT_Y416,
|
||||
};
|
||||
|
||||
static const u64 skl_plane_format_modifiers_noccs[] = {
|
||||
I915_FORMAT_MOD_Yf_TILED,
|
||||
I915_FORMAT_MOD_Y_TILED,
|
||||
|
@ -1945,6 +2023,15 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
|
|||
case DRM_FORMAT_UYVY:
|
||||
case DRM_FORMAT_VYUY:
|
||||
case DRM_FORMAT_NV12:
|
||||
case DRM_FORMAT_P010:
|
||||
case DRM_FORMAT_P012:
|
||||
case DRM_FORMAT_P016:
|
||||
case DRM_FORMAT_Y210:
|
||||
case DRM_FORMAT_Y212:
|
||||
case DRM_FORMAT_Y216:
|
||||
case DRM_FORMAT_Y410:
|
||||
case DRM_FORMAT_Y412:
|
||||
case DRM_FORMAT_Y416:
|
||||
if (modifier == I915_FORMAT_MOD_Yf_TILED)
|
||||
return true;
|
||||
/* fall through */
|
||||
|
@ -2085,8 +2172,19 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
|
|||
plane->update_slave = icl_update_slave;
|
||||
|
||||
if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
|
||||
formats = skl_planar_formats;
|
||||
num_formats = ARRAY_SIZE(skl_planar_formats);
|
||||
if (INTEL_GEN(dev_priv) >= 11) {
|
||||
formats = icl_planar_formats;
|
||||
num_formats = ARRAY_SIZE(icl_planar_formats);
|
||||
} else if (INTEL_GEN(dev_priv) == 10 || IS_GEMINILAKE(dev_priv)) {
|
||||
formats = glk_planar_formats;
|
||||
num_formats = ARRAY_SIZE(glk_planar_formats);
|
||||
} else {
|
||||
formats = skl_planar_formats;
|
||||
num_formats = ARRAY_SIZE(skl_planar_formats);
|
||||
}
|
||||
} else if (INTEL_GEN(dev_priv) >= 11) {
|
||||
formats = icl_plane_formats;
|
||||
num_formats = ARRAY_SIZE(icl_plane_formats);
|
||||
} else {
|
||||
formats = skl_plane_formats;
|
||||
num_formats = ARRAY_SIZE(skl_plane_formats);
|
||||
|
|
|
@ -153,6 +153,22 @@ extern "C" {
|
|||
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
|
||||
|
||||
/*
|
||||
* packed Y2xx indicate for each component, xx valid data occupy msb
|
||||
* 16-xx padding occupy lsb
|
||||
*/
|
||||
#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
|
||||
#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
|
||||
#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
|
||||
|
||||
/*
|
||||
* packed Y4xx indicate for each component, xx valid data occupy msb
|
||||
* 16-xx padding occupy lsb except Y410
|
||||
*/
|
||||
#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
|
||||
#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
|
||||
|
||||
/*
|
||||
* packed YCbCr420 2x2 tiled formats
|
||||
* first 64 bits will contain Y,Cb,Cr components for a 2x2 tile
|
||||
|
|
Loading…
Reference in a new issue