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drm/nouveau/bios: namespace + nvidia gpu names (no binary change) 

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
hifive-unleashed-5.1
Ben Skeggs 2015-01-14 14:40:03 +10:00
parent 245dcfe96f
commit d390b48027
74 changed files with 529 additions and 652 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/drm/nouveau/include/nvkm/core/os.h
View File

@ -193,5 +193,13 @@
#define _nouveau_xtensa_context_rd32 _nvkm_xtensa_context_rd32
#define _nouveau_xtensa_context_wr32 _nvkm_xtensa_context_wr32
#define nouveau_xtensa_intr nvkm_xtensa_intr
#define nouveau_gpio nvkm_gpio
#define nouveau_i2c nvkm_i2c
#define nouveau_i2c_port nvkm_i2c_port
#define nouveau_devinit nvkm_devinit
#define nouveau_bios nvkm_bios
#define nouveau_bios_oclass nvkm_bios_oclass
#define nouveau_pll_vals nvkm_pll_vals
#define nouveau_therm_trip_point nvkm_therm_trip_point
#endif

19
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios.h
View File

@ -1,11 +1,9 @@
#ifndef __NOUVEAU_BIOS_H__
#define __NOUVEAU_BIOS_H__
#ifndef __NVKM_BIOS_H__
#define __NVKM_BIOS_H__
#include <core/subdev.h>
#include <core/device.h>
struct nouveau_bios {
struct nouveau_subdev base;
struct nvkm_bios {
struct nvkm_subdev base;
u32 size;
u8 *data;
@ -21,15 +19,14 @@ struct nouveau_bios {
} version;
};
static inline struct nouveau_bios *
nouveau_bios(void *obj)
static inline struct nvkm_bios *
nvkm_bios(void *obj)
{
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_VBIOS);
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_VBIOS);
}
u8 nvbios_checksum(const u8 *data, int size);
u16 nvbios_findstr(const u8 *data, int size, const char *str, int len);
extern struct nouveau_oclass nouveau_bios_oclass;
extern struct nvkm_oclass nvkm_bios_oclass;
#endif

12
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/M0203.h
View File

@ -1,14 +1,13 @@
#ifndef __NVBIOS_M0203_H__
#define __NVBIOS_M0203_H__
struct nvbios_M0203T {
#define M0203T_TYPE_RAMCFG 0x00
u8 type;
u16 pointer;
};
u32 nvbios_M0203Te(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_M0203Tp(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
u32 nvbios_M0203Te(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_M0203Tp(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_M0203T *);
struct nvbios_M0203E {
@ -22,10 +21,9 @@ struct nvbios_M0203E {
u8 group;
};
u32 nvbios_M0203Ee(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_M0203Ep(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr,
u32 nvbios_M0203Ee(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_M0203Ep(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
struct nvbios_M0203E *);
u32 nvbios_M0203Em(struct nouveau_bios *, u8 ramcfg, u8 *ver, u8 *hdr,
u32 nvbios_M0203Em(struct nvkm_bios *, u8 ramcfg, u8 *ver, u8 *hdr,
struct nvbios_M0203E *);
#endif

17
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/M0205.h
View File

@ -1,13 +1,12 @@
#ifndef __NVBIOS_M0205_H__
#define __NVBIOS_M0205_H__
struct nvbios_M0205T {
u16 freq;
};
u32 nvbios_M0205Te(struct nouveau_bios *,
u32 nvbios_M0205Te(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
u32 nvbios_M0205Tp(struct nouveau_bios *,
u32 nvbios_M0205Tp(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz,
struct nvbios_M0205T *);
@ -15,18 +14,16 @@ struct nvbios_M0205E {
u8 type;
};
u32 nvbios_M0205Ee(struct nouveau_bios *, int idx,
u32 nvbios_M0205Ee(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_M0205Ep(struct nouveau_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_M0205E *);
u32 nvbios_M0205Ep(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0205E *);
struct nvbios_M0205S {
u8 data;
};
u32 nvbios_M0205Se(struct nouveau_bios *, int ent, int idx, u8 *ver, u8 *hdr);
u32 nvbios_M0205Sp(struct nouveau_bios *, int ent, int idx, u8 *ver, u8 *hdr,
u32 nvbios_M0205Se(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr);
u32 nvbios_M0205Sp(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr,
struct nvbios_M0205S *);
#endif

15
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/M0209.h
View File

@ -1,7 +1,6 @@
#ifndef __NVBIOS_M0209_H__
#define __NVBIOS_M0209_H__
u32 nvbios_M0209Te(struct nouveau_bios *,
u32 nvbios_M0209Te(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
struct nvbios_M0209E {
@ -13,18 +12,16 @@ struct nvbios_M0209E {
u8 v03;
};
u32 nvbios_M0209Ee(struct nouveau_bios *, int idx,
u32 nvbios_M0209Ee(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_M0209Ep(struct nouveau_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_M0209E *);
u32 nvbios_M0209Ep(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0209E *);
struct nvbios_M0209S {
u32 data[0x200];
};
u32 nvbios_M0209Se(struct nouveau_bios *, int ent, int idx, u8 *ver, u8 *hdr);
u32 nvbios_M0209Sp(struct nouveau_bios *, int ent, int idx, u8 *ver, u8 *hdr,
u32 nvbios_M0209Se(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr);
u32 nvbios_M0209Sp(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr,
struct nvbios_M0209S *);
#endif

12
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/P0260.h
View File

@ -1,23 +1,21 @@
#ifndef __NVBIOS_P0260_H__
#define __NVBIOS_P0260_H__
u32 nvbios_P0260Te(struct nouveau_bios *,
u32 nvbios_P0260Te(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz);
struct nvbios_P0260E {
u32 data;
};
u32 nvbios_P0260Ee(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_P0260Ep(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr,
u32 nvbios_P0260Ee(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_P0260Ep(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
struct nvbios_P0260E *);
struct nvbios_P0260X {
u32 data;
};
u32 nvbios_P0260Xe(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_P0260Xp(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr,
u32 nvbios_P0260Xe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_P0260Xp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
struct nvbios_P0260X *);
#endif

4
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/bit.h
View File

@ -1,6 +1,5 @@
#ifndef __NVBIOS_BIT_H__
#define __NVBIOS_BIT_H__
struct bit_entry {
u8 id;
u8 version;
@ -8,6 +7,5 @@ struct bit_entry {
u16 offset;
};
int bit_entry(struct nouveau_bios *, u8 id, struct bit_entry *);
int bit_entry(struct nvkm_bios *, u8 id, struct bit_entry *);
#endif

10
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/bmp.h
View File

@ -1,8 +1,7 @@
#ifndef __NVBIOS_BMP_H__
#define __NVBIOS_BMP_H__
static inline u16
bmp_version(struct nouveau_bios *bios)
bmp_version(struct nvkm_bios *bios)
{
if (bios->bmp_offset) {
return nv_ro08(bios, bios->bmp_offset + 5) << 8 |
@ -13,7 +12,7 @@ bmp_version(struct nouveau_bios *bios)
}
static inline u16
bmp_mem_init_table(struct nouveau_bios *bios)
bmp_mem_init_table(struct nvkm_bios *bios)
{
if (bmp_version(bios) >= 0x0300)
return nv_ro16(bios, bios->bmp_offset + 24);
@ -21,7 +20,7 @@ bmp_mem_init_table(struct nouveau_bios *bios)
}
static inline u16
bmp_sdr_seq_table(struct nouveau_bios *bios)
bmp_sdr_seq_table(struct nvkm_bios *bios)
{
if (bmp_version(bios) >= 0x0300)
return nv_ro16(bios, bios->bmp_offset + 26);
@ -29,11 +28,10 @@ bmp_sdr_seq_table(struct nouveau_bios *bios)
}
static inline u16
bmp_ddr_seq_table(struct nouveau_bios *bios)
bmp_ddr_seq_table(struct nvkm_bios *bios)
{
if (bmp_version(bios) >= 0x0300)
return nv_ro16(bios, bios->bmp_offset + 28);
return 0x0000;
}
#endif

14
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/boost.h
View File

@ -1,7 +1,6 @@
#ifndef __NVBIOS_BOOST_H__
#define __NVBIOS_BOOST_H__
u16 nvbios_boostTe(struct nouveau_bios *, u8 *, u8 *, u8 *, u8 *, u8 *, u8 *);
u16 nvbios_boostTe(struct nvkm_bios *, u8 *, u8 *, u8 *, u8 *, u8 *, u8 *);
struct nvbios_boostE {
u8 pstate;
@ -9,10 +8,10 @@ struct nvbios_boostE {
u32 max;
};
u16 nvbios_boostEe(struct nouveau_bios *, int idx, u8 *, u8 *, u8 *, u8 *);
u16 nvbios_boostEp(struct nouveau_bios *, int idx, u8 *, u8 *, u8 *, u8 *,
u16 nvbios_boostEe(struct nvkm_bios *, int idx, u8 *, u8 *, u8 *, u8 *);
u16 nvbios_boostEp(struct nvkm_bios *, int idx, u8 *, u8 *, u8 *, u8 *,
struct nvbios_boostE *);
u16 nvbios_boostEm(struct nouveau_bios *, u8, u8 *, u8 *, u8 *, u8 *,
u16 nvbios_boostEm(struct nvkm_bios *, u8, u8 *, u8 *, u8 *, u8 *,
struct nvbios_boostE *);
struct nvbios_boostS {
@ -22,8 +21,7 @@ struct nvbios_boostS {
u32 max;
};
u16 nvbios_boostSe(struct nouveau_bios *, int, u16, u8 *, u8 *, u8, u8);
u16 nvbios_boostSp(struct nouveau_bios *, int, u16, u8 *, u8 *, u8, u8,
u16 nvbios_boostSe(struct nvkm_bios *, int, u16, u8 *, u8 *, u8, u8);
u16 nvbios_boostSp(struct nvkm_bios *, int, u16, u8 *, u8 *, u8, u8,
struct nvbios_boostS *);
#endif

10
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/conn.h
View File

@ -1,6 +1,5 @@
#ifndef __NVBIOS_CONN_H__
#define __NVBIOS_CONN_H__
enum dcb_connector_type {
DCB_CONNECTOR_VGA = 0x00,
DCB_CONNECTOR_TV_0 = 0x10,
@ -25,8 +24,8 @@ enum dcb_connector_type {
struct nvbios_connT {
};
u32 nvbios_connTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_connTp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
u32 nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_connTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_connT *info);
struct nvbios_connE {
@ -39,8 +38,7 @@ struct nvbios_connE {
u8 lcdid;
};
u32 nvbios_connEe(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *hdr);
u32 nvbios_connEp(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *hdr,
u32 nvbios_connEe(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *hdr);
u32 nvbios_connEp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *hdr,
struct nvbios_connE *info);
#endif

14
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/cstep.h
View File

@ -1,7 +1,6 @@
#ifndef __NVBIOS_CSTEP_H__
#define __NVBIOS_CSTEP_H__
u16 nvbios_cstepTe(struct nouveau_bios *,
u16 nvbios_cstepTe(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz);
struct nvbios_cstepE {
@ -9,10 +8,10 @@ struct nvbios_cstepE {
u8 index;
};
u16 nvbios_cstepEe(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr);
u16 nvbios_cstepEp(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr,
u16 nvbios_cstepEe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
u16 nvbios_cstepEp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
struct nvbios_cstepE *);
u16 nvbios_cstepEm(struct nouveau_bios *, u8 pstate, u8 *ver, u8 *hdr,
u16 nvbios_cstepEm(struct nvkm_bios *, u8 pstate, u8 *ver, u8 *hdr,
struct nvbios_cstepE *);
struct nvbios_cstepX {
@ -21,8 +20,7 @@ struct nvbios_cstepX {
u8 voltage;
};
u16 nvbios_cstepXe(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr);
u16 nvbios_cstepXp(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr,
u16 nvbios_cstepXe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
u16 nvbios_cstepXp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
struct nvbios_cstepX *);
#endif

16
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h
View File

@ -1,8 +1,5 @@
#ifndef __NVBIOS_DCB_H__
#define __NVBIOS_DCB_H__
struct nouveau_bios;
enum dcb_output_type {
DCB_OUTPUT_ANALOG = 0x0,
DCB_OUTPUT_TV = 0x1,
@ -57,13 +54,12 @@ struct dcb_output {
bool i2c_upper_default;
};
u16 dcb_table(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *ent, u8 *len);
u16 dcb_outp(struct nouveau_bios *, u8 idx, u8 *ver, u8 *len);
u16 dcb_outp_parse(struct nouveau_bios *, u8 idx, u8 *, u8 *,
u16 dcb_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *ent, u8 *len);
u16 dcb_outp(struct nvkm_bios *, u8 idx, u8 *ver, u8 *len);
u16 dcb_outp_parse(struct nvkm_bios *, u8 idx, u8 *, u8 *,
struct dcb_output *);
u16 dcb_outp_match(struct nouveau_bios *, u16 type, u16 mask, u8 *, u8 *,
u16 dcb_outp_match(struct nvkm_bios *, u16 type, u16 mask, u8 *, u8 *,
struct dcb_output *);
int dcb_outp_foreach(struct nouveau_bios *, void *data, int (*exec)
(struct nouveau_bios *, void *, int index, u16 entry));
int dcb_outp_foreach(struct nvkm_bios *, void *data, int (*exec)
(struct nvkm_bios *, void *, int index, u16 entry));
#endif

37
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h
View File

@ -1,17 +1,14 @@
#ifndef __NVBIOS_DISP_H__
#define __NVBIOS_DISP_H__
u16 nvbios_disp_table(struct nouveau_bios *,
u16 nvbios_disp_table(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub);
struct nvbios_disp {
u16 data;
};
u16 nvbios_disp_entry(struct nouveau_bios *, u8 idx,
u8 *ver, u8 *hdr__, u8 *sub);
u16 nvbios_disp_parse(struct nouveau_bios *, u8 idx,
u8 *ver, u8 *hdr__, u8 *sub,
u16 nvbios_disp_entry(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub);
u16 nvbios_disp_parse(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub,
struct nvbios_disp *);
struct nvbios_outp {
@ -20,29 +17,23 @@ struct nvbios_outp {
u16 script[3];
};
u16 nvbios_outp_entry(struct nouveau_bios *, u8 idx,
u16 nvbios_outp_entry(struct nvkm_bios *, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_outp_parse(struct nouveau_bios *, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_outp *);
u16 nvbios_outp_match(struct nouveau_bios *, u16 type, u16 mask,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_outp *);
u16 nvbios_outp_parse(struct nvkm_bios *, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
u16 nvbios_outp_match(struct nvkm_bios *, u16 type, u16 mask,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
struct nvbios_ocfg {
u16 match;
u16 clkcmp[2];
};
u16 nvbios_ocfg_entry(struct nouveau_bios *, u16 outp, u8 idx,
u16 nvbios_ocfg_entry(struct nvkm_bios *, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_ocfg_parse(struct nouveau_bios *, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ocfg *);
u16 nvbios_ocfg_match(struct nouveau_bios *, u16 outp, u16 type,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ocfg *);
u16 nvbios_oclk_match(struct nouveau_bios *, u16 cmp, u32 khz);
u16 nvbios_ocfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
u16 nvbios_ocfg_match(struct nvkm_bios *, u16 outp, u16 type,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
u16 nvbios_oclk_match(struct nvkm_bios *, u16 cmp, u32 khz);
#endif

16
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dp.h
View File

@ -1,6 +1,5 @@
#ifndef __NVBIOS_DP_H__
#define __NVBIOS_DP_H__
struct nvbios_dpout {
u16 type;
u16 mask;
@ -9,10 +8,10 @@ struct nvbios_dpout {
u32 lnkcmp;
};
u16 nvbios_dpout_parse(struct nouveau_bios *, u8 idx,
u16 nvbios_dpout_parse(struct nvkm_bios *, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpout *);
u16 nvbios_dpout_match(struct nouveau_bios *, u16 type, u16 mask,
u16 nvbios_dpout_match(struct nvkm_bios *, u16 type, u16 mask,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpout *);
@ -24,12 +23,9 @@ struct nvbios_dpcfg {
};
u16
nvbios_dpcfg_parse(struct nouveau_bios *, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpcfg *);
nvbios_dpcfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_dpcfg *);
u16
nvbios_dpcfg_match(struct nouveau_bios *, u16 outp, u8 pc, u8 vs, u8 pe,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpcfg *);
nvbios_dpcfg_match(struct nvkm_bios *, u16 outp, u8 pc, u8 vs, u8 pe,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_dpcfg *);
#endif

9
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/extdev.h
View File

@ -1,8 +1,5 @@
#ifndef __NVBIOS_EXTDEV_H__
#define __NVBIOS_EXTDEV_H__
struct nouveau_bios;
enum nvbios_extdev_type {
NVBIOS_EXTDEV_LM89 = 0x02,
NVBIOS_EXTDEV_VT1103M = 0x40,
@ -20,11 +17,9 @@ struct nvbios_extdev_func {
};
int
nvbios_extdev_parse(struct nouveau_bios *, int, struct nvbios_extdev_func *);
nvbios_extdev_parse(struct nvkm_bios *, int, struct nvbios_extdev_func *);
int
nvbios_extdev_find(struct nouveau_bios *, enum nvbios_extdev_type,
nvbios_extdev_find(struct nvkm_bios *, enum nvbios_extdev_type,
struct nvbios_extdev_func *);
#endif

4
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/fan.h
View File

@ -1,8 +1,6 @@
#ifndef __NVBIOS_FAN_H__
#define __NVBIOS_FAN_H__
#include <subdev/bios/therm.h>
u16 nvbios_fan_parse(struct nouveau_bios *bios, struct nvbios_therm_fan *fan);
u16 nvbios_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan);
#endif

10
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/gpio.h
View File

@ -1,6 +1,5 @@
#ifndef __NVBIOS_GPIO_H__
#define __NVBIOS_GPIO_H__
enum dcb_gpio_func_name {
DCB_GPIO_PANEL_POWER = 0x01,
DCB_GPIO_TVDAC0 = 0x0c,
@ -38,11 +37,10 @@ struct dcb_gpio_func {
u8 param;
};
u16 dcb_gpio_table(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 dcb_gpio_entry(struct nouveau_bios *, int idx, int ent, u8 *ver, u8 *len);
u16 dcb_gpio_parse(struct nouveau_bios *, int idx, int ent, u8 *ver, u8 *len,
u16 dcb_gpio_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 dcb_gpio_entry(struct nvkm_bios *, int idx, int ent, u8 *ver, u8 *len);
u16 dcb_gpio_parse(struct nvkm_bios *, int idx, int ent, u8 *ver, u8 *len,
struct dcb_gpio_func *);
u16 dcb_gpio_match(struct nouveau_bios *, int idx, u8 func, u8 line,
u16 dcb_gpio_match(struct nvkm_bios *, int idx, u8 func, u8 line,
u8 *ver, u8 *len, struct dcb_gpio_func *);
#endif

10
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/i2c.h
View File

@ -1,8 +1,5 @@
#ifndef __NVBIOS_I2C_H__
#define __NVBIOS_I2C_H__
struct nouveau_bios;
enum dcb_i2c_type {
/* matches bios type field prior to ccb 4.1 */
DCB_I2C_NV04_BIT = 0x00,
@ -22,8 +19,7 @@ struct dcb_i2c_entry {
u8 auxch;
};
u16 dcb_i2c_table(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 dcb_i2c_entry(struct nouveau_bios *, u8 index, u8 *ver, u8 *len);
int dcb_i2c_parse(struct nouveau_bios *, u8 index, struct dcb_i2c_entry *);
u16 dcb_i2c_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 dcb_i2c_entry(struct nvkm_bios *, u8 index, u8 *ver, u8 *len);
int dcb_i2c_parse(struct nvkm_bios *, u8 index, struct dcb_i2c_entry *);
#endif

4
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/image.h
View File

@ -1,6 +1,5 @@
#ifndef __NVBIOS_IMAGE_H__
#define __NVBIOS_IMAGE_H__
struct nvbios_image {
u32 base;
u32 size;
@ -8,6 +7,5 @@ struct nvbios_image {
bool last;
};
bool nvbios_image(struct nouveau_bios *, int, struct nvbios_image *);
bool nvbios_image(struct nvkm_bios *, int, struct nvbios_image *);
#endif

8
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/init.h
View File

@ -1,9 +1,8 @@
#ifndef __NVBIOS_INIT_H__
#define __NVBIOS_INIT_H__
struct nvbios_init {
struct nouveau_subdev *subdev;
struct nouveau_bios *bios;
struct nvkm_subdev *subdev;
struct nvkm_bios *bios;
u16 offset;
struct dcb_output *outp;
int crtc;
@ -17,6 +16,5 @@ struct nvbios_init {
};
int nvbios_exec(struct nvbios_init *);
int nvbios_init(struct nouveau_subdev *, bool execute);
int nvbios_init(struct nvkm_subdev *, bool execute);
#endif

9
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/mxm.h
View File

@ -1,9 +1,6 @@
#ifndef __NVBIOS_MXM_H__
#define __NVBIOS_MXM_H__
u16 mxm_table(struct nouveau_bios *, u8 *ver, u8 *hdr);
u8 mxm_sor_map(struct nouveau_bios *, u8 conn);
u8 mxm_ddc_map(struct nouveau_bios *, u8 port);
u16 mxm_table(struct nvkm_bios *, u8 *ver, u8 *hdr);
u8 mxm_sor_map(struct nvkm_bios *, u8 conn);
u8 mxm_ddc_map(struct nvkm_bios *, u8 port);
#endif

6
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/npde.h
View File

@ -1,12 +1,10 @@
#ifndef __NVBIOS_NPDE_H__
#define __NVBIOS_NPDE_H__
struct nvbios_npdeT {
u32 image_size;
bool last;
};
u32 nvbios_npdeTe(struct nouveau_bios *, u32);
u32 nvbios_npdeTp(struct nouveau_bios *, u32, struct nvbios_npdeT *);
u32 nvbios_npdeTe(struct nvkm_bios *, u32);
u32 nvbios_npdeTp(struct nvkm_bios *, u32, struct nvbios_npdeT *);
#endif

6
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pcir.h
View File

@ -1,6 +1,5 @@
#ifndef __NVBIOS_PCIR_H__
#define __NVBIOS_PCIR_H__
struct nvbios_pcirT {
u16 vendor_id;
u16 device_id;
@ -11,8 +10,7 @@ struct nvbios_pcirT {
bool last;
};
u32 nvbios_pcirTe(struct nouveau_bios *, u32, u8 *ver, u16 *hdr);
u32 nvbios_pcirTp(struct nouveau_bios *, u32, u8 *ver, u16 *hdr,
u32 nvbios_pcirTe(struct nvkm_bios *, u32, u8 *ver, u16 *hdr);
u32 nvbios_pcirTp(struct nvkm_bios *, u32, u8 *ver, u16 *hdr,
struct nvbios_pcirT *);
#endif

18
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h
View File

@ -1,9 +1,6 @@
#ifndef __NVBIOS_PERF_H__
#define __NVBIOS_PERF_H__
struct nouveau_bios;
u16 nvbios_perf_table(struct nouveau_bios *, u8 *ver, u8 *hdr,
u16 nvbios_perf_table(struct nvkm_bios *, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
struct nvbios_perfE {
@ -18,9 +15,9 @@ struct nvbios_perfE {
u32 script;
};
u16 nvbios_perf_entry(struct nouveau_bios *, int idx,
u16 nvbios_perf_entry(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_perfEp(struct nouveau_bios *, int idx,
u16 nvbios_perfEp(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_perfE *);
struct nvbios_perfS {
@ -31,17 +28,14 @@ struct nvbios_perfS {
};
};
u32 nvbios_perfSe(struct nouveau_bios *, u32 data, int idx,
u32 nvbios_perfSe(struct nvkm_bios *, u32 data, int idx,
u8 *ver, u8 *hdr, u8 cnt, u8 len);
u32 nvbios_perfSp(struct nouveau_bios *, u32 data, int idx,
u32 nvbios_perfSp(struct nvkm_bios *, u32 data, int idx,
u8 *ver, u8 *hdr, u8 cnt, u8 len, struct nvbios_perfS *);
struct nvbios_perf_fan {
u32 pwm_divisor;
};
int
nvbios_perf_fan_parse(struct nouveau_bios *, struct nvbios_perf_fan *);
int nvbios_perf_fan_parse(struct nvkm_bios *, struct nvbios_perf_fan *);
#endif

10
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h
View File

@ -1,8 +1,7 @@
#ifndef __NVBIOS_PLL_H__
#define __NVBIOS_PLL_H__
/*XXX: kill me */
struct nouveau_pll_vals {
struct nvkm_pll_vals {
union {
struct {
#ifdef __BIG_ENDIAN
@ -20,10 +19,8 @@ struct nouveau_pll_vals {
int refclk;
};
struct nouveau_bios;
/* these match types in pll limits table version 0x40,
* nouveau uses them on all chipsets internally where a
* nvkm uses them on all chipsets internally where a
* specific pll needs to be referenced, but the exact
* register isn't known.
*/
@ -74,6 +71,5 @@ struct nvbios_pll {
} vco1, vco2;
};
int nvbios_pll_parse(struct nouveau_bios *, u32 type, struct nvbios_pll *);
int nvbios_pll_parse(struct nvkm_bios *, u32 type, struct nvbios_pll *);
#endif

12
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pmu.h
View File

@ -1,11 +1,10 @@
#ifndef __NVBIOS_PMU_H__
#define __NVBIOS_PMU_H__
struct nvbios_pmuT {
};
u32 nvbios_pmuTe(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_pmuTp(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
u32 nvbios_pmuTe(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_pmuTp(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_pmuT *);
struct nvbios_pmuE {
@ -13,8 +12,8 @@ struct nvbios_pmuE {
u32 data;
};
u32 nvbios_pmuEe(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_pmuEp(struct nouveau_bios *, int idx, u8 *ver, u8 *hdr,
u32 nvbios_pmuEe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
u32 nvbios_pmuEp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
struct nvbios_pmuE *);
struct nvbios_pmuR {
@ -32,6 +31,5 @@ struct nvbios_pmuR {
u32 args_addr_pmu;
};
bool nvbios_pmuRm(struct nouveau_bios *, u8 type, struct nvbios_pmuR *);
bool nvbios_pmuRm(struct nvkm_bios *, u8 type, struct nvbios_pmuR *);
#endif

8
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h
View File

@ -1,8 +1,5 @@
#ifndef __NVBIOS_RAMCFG_H__
#define __NVBIOS_RAMCFG_H__
struct nouveau_bios;
struct nvbios_ramcfg {
unsigned rammap_ver;
unsigned rammap_hdr;
@ -139,7 +136,6 @@ struct nvbios_ramcfg {
};
};
u8 nvbios_ramcfg_count(struct nouveau_bios *);
u8 nvbios_ramcfg_index(struct nouveau_subdev *);
u8 nvbios_ramcfg_count(struct nvkm_bios *);
u8 nvbios_ramcfg_index(struct nvkm_subdev *);
#endif

25
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/rammap.h
View File

@ -1,26 +1,21 @@
#ifndef __NVBIOS_RAMMAP_H__
#define __NVBIOS_RAMMAP_H__
#include <subdev/bios/ramcfg.h>
struct nvbios_ramcfg;
u32 nvbios_rammapTe(struct nouveau_bios *, u8 *ver, u8 *hdr,
u32 nvbios_rammapTe(struct nvkm_bios *, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
u32 nvbios_rammapEe(struct nouveau_bios *, int idx,
u32 nvbios_rammapEe(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u32 nvbios_rammapEp(struct nouveau_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ramcfg *);
u32 nvbios_rammapEm(struct nouveau_bios *, u16 mhz,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ramcfg *);
u32 nvbios_rammapEp(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
u32 nvbios_rammapEm(struct nvkm_bios *, u16 mhz,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
u32 nvbios_rammapSe(struct nouveau_bios *, u32 data,
u32 nvbios_rammapSe(struct nvkm_bios *, u32 data,
u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx,
u8 *ver, u8 *hdr);
u32 nvbios_rammapSp(struct nouveau_bios *, u32 data,
u32 nvbios_rammapSp(struct nvkm_bios *, u32 data,
u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx,
u8 *ver, u8 *hdr,
struct nvbios_ramcfg *);
u8 *ver, u8 *hdr, struct nvbios_ramcfg *);
#endif

15
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/therm.h
View File

@ -1,8 +1,5 @@
#ifndef __NVBIOS_THERM_H__
#define __NVBIOS_THERM_H__
struct nouveau_bios;
struct nvbios_therm_threshold {
u8 temp;
u8 hysteresis;
@ -30,8 +27,8 @@ enum nvbios_therm_fan_type {
};
/* no vbios have more than 6 */
#define NOUVEAU_TEMP_FAN_TRIP_MAX 10
struct nouveau_therm_trip_point {
#define NVKM_TEMP_FAN_TRIP_MAX 10
struct nvbios_therm_trip_point {
int fan_duty;
int temp;
int hysteresis;
@ -55,7 +52,7 @@ struct nvbios_therm_fan {
u16 slow_down_period;
enum nvbios_therm_fan_mode fan_mode;
struct nouveau_therm_trip_point trip[NOUVEAU_TEMP_FAN_TRIP_MAX];
struct nvbios_therm_trip_point trip[NVKM_TEMP_FAN_TRIP_MAX];
u8 nr_fan_trip;
u8 linear_min_temp;
u8 linear_max_temp;
@ -67,11 +64,9 @@ enum nvbios_therm_domain {
};
int
nvbios_therm_sensor_parse(struct nouveau_bios *, enum nvbios_therm_domain,
nvbios_therm_sensor_parse(struct nvkm_bios *, enum nvbios_therm_domain,
struct nvbios_therm_sensor *);
int
nvbios_therm_fan_parse(struct nouveau_bios *, struct nvbios_therm_fan *);
nvbios_therm_fan_parse(struct nvkm_bios *, struct nvbios_therm_fan *);
#endif

13
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/timing.h
View File

@ -1,14 +1,11 @@
#ifndef __NVBIOS_TIMING_H__
#define __NVBIOS_TIMING_H__
#include <subdev/bios/ramcfg.h>
struct nvbios_ramcfg;
u16 nvbios_timingTe(struct nouveau_bios *,
u16 nvbios_timingTe(struct nvkm_bios *,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
u16 nvbios_timingEe(struct nouveau_bios *, int idx,
u16 nvbios_timingEe(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_timingEp(struct nouveau_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ramcfg *);
u16 nvbios_timingEp(struct nvkm_bios *, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
#endif

12
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/vmap.h
View File

@ -1,13 +1,10 @@
#ifndef __NVBIOS_VMAP_H__
#define __NVBIOS_VMAP_H__
struct nouveau_bios;
struct nvbios_vmap {
};
u16 nvbios_vmap_table(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_vmap_parse(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
u16 nvbios_vmap_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_vmap_parse(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_vmap *);
struct nvbios_vmap_entry {
@ -18,8 +15,7 @@ struct nvbios_vmap_entry {
s32 arg[6];
};
u16 nvbios_vmap_entry(struct nouveau_bios *, int idx, u8 *ver, u8 *len);
u16 nvbios_vmap_entry_parse(struct nouveau_bios *, int idx, u8 *ver, u8 *len,
u16 nvbios_vmap_entry(struct nvkm_bios *, int idx, u8 *ver, u8 *len);
u16 nvbios_vmap_entry_parse(struct nvkm_bios *, int idx, u8 *ver, u8 *len,
struct nvbios_vmap_entry *);
#endif

12
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/volt.h
View File

@ -1,8 +1,5 @@
#ifndef __NVBIOS_VOLT_H__
#define __NVBIOS_VOLT_H__
struct nouveau_bios;
struct nvbios_volt {
u8 vidmask;
u32 min;
@ -11,8 +8,8 @@ struct nvbios_volt {
s16 step;
};
u16 nvbios_volt_table(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_volt_parse(struct nouveau_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
u16 nvbios_volt_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 nvbios_volt_parse(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_volt *);
struct nvbios_volt_entry {
@ -20,8 +17,7 @@ struct nvbios_volt_entry {
u8 vid;
};
u16 nvbios_volt_entry(struct nouveau_bios *, int idx, u8 *ver, u8 *len);
u16 nvbios_volt_entry_parse(struct nouveau_bios *, int idx, u8 *ver, u8 *len,
u16 nvbios_volt_entry(struct nvkm_bios *, int idx, u8 *ver, u8 *len);
u16 nvbios_volt_entry_parse(struct nvkm_bios *, int idx, u8 *ver, u8 *len,
struct nvbios_volt_entry *);
#endif

5
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/xpio.h
View File

@ -11,9 +11,8 @@ struct nvbios_xpio {
u8 flags;
};
u16 dcb_xpio_table(struct nouveau_bios *, u8 idx,
u16 dcb_xpio_table(struct nvkm_bios *, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
u16 dcb_xpio_parse(struct nouveau_bios *, u8 idx,
u16 dcb_xpio_parse(struct nvkm_bios *, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_xpio *);
#endif

1
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
View File

@ -108,6 +108,7 @@ extern struct nouveau_oclass *nve0_fb_oclass;
extern struct nouveau_oclass *gk20a_fb_oclass;
extern struct nouveau_oclass *gm107_fb_oclass;
#include <subdev/bios.h>
#include <subdev/bios/ramcfg.h>
struct nouveau_ram_data {

11
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/M0203.h>
u32
nvbios_M0203Te(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_M0203Te(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_M;
u32 data = 0x00000000;
@ -53,7 +52,7 @@ nvbios_M0203Te(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u32
nvbios_M0203Tp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
nvbios_M0203Tp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_M0203T *info)
{
u32 data = nvbios_M0203Te(bios, ver, hdr, cnt, len);
@ -70,7 +69,7 @@ nvbios_M0203Tp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
}
u32
nvbios_M0203Ee(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
nvbios_M0203Ee(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr)
{
u8 cnt, len;
u32 data = nvbios_M0203Te(bios, ver, hdr, &cnt, &len);
@ -83,7 +82,7 @@ nvbios_M0203Ee(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
}
u32
nvbios_M0203Ep(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
nvbios_M0203Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
struct nvbios_M0203E *info)
{
u32 data = nvbios_M0203Ee(bios, idx, ver, hdr);
@ -101,7 +100,7 @@ nvbios_M0203Ep(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
}
u32
nvbios_M0203Em(struct nouveau_bios *bios, u8 ramcfg, u8 *ver, u8 *hdr,
nvbios_M0203Em(struct nvkm_bios *bios, u8 ramcfg, u8 *ver, u8 *hdr,
struct nvbios_M0203E *info)
{
struct nvbios_M0203T M0203T;

13
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0205.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/M0205.h>
u32
nvbios_M0205Te(struct nouveau_bios *bios,
nvbios_M0205Te(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_M;
@ -56,7 +55,7 @@ nvbios_M0205Te(struct nouveau_bios *bios,
}
u32
nvbios_M0205Tp(struct nouveau_bios *bios,
nvbios_M0205Tp(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz,
struct nvbios_M0205T *info)
{
@ -73,7 +72,7 @@ nvbios_M0205Tp(struct nouveau_bios *bios,
}
u32
nvbios_M0205Ee(struct nouveau_bios *bios, int idx,
nvbios_M0205Ee(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u8 snr, ssz;
@ -89,7 +88,7 @@ nvbios_M0205Ee(struct nouveau_bios *bios, int idx,
}
u32
nvbios_M0205Ep(struct nouveau_bios *bios, int idx,
nvbios_M0205Ep(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_M0205E *info)
{
@ -106,7 +105,7 @@ nvbios_M0205Ep(struct nouveau_bios *bios, int idx,
}
u32
nvbios_M0205Se(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
nvbios_M0205Se(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
{
u8 cnt, len;
@ -120,7 +119,7 @@ nvbios_M0205Se(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
}
u32
nvbios_M0205Sp(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
nvbios_M0205Sp(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
struct nvbios_M0205S *info)
{
u32 data = nvbios_M0205Se(bios, ent, idx, ver, hdr);

14
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/M0209.h>
u32
nvbios_M0209Te(struct nouveau_bios *bios,
nvbios_M0209Te(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_M;
@ -56,7 +55,7 @@ nvbios_M0209Te(struct nouveau_bios *bios,
}
u32
nvbios_M0209Ee(struct nouveau_bios *bios, int idx,
nvbios_M0209Ee(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u8 snr, ssz;
@ -72,9 +71,8 @@ nvbios_M0209Ee(struct nouveau_bios *bios, int idx,
}
u32
nvbios_M0209Ep(struct nouveau_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_M0209E *info)
nvbios_M0209Ep(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0209E *info)
{
u32 data = nvbios_M0209Ee(bios, idx, ver, hdr, cnt, len);
memset(info, 0x00, sizeof(*info));
@ -94,7 +92,7 @@ nvbios_M0209Ep(struct nouveau_bios *bios, int idx,
}
u32
nvbios_M0209Se(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
nvbios_M0209Se(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
{
u8 cnt, len;
@ -108,7 +106,7 @@ nvbios_M0209Se(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
}
u32
nvbios_M0209Sp(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
nvbios_M0209Sp(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
struct nvbios_M0209S *info)
{
struct nvbios_M0209E M0209E;

12
drivers/gpu/drm/nouveau/nvkm/subdev/bios/P0260.c
View File

@ -21,14 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/bios/P0260.h>
u32
nvbios_P0260Te(struct nouveau_bios *bios,
nvbios_P0260Te(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz)
{
struct bit_entry bit_P;
@ -57,7 +55,7 @@ nvbios_P0260Te(struct nouveau_bios *bios,
}
u32
nvbios_P0260Ee(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
nvbios_P0260Ee(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
{
u8 hdr, cnt, xnr, xsz;
u32 data = nvbios_P0260Te(bios, ver, &hdr, &cnt, len, &xnr, &xsz);
@ -67,7 +65,7 @@ nvbios_P0260Ee(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
}
u32
nvbios_P0260Ep(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len,
nvbios_P0260Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len,
struct nvbios_P0260E *info)
{
u32 data = nvbios_P0260Ee(bios, idx, ver, len);
@ -83,7 +81,7 @@ nvbios_P0260Ep(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len,
}
u32
nvbios_P0260Xe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *xsz)
nvbios_P0260Xe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *xsz)
{
u8 hdr, cnt, len, xnr;
u32 data = nvbios_P0260Te(bios, ver, &hdr, &cnt, &len, &xnr, xsz);
@ -93,7 +91,7 @@ nvbios_P0260Xe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *xsz)
}
u32
nvbios_P0260Xp(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
nvbios_P0260Xp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
struct nvbios_P0260X *info)
{
u32 data = nvbios_P0260Xe(bios, idx, ver, hdr);

91
drivers/gpu/drm/nouveau/nvkm/subdev/bios/base.c
View File

@ -21,18 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <core/object.h>
#include <core/device.h>
#include <core/subdev.h>
#include <core/option.h>
#include "priv.h"
#include <subdev/bios.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/bit.h>
#include "priv.h"
u8
nvbios_checksum(const u8 *data, int size)
{
@ -59,7 +53,7 @@ nvbios_findstr(const u8 *data, int size, const char *str, int len)
}
int
nvbios_extend(struct nouveau_bios *bios, u32 length)
nvbios_extend(struct nvkm_bios *bios, u32 length)
{
if (bios->size < length) {
u8 *prev = bios->data;
@ -76,59 +70,58 @@ nvbios_extend(struct nouveau_bios *bios, u32 length)
}
static u8
nouveau_bios_rd08(struct nouveau_object *object, u64 addr)
nvkm_bios_rd08(struct nvkm_object *object, u64 addr)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
return bios->data[addr];
}
static u16
nouveau_bios_rd16(struct nouveau_object *object, u64 addr)
nvkm_bios_rd16(struct nvkm_object *object, u64 addr)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
return get_unaligned_le16(&bios->data[addr]);
}
static u32
nouveau_bios_rd32(struct nouveau_object *object, u64 addr)
nvkm_bios_rd32(struct nvkm_object *object, u64 addr)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
return get_unaligned_le32(&bios->data[addr]);
}
static void
nouveau_bios_wr08(struct nouveau_object *object, u64 addr, u8 data)
nvkm_bios_wr08(struct nvkm_object *object, u64 addr, u8 data)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
bios->data[addr] = data;
}
static void
nouveau_bios_wr16(struct nouveau_object *object, u64 addr, u16 data)
nvkm_bios_wr16(struct nvkm_object *object, u64 addr, u16 data)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
put_unaligned_le16(data, &bios->data[addr]);
}
static void
nouveau_bios_wr32(struct nouveau_object *object, u64 addr, u32 data)
nvkm_bios_wr32(struct nvkm_object *object, u64 addr, u32 data)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
put_unaligned_le32(data, &bios->data[addr]);
}
static int
nouveau_bios_ctor(struct nouveau_object *parent,
struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
nvkm_bios_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nouveau_bios *bios;
struct nvkm_bios *bios;
struct bit_entry bit_i;
int ret;
ret = nouveau_subdev_create(parent, engine, oclass, 0,
"VBIOS", "bios", &bios);
ret = nvkm_subdev_create(parent, engine, oclass, 0,
"VBIOS", "bios", &bios);
*pobject = nv_object(bios);
if (ret)
return ret;
@ -174,40 +167,40 @@ nouveau_bios_ctor(struct nouveau_object *parent,
}
static void
nouveau_bios_dtor(struct nouveau_object *object)
nvkm_bios_dtor(struct nvkm_object *object)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
kfree(bios->data);
nouveau_subdev_destroy(&bios->base);
nvkm_subdev_destroy(&bios->base);
}
static int
nouveau_bios_init(struct nouveau_object *object)
nvkm_bios_init(struct nvkm_object *object)
{
struct nouveau_bios *bios = (void *)object;
return nouveau_subdev_init(&bios->base);
struct nvkm_bios *bios = (void *)object;
return nvkm_subdev_init(&bios->base);
}
static int
nouveau_bios_fini(struct nouveau_object *object, bool suspend)
nvkm_bios_fini(struct nvkm_object *object, bool suspend)
{
struct nouveau_bios *bios = (void *)object;
return nouveau_subdev_fini(&bios->base, suspend);
struct nvkm_bios *bios = (void *)object;
return nvkm_subdev_fini(&bios->base, suspend);
}
struct nouveau_oclass
nouveau_bios_oclass = {
struct nvkm_oclass
nvkm_bios_oclass = {
.handle = NV_SUBDEV(VBIOS, 0x00),
.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nouveau_bios_ctor,
.dtor = nouveau_bios_dtor,
.init = nouveau_bios_init,
.fini = nouveau_bios_fini,
.rd08 = nouveau_bios_rd08,
.rd16 = nouveau_bios_rd16,
.rd32 = nouveau_bios_rd32,
.wr08 = nouveau_bios_wr08,
.wr16 = nouveau_bios_wr16,
.wr32 = nouveau_bios_wr32,
.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nvkm_bios_ctor,
.dtor = nvkm_bios_dtor,
.init = nvkm_bios_init,
.fini = nvkm_bios_fini,
.rd08 = nvkm_bios_rd08,
.rd16 = nvkm_bios_rd16,
.rd32 = nvkm_bios_rd32,
.wr08 = nvkm_bios_wr08,
.wr16 = nvkm_bios_wr16,
.wr32 = nvkm_bios_wr32,
},
};

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/bit.c
View File

@ -21,14 +21,11 @@
*
* Authors: Ben Skeggs
*/
#include "core/object.h"
#include "subdev/bios.h"
#include "subdev/bios/bit.h"
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
int
bit_entry(struct nouveau_bios *bios, u8 id, struct bit_entry *bit)
bit_entry(struct nvkm_bios *bios, u8 id, struct bit_entry *bit)
{
if (likely(bios->bit_offset)) {
u8 entries = nv_ro08(bios, bios->bit_offset + 10);

13
drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/boost.h>
u16
nvbios_boostTe(struct nouveau_bios *bios,
nvbios_boostTe(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
@ -57,7 +56,7 @@ nvbios_boostTe(struct nouveau_bios *bios,
}
u16
nvbios_boostEe(struct nouveau_bios *bios, int idx,
nvbios_boostEe(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u8 snr, ssz;
@ -73,7 +72,7 @@ nvbios_boostEe(struct nouveau_bios *bios, int idx,
}
u16
nvbios_boostEp(struct nouveau_bios *bios, int idx,
nvbios_boostEp(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_boostE *info)
{
u16 data = nvbios_boostEe(bios, idx, ver, hdr, cnt, len);
@ -87,7 +86,7 @@ nvbios_boostEp(struct nouveau_bios *bios, int idx,
}
u16
nvbios_boostEm(struct nouveau_bios *bios, u8 pstate,
nvbios_boostEm(struct nvkm_bios *bios, u8 pstate,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_boostE *info)
{
u32 data, idx = 0;
@ -99,7 +98,7 @@ nvbios_boostEm(struct nouveau_bios *bios, u8 pstate,
}
u16
nvbios_boostSe(struct nouveau_bios *bios, int idx,
nvbios_boostSe(struct nvkm_bios *bios, int idx,
u16 data, u8 *ver, u8 *hdr, u8 cnt, u8 len)
{
if (data && idx < cnt) {
@ -111,7 +110,7 @@ nvbios_boostSe(struct nouveau_bios *bios, int idx,
}
u16
nvbios_boostSp(struct nouveau_bios *bios, int idx,
nvbios_boostSp(struct nvkm_bios *bios, int idx,
u16 data, u8 *ver, u8 *hdr, u8 cnt, u8 len,
struct nvbios_boostS *info)
{

11
drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.c
View File

@ -21,15 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <core/device.h>
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/conn.h>
u32
nvbios_connTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u32 dcb = dcb_table(bios, ver, hdr, cnt, len);
if (dcb && *ver >= 0x30 && *hdr >= 0x16) {
@ -46,7 +43,7 @@ nvbios_connTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u32
nvbios_connTp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
nvbios_connTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_connT *info)
{
u32 data = nvbios_connTe(bios, ver, hdr, cnt, len);
@ -62,7 +59,7 @@ nvbios_connTp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
}
u32
nvbios_connEe(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len)
nvbios_connEe(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u32 data = nvbios_connTe(bios, ver, &hdr, &cnt, len);
@ -72,7 +69,7 @@ nvbios_connEe(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len)
}
u32
nvbios_connEp(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len,
nvbios_connEp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len,
struct nvbios_connE *info)
{
u32 data = nvbios_connEe(bios, idx, ver, len);

13
drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/cstep.h>
u16
nvbios_cstepTe(struct nouveau_bios *bios,
nvbios_cstepTe(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz)
{
struct bit_entry bit_P;
@ -57,7 +56,7 @@ nvbios_cstepTe(struct nouveau_bios *bios,
}
u16
nvbios_cstepEe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
nvbios_cstepEe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr)
{
u8 cnt, len, xnr, xsz;
u16 data = nvbios_cstepTe(bios, ver, hdr, &cnt, &len, &xnr, &xsz);
@ -70,7 +69,7 @@ nvbios_cstepEe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
}
u16
nvbios_cstepEp(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
nvbios_cstepEp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
struct nvbios_cstepE *info)
{
u16 data = nvbios_cstepEe(bios, idx, ver, hdr);
@ -83,7 +82,7 @@ nvbios_cstepEp(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
}
u16
nvbios_cstepEm(struct nouveau_bios *bios, u8 pstate, u8 *ver, u8 *hdr,
nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr,
struct nvbios_cstepE *info)
{
u32 data, idx = 0;
@ -95,7 +94,7 @@ nvbios_cstepEm(struct nouveau_bios *bios, u8 pstate, u8 *ver, u8 *hdr,
}
u16
nvbios_cstepXe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
nvbios_cstepXe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr)
{
u8 cnt, len, xnr, xsz;
u16 data = nvbios_cstepTe(bios, ver, hdr, &cnt, &len, &xnr, &xsz);
@ -108,7 +107,7 @@ nvbios_cstepXe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
}
u16
nvbios_cstepXp(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
nvbios_cstepXp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
struct nvbios_cstepX *info)
{
u16 data = nvbios_cstepXe(bios, idx, ver, hdr);

21
drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c
View File

@ -21,16 +21,15 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include "core/device.h"
#include "subdev/bios.h"
#include "subdev/bios/dcb.h"
#include <core/device.h>
u16
dcb_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
dcb_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct nouveau_device *device = nv_device(bios);
struct nvkm_device *device = nv_device(bios);
u16 dcb = 0x0000;
if (device->card_type > NV_04)
@ -98,7 +97,7 @@ dcb_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
dcb_outp(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len)
dcb_outp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u16 dcb = dcb_table(bios, ver, &hdr, &cnt, len);
@ -120,7 +119,7 @@ dcb_outp_hashm(struct dcb_output *outp)
}
u16
dcb_outp_parse(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len,
dcb_outp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len,
struct dcb_output *outp)
{
u16 dcb = dcb_outp(bios, idx, ver, len);
@ -194,7 +193,7 @@ dcb_outp_parse(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len,
}
u16
dcb_outp_match(struct nouveau_bios *bios, u16 type, u16 mask,
dcb_outp_match(struct nvkm_bios *bios, u16 type, u16 mask,
u8 *ver, u8 *len, struct dcb_output *outp)
{
u16 dcb, idx = 0;
@ -208,8 +207,8 @@ dcb_outp_match(struct nouveau_bios *bios, u16 type, u16 mask,
}
int
dcb_outp_foreach(struct nouveau_bios *bios, void *data,
int (*exec)(struct nouveau_bios *, void *, int, u16))
dcb_outp_foreach(struct nvkm_bios *bios, void *data,
int (*exec)(struct nvkm_bios *, void *, int, u16))
{
int ret, idx = -1;
u8 ver, len;

35
drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/disp.h>
u16
nvbios_disp_table(struct nouveau_bios *bios,
nvbios_disp_table(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub)
{
struct bit_entry U;
@ -57,8 +56,7 @@ nvbios_disp_table(struct nouveau_bios *bios,
}
u16
nvbios_disp_entry(struct nouveau_bios *bios, u8 idx,
u8 *ver, u8 *len, u8 *sub)
nvbios_disp_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub)
{
u8 hdr, cnt;
u16 data = nvbios_disp_table(bios, ver, &hdr, &cnt, len, sub);
@ -69,8 +67,7 @@ nvbios_disp_entry(struct nouveau_bios *bios, u8 idx,
}
u16
nvbios_disp_parse(struct nouveau_bios *bios, u8 idx,
u8 *ver, u8 *len, u8 *sub,
nvbios_disp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub,
struct nvbios_disp *info)
{
u16 data = nvbios_disp_entry(bios, idx, ver, len, sub);
@ -82,7 +79,7 @@ nvbios_disp_parse(struct nouveau_bios *bios, u8 idx,
}
u16
nvbios_outp_entry(struct nouveau_bios *bios, u8 idx,
nvbios_outp_entry(struct nvkm_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct nvbios_disp info;
@ -96,9 +93,8 @@ nvbios_outp_entry(struct nouveau_bios *bios, u8 idx,
}
u16
nvbios_outp_parse(struct nouveau_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_outp *info)
nvbios_outp_parse(struct nvkm_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *info)
{
u16 data = nvbios_outp_entry(bios, idx, ver, hdr, cnt, len);
if (data && *hdr >= 0x0a) {
@ -117,9 +113,8 @@ nvbios_outp_parse(struct nouveau_bios *bios, u8 idx,
}
u16
nvbios_outp_match(struct nouveau_bios *bios, u16 type, u16 mask,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_outp *info)
nvbios_outp_match(struct nvkm_bios *bios, u16 type, u16 mask,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *info)
{
u16 data, idx = 0;
while ((data = nvbios_outp_parse(bios, idx++, ver, hdr, cnt, len, info)) || *ver) {
@ -132,7 +127,7 @@ nvbios_outp_match(struct nouveau_bios *bios, u16 type, u16 mask,
}
u16
nvbios_ocfg_entry(struct nouveau_bios *bios, u16 outp, u8 idx,
nvbios_ocfg_entry(struct nvkm_bios *bios, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
if (idx < *cnt)
@ -141,9 +136,8 @@ nvbios_ocfg_entry(struct nouveau_bios *bios, u16 outp, u8 idx,
}
u16
nvbios_ocfg_parse(struct nouveau_bios *bios, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ocfg *info)
nvbios_ocfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *info)
{
u16 data = nvbios_ocfg_entry(bios, outp, idx, ver, hdr, cnt, len);
if (data) {
@ -155,9 +149,8 @@ nvbios_ocfg_parse(struct nouveau_bios *bios, u16 outp, u8 idx,
}
u16
nvbios_ocfg_match(struct nouveau_bios *bios, u16 outp, u16 type,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ocfg *info)
nvbios_ocfg_match(struct nvkm_bios *bios, u16 outp, u16 type,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *info)
{
u16 data, idx = 0;
while ((data = nvbios_ocfg_parse(bios, outp, idx++, ver, hdr, cnt, len, info))) {
@ -168,7 +161,7 @@ nvbios_ocfg_match(struct nouveau_bios *bios, u16 outp, u16 type,
}
u16
nvbios_oclk_match(struct nouveau_bios *bios, u16 cmp, u32 khz)
nvbios_oclk_match(struct nvkm_bios *bios, u16 cmp, u32 khz)
{
while (cmp) {
if (khz / 10 >= nv_ro16(bios, cmp + 0x00))

22
drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.c
View File

@ -21,14 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include "subdev/bios.h"
#include "subdev/bios/bit.h"
#include "subdev/bios/dp.h"
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/dp.h>
static u16
nvbios_dp_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_dp_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry d;
@ -57,7 +55,7 @@ nvbios_dp_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
static u16
nvbios_dpout_entry(struct nouveau_bios *bios, u8 idx,
nvbios_dpout_entry(struct nvkm_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 data = nvbios_dp_table(bios, ver, hdr, cnt, len);
@ -86,7 +84,7 @@ nvbios_dpout_entry(struct nouveau_bios *bios, u8 idx,
}
u16
nvbios_dpout_parse(struct nouveau_bios *bios, u8 idx,
nvbios_dpout_parse(struct nvkm_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpout *info)
{
@ -128,7 +126,7 @@ nvbios_dpout_parse(struct nouveau_bios *bios, u8 idx,
}
u16
nvbios_dpout_match(struct nouveau_bios *bios, u16 type, u16 mask,
nvbios_dpout_match(struct nvkm_bios *bios, u16 type, u16 mask,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpout *info)
{
@ -143,7 +141,7 @@ nvbios_dpout_match(struct nouveau_bios *bios, u16 type, u16 mask,
}
static u16
nvbios_dpcfg_entry(struct nouveau_bios *bios, u16 outp, u8 idx,
nvbios_dpcfg_entry(struct nvkm_bios *bios, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
if (*ver >= 0x40) {
@ -160,7 +158,7 @@ nvbios_dpcfg_entry(struct nouveau_bios *bios, u16 outp, u8 idx,
}
u16
nvbios_dpcfg_parse(struct nouveau_bios *bios, u16 outp, u8 idx,
nvbios_dpcfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpcfg *info)
{
@ -190,7 +188,7 @@ nvbios_dpcfg_parse(struct nouveau_bios *bios, u16 outp, u8 idx,
}
u16
nvbios_dpcfg_match(struct nouveau_bios *bios, u16 outp, u8 pc, u8 vs, u8 pe,
nvbios_dpcfg_match(struct nvkm_bios *bios, u16 outp, u8 pc, u8 vs, u8 pe,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_dpcfg *info)
{

15
drivers/gpu/drm/nouveau/nvkm/subdev/bios/extdev.c
View File

@ -21,13 +21,12 @@
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/extdev.h>
static u16
extdev_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
extdev_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
{
u8 dcb_ver, dcb_hdr, dcb_cnt, dcb_len;
u16 dcb, extdev = 0;
@ -44,12 +43,11 @@ extdev_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
*hdr = nv_ro08(bios, extdev + 1);
*cnt = nv_ro08(bios, extdev + 2);
*len = nv_ro08(bios, extdev + 3);
return extdev + *hdr;
}
static u16
nvbios_extdev_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
nvbios_extdev_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u16 extdev = extdev_table(bios, ver, &hdr, len, &cnt);
@ -59,8 +57,8 @@ nvbios_extdev_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
}
static void
extdev_parse_entry(struct nouveau_bios *bios, u16 offset,
struct nvbios_extdev_func *entry)
extdev_parse_entry(struct nvkm_bios *bios, u16 offset,
struct nvbios_extdev_func *entry)
{
entry->type = nv_ro08(bios, offset + 0);
entry->addr = nv_ro08(bios, offset + 1);
@ -68,7 +66,7 @@ extdev_parse_entry(struct nouveau_bios *bios, u16 offset,
}
int
nvbios_extdev_parse(struct nouveau_bios *bios, int idx,
nvbios_extdev_parse(struct nvkm_bios *bios, int idx,
struct nvbios_extdev_func *func)
{
u8 ver, len;
@ -78,12 +76,11 @@ nvbios_extdev_parse(struct nouveau_bios *bios, int idx,
return -EINVAL;
extdev_parse_entry(bios, entry, func);
return 0;
}
int
nvbios_extdev_find(struct nouveau_bios *bios, enum nvbios_extdev_type type,
nvbios_extdev_find(struct nvkm_bios *bios, enum nvbios_extdev_type type,
struct nvbios_extdev_func *func)
{
u8 ver, len, i;

8
drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c
View File

@ -21,13 +21,12 @@
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/fan.h>
u16
nvbios_fan_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_fan_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_P;
u16 fan = 0x0000;
@ -54,7 +53,7 @@ nvbios_fan_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
nvbios_fan_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
nvbios_fan_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len)
{
u16 data = nvbios_fan_table(bios, ver, hdr, cnt, len);
@ -64,7 +63,7 @@ nvbios_fan_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
}
u16
nvbios_fan_parse(struct nouveau_bios *bios, struct nvbios_therm_fan *fan)
nvbios_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan)
{
u8 ver, hdr, cnt, len;
@ -89,5 +88,6 @@ nvbios_fan_parse(struct nouveau_bios *bios, struct nvbios_therm_fan *fan)
fan->pwm_freq = nv_ro32(bios, data + 0x0b) & 0xffffff;
}
return data;
}

10
drivers/gpu/drm/nouveau/nvkm/subdev/bios/gpio.c
View File

@ -21,14 +21,13 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/gpio.h>
#include <subdev/bios/xpio.h>
u16
dcb_gpio_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
dcb_gpio_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 data = 0x0000;
u16 dcb = dcb_table(bios, ver, hdr, cnt, len);
@ -59,7 +58,7 @@ dcb_gpio_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
dcb_gpio_entry(struct nouveau_bios *bios, int idx, int ent, u8 *ver, u8 *len)
dcb_gpio_entry(struct nvkm_bios *bios, int idx, int ent, u8 *ver, u8 *len)
{
u8 hdr, cnt, xver; /* use gpio version for xpio entry parsing */
u16 gpio;
@ -71,11 +70,12 @@ dcb_gpio_entry(struct nouveau_bios *bios, int idx, int ent, u8 *ver, u8 *len)
if (gpio && ent < cnt)
return gpio + hdr + (ent * *len);
return 0x0000;
}
u16
dcb_gpio_parse(struct nouveau_bios *bios, int idx, int ent, u8 *ver, u8 *len,
dcb_gpio_parse(struct nvkm_bios *bios, int idx, int ent, u8 *ver, u8 *len,
struct dcb_gpio_func *gpio)
{
u16 data = dcb_gpio_entry(bios, idx, ent, ver, len);
@ -116,7 +116,7 @@ dcb_gpio_parse(struct nouveau_bios *bios, int idx, int ent, u8 *ver, u8 *len,
}
u16
dcb_gpio_match(struct nouveau_bios *bios, int idx, u8 func, u8 line,
dcb_gpio_match(struct nvkm_bios *bios, int idx, u8 func, u8 line,
u8 *ver, u8 *len, struct dcb_gpio_func *gpio)
{
u8 hdr, cnt, i = 0;

14
drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
View File

@ -21,14 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include "subdev/bios.h"
#include "subdev/bios/dcb.h"
#include "subdev/bios/i2c.h"
#include <subdev/bios.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/i2c.h>
u16
dcb_i2c_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
dcb_i2c_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 i2c = 0x0000;
u16 dcb = dcb_table(bios, ver, hdr, cnt, len);
@ -60,7 +58,7 @@ dcb_i2c_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
dcb_i2c_entry(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len)
dcb_i2c_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u16 i2c = dcb_i2c_table(bios, ver, &hdr, &cnt, len);
@ -70,7 +68,7 @@ dcb_i2c_entry(struct nouveau_bios *bios, u8 idx, u8 *ver, u8 *len)
}
int
dcb_i2c_parse(struct nouveau_bios *bios, u8 idx, struct dcb_i2c_entry *info)
dcb_i2c_parse(struct nvkm_bios *bios, u8 idx, struct dcb_i2c_entry *info)
{
u8 ver, len;
u16 ent = dcb_i2c_entry(bios, idx, &ver, &len);

5
drivers/gpu/drm/nouveau/nvkm/subdev/bios/image.c
View File

@ -21,14 +21,13 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include <subdev/bios.h>
#include <subdev/bios/image.h>
#include <subdev/bios/pcir.h>
#include <subdev/bios/npde.h>
static bool
nvbios_imagen(struct nouveau_bios *bios, struct nvbios_image *image)
nvbios_imagen(struct nvkm_bios *bios, struct nvbios_image *image)
{
struct nvbios_pcirT pcir;
struct nvbios_npdeT npde;
@ -66,7 +65,7 @@ nvbios_imagen(struct nouveau_bios *bios, struct nvbios_image *image)
}
bool
nvbios_image(struct nouveau_bios *bios, int idx, struct nvbios_image *image)
nvbios_image(struct nvkm_bios *bios, int idx, struct nvbios_image *image)
{
memset(image, 0x00, sizeof(*image));
do {

192
drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
View File

@ -1,9 +1,29 @@
#include <core/engine.h>
#include <core/device.h>
/*
* Copyright 2012 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/conn.h>
#include <subdev/bios/dcb.h>
#include <subdev/bios/dp.h>
@ -11,9 +31,9 @@
#include <subdev/bios/init.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/devinit.h>
#include <subdev/gpio.h>
#include <subdev/i2c.h>
#include <subdev/vga.h>
#include <subdev/gpio.h>
#define bioslog(lvl, fmt, args...) do { \
nv_printk(init->bios, lvl, "0x%04x[%c]: "fmt, init->offset, \
@ -97,7 +117,7 @@ init_crtc(struct nvbios_init *init)
static u8
init_conn(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
struct nvbios_connE connE;
u8 ver, hdr;
u32 conn;
@ -119,7 +139,7 @@ init_conn(struct nvbios_init *init)
static inline u32
init_nvreg(struct nvbios_init *init, u32 reg)
{
struct nouveau_devinit *devinit = nouveau_devinit(init->bios);
struct nvkm_devinit *devinit = nvkm_devinit(init->bios);
/* C51 (at least) sometimes has the lower bits set which the VBIOS
* interprets to mean that access needs to go through certain IO
@ -203,7 +223,7 @@ init_wrport(struct nvbios_init *init, u16 port, u8 value)
static u8
init_rdvgai(struct nvbios_init *init, u16 port, u8 index)
{
struct nouveau_subdev *subdev = init->subdev;
struct nvkm_subdev *subdev = init->subdev;
if (init_exec(init)) {
int head = init->crtc < 0 ? 0 : init->crtc;
return nv_rdvgai(subdev, head, port, index);
@ -232,10 +252,10 @@ init_wrvgai(struct nvbios_init *init, u16 port, u8 index, u8 value)
}
}
static struct nouveau_i2c_port *
static struct nvkm_i2c_port *
init_i2c(struct nvbios_init *init, int index)
{
struct nouveau_i2c *i2c = nouveau_i2c(init->bios);
struct nvkm_i2c *i2c = nvkm_i2c(init->bios);
if (index == 0xff) {
index = NV_I2C_DEFAULT(0);
@ -265,7 +285,7 @@ init_i2c(struct nvbios_init *init, int index)
static int
init_rdi2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg)
{
struct nouveau_i2c_port *port = init_i2c(init, index);
struct nvkm_i2c_port *port = init_i2c(init, index);
if (port && init_exec(init))
return nv_rdi2cr(port, addr, reg);
return -ENODEV;
@ -274,7 +294,7 @@ init_rdi2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg)
static int
init_wri2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg, u8 val)
{
struct nouveau_i2c_port *port = init_i2c(init, index);
struct nvkm_i2c_port *port = init_i2c(init, index);
if (port && init_exec(init))
return nv_wri2cr(port, addr, reg, val);
return -ENODEV;
@ -283,7 +303,7 @@ init_wri2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg, u8 val)
static u8
init_rdauxr(struct nvbios_init *init, u32 addr)
{
struct nouveau_i2c_port *port = init_i2c(init, -2);
struct nvkm_i2c_port *port = init_i2c(init, -2);
u8 data;
if (port && init_exec(init)) {
@ -299,7 +319,7 @@ init_rdauxr(struct nvbios_init *init, u32 addr)
static int
init_wrauxr(struct nvbios_init *init, u32 addr, u8 data)
{
struct nouveau_i2c_port *port = init_i2c(init, -2);
struct nvkm_i2c_port *port = init_i2c(init, -2);
if (port && init_exec(init)) {
int ret = nv_wraux(port, addr, &data, 1);
if (ret)
@ -312,7 +332,7 @@ init_wrauxr(struct nvbios_init *init, u32 addr, u8 data)
static void
init_prog_pll(struct nvbios_init *init, u32 id, u32 freq)
{
struct nouveau_devinit *devinit = nouveau_devinit(init->bios);
struct nvkm_devinit *devinit = nvkm_devinit(init->bios);
if (devinit->pll_set && init_exec(init)) {
int ret = devinit->pll_set(devinit, id, freq);
if (ret)
@ -325,7 +345,7 @@ init_prog_pll(struct nvbios_init *init, u32 id, u32 freq)
*****************************************************************************/
static u16
init_table(struct nouveau_bios *bios, u16 *len)
init_table(struct nvkm_bios *bios, u16 *len)
{
struct bit_entry bit_I;
@ -345,7 +365,7 @@ init_table(struct nouveau_bios *bios, u16 *len)
static u16
init_table_(struct nvbios_init *init, u16 offset, const char *name)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 len, data = init_table(bios, &len);
if (data) {
if (len >= offset + 2) {
@ -375,7 +395,7 @@ init_table_(struct nvbios_init *init, u16 offset, const char *name)
#define init_xlat_table(b) init_table_((b), 0x10, "xlat table");
static u16
init_script(struct nouveau_bios *bios, int index)
init_script(struct nvkm_bios *bios, int index)
{
struct nvbios_init init = { .bios = bios };
u16 bmp_ver = bmp_version(bios), data;
@ -396,7 +416,7 @@ init_script(struct nouveau_bios *bios, int index)
}
static u16
init_unknown_script(struct nouveau_bios *bios)
init_unknown_script(struct nvkm_bios *bios)
{
u16 len, data = init_table(bios, &len);
if (data && len >= 16)
@ -429,7 +449,7 @@ init_ram_restrict(struct nvbios_init *init)
static u8
init_xlat_(struct nvbios_init *init, u8 index, u8 offset)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 table = init_xlat_table(init);
if (table) {
u16 data = nv_ro16(bios, table + (index * 2));
@ -447,7 +467,7 @@ init_xlat_(struct nvbios_init *init, u8 index, u8 offset)
static bool
init_condition_met(struct nvbios_init *init, u8 cond)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 table = init_condition_table(init);
if (table) {
u32 reg = nv_ro32(bios, table + (cond * 12) + 0);
@ -463,7 +483,7 @@ init_condition_met(struct nvbios_init *init, u8 cond)
static bool
init_io_condition_met(struct nvbios_init *init, u8 cond)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 table = init_io_condition_table(init);
if (table) {
u16 port = nv_ro16(bios, table + (cond * 5) + 0);
@ -480,7 +500,7 @@ init_io_condition_met(struct nvbios_init *init, u8 cond)
static bool
init_io_flag_condition_met(struct nvbios_init *init, u8 cond)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 table = init_io_flag_condition_table(init);
if (table) {
u16 port = nv_ro16(bios, table + (cond * 9) + 0);
@ -515,7 +535,6 @@ init_tmds_reg(struct nvbios_init *init, u8 tmds)
* CR58 for CR57 = 0 to index a table of offsets to the basic
* 0x6808b0 address, and then flip the offset by 8.
*/
const int pramdac_offset[13] = {
0, 0, 0x8, 0, 0x2000, 0, 0, 0, 0x2008, 0, 0, 0, 0x2000 };
const u32 pramdac_table[4] = {
@ -589,7 +608,7 @@ init_done(struct nvbios_init *init)
static void
init_io_restrict_prog(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 port = nv_ro16(bios, init->offset + 1);
u8 index = nv_ro08(bios, init->offset + 3);
u8 mask = nv_ro08(bios, init->offset + 4);
@ -626,7 +645,7 @@ init_io_restrict_prog(struct nvbios_init *init)
static void
init_repeat(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 count = nv_ro08(bios, init->offset + 1);
u16 repeat = init->repeat;
@ -652,7 +671,7 @@ init_repeat(struct nvbios_init *init)
static void
init_io_restrict_pll(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 port = nv_ro16(bios, init->offset + 1);
u8 index = nv_ro08(bios, init->offset + 3);
u8 mask = nv_ro08(bios, init->offset + 4);
@ -708,7 +727,7 @@ init_end_repeat(struct nvbios_init *init)
static void
init_copy(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u8 shift = nv_ro08(bios, init->offset + 5);
u8 smask = nv_ro08(bios, init->offset + 6);
@ -747,7 +766,7 @@ init_not(struct nvbios_init *init)
static void
init_io_flag_condition(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 cond = nv_ro08(bios, init->offset + 1);
trace("IO_FLAG_CONDITION\t0x%02x\n", cond);
@ -764,7 +783,7 @@ init_io_flag_condition(struct nvbios_init *init)
static void
init_dp_condition(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
struct nvbios_dpout info;
u8 cond = nv_ro08(bios, init->offset + 1);
u8 unkn = nv_ro08(bios, init->offset + 2);
@ -812,7 +831,7 @@ init_dp_condition(struct nvbios_init *init)
static void
init_io_mask_or(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 or = init_or(init);
u8 data;
@ -831,7 +850,7 @@ init_io_mask_or(struct nvbios_init *init)
static void
init_io_or(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 or = init_or(init);
u8 data;
@ -850,7 +869,7 @@ init_io_or(struct nvbios_init *init)
static void
init_andn_reg(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u32 mask = nv_ro32(bios, init->offset + 5);
@ -867,7 +886,7 @@ init_andn_reg(struct nvbios_init *init)
static void
init_or_reg(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u32 mask = nv_ro32(bios, init->offset + 5);
@ -884,7 +903,7 @@ init_or_reg(struct nvbios_init *init)
static void
init_idx_addr_latched(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 creg = nv_ro32(bios, init->offset + 1);
u32 dreg = nv_ro32(bios, init->offset + 5);
u32 mask = nv_ro32(bios, init->offset + 9);
@ -914,7 +933,7 @@ init_idx_addr_latched(struct nvbios_init *init)
static void
init_io_restrict_pll2(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 port = nv_ro16(bios, init->offset + 1);
u8 index = nv_ro08(bios, init->offset + 3);
u8 mask = nv_ro08(bios, init->offset + 4);
@ -949,7 +968,7 @@ init_io_restrict_pll2(struct nvbios_init *init)
static void
init_pll2(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u32 freq = nv_ro32(bios, init->offset + 5);
@ -966,7 +985,7 @@ init_pll2(struct nvbios_init *init)
static void
init_i2c_byte(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 addr = nv_ro08(bios, init->offset + 2) >> 1;
u8 count = nv_ro08(bios, init->offset + 3);
@ -997,7 +1016,7 @@ init_i2c_byte(struct nvbios_init *init)
static void
init_zm_i2c_byte(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 addr = nv_ro08(bios, init->offset + 2) >> 1;
u8 count = nv_ro08(bios, init->offset + 3);
@ -1014,7 +1033,6 @@ init_zm_i2c_byte(struct nvbios_init *init)
init_wri2cr(init, index, addr, reg, data);
}
}
/**
@ -1024,7 +1042,7 @@ init_zm_i2c_byte(struct nvbios_init *init)
static void
init_zm_i2c(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 addr = nv_ro08(bios, init->offset + 2) >> 1;
u8 count = nv_ro08(bios, init->offset + 3);
@ -1040,7 +1058,7 @@ init_zm_i2c(struct nvbios_init *init)
}
if (init_exec(init)) {
struct nouveau_i2c_port *port = init_i2c(init, index);
struct nvkm_i2c_port *port = init_i2c(init, index);
struct i2c_msg msg = {
.addr = addr, .flags = 0, .len = count, .buf = data,
};
@ -1058,7 +1076,7 @@ init_zm_i2c(struct nvbios_init *init)
static void
init_tmds(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 tmds = nv_ro08(bios, init->offset + 1);
u8 addr = nv_ro08(bios, init->offset + 2);
u8 mask = nv_ro08(bios, init->offset + 3);
@ -1084,7 +1102,7 @@ init_tmds(struct nvbios_init *init)
static void
init_zm_tmds_group(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 tmds = nv_ro08(bios, init->offset + 1);
u8 count = nv_ro08(bios, init->offset + 2);
u32 reg = init_tmds_reg(init, tmds);
@ -1111,7 +1129,7 @@ init_zm_tmds_group(struct nvbios_init *init)
static void
init_cr_idx_adr_latch(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 addr0 = nv_ro08(bios, init->offset + 1);
u8 addr1 = nv_ro08(bios, init->offset + 2);
u8 base = nv_ro08(bios, init->offset + 3);
@ -1141,7 +1159,7 @@ init_cr_idx_adr_latch(struct nvbios_init *init)
static void
init_cr(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 addr = nv_ro08(bios, init->offset + 1);
u8 mask = nv_ro08(bios, init->offset + 2);
u8 data = nv_ro08(bios, init->offset + 3);
@ -1161,7 +1179,7 @@ init_cr(struct nvbios_init *init)
static void
init_zm_cr(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 addr = nv_ro08(bios, init->offset + 1);
u8 data = nv_ro08(bios, init->offset + 2);
@ -1178,7 +1196,7 @@ init_zm_cr(struct nvbios_init *init)
static void
init_zm_cr_group(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 count = nv_ro08(bios, init->offset + 1);
trace("ZM_CR_GROUP\n");
@ -1202,7 +1220,7 @@ init_zm_cr_group(struct nvbios_init *init)
static void
init_condition_time(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 cond = nv_ro08(bios, init->offset + 1);
u8 retry = nv_ro08(bios, init->offset + 2);
u8 wait = min((u16)retry * 50, 100);
@ -1229,7 +1247,7 @@ init_condition_time(struct nvbios_init *init)
static void
init_ltime(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 msec = nv_ro16(bios, init->offset + 1);
trace("LTIME\t0x%04x\n", msec);
@ -1246,7 +1264,7 @@ init_ltime(struct nvbios_init *init)
static void
init_zm_reg_sequence(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 base = nv_ro32(bios, init->offset + 1);
u8 count = nv_ro08(bios, init->offset + 5);
@ -1271,7 +1289,7 @@ init_zm_reg_sequence(struct nvbios_init *init)
static void
init_sub_direct(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 addr = nv_ro16(bios, init->offset + 1);
u16 save;
@ -1297,7 +1315,7 @@ init_sub_direct(struct nvbios_init *init)
static void
init_jump(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 offset = nv_ro16(bios, init->offset + 1);
trace("JUMP\t0x%04x\n", offset);
@ -1315,7 +1333,7 @@ init_jump(struct nvbios_init *init)
static void
init_i2c_if(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 addr = nv_ro08(bios, init->offset + 2);
u8 reg = nv_ro08(bios, init->offset + 3);
@ -1342,7 +1360,7 @@ init_i2c_if(struct nvbios_init *init)
static void
init_copy_nv_reg(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 sreg = nv_ro32(bios, init->offset + 1);
u8 shift = nv_ro08(bios, init->offset + 5);
u32 smask = nv_ro32(bios, init->offset + 6);
@ -1368,7 +1386,7 @@ init_copy_nv_reg(struct nvbios_init *init)
static void
init_zm_index_io(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 port = nv_ro16(bios, init->offset + 1);
u8 index = nv_ro08(bios, init->offset + 3);
u8 data = nv_ro08(bios, init->offset + 4);
@ -1386,7 +1404,7 @@ init_zm_index_io(struct nvbios_init *init)
static void
init_compute_mem(struct nvbios_init *init)
{
struct nouveau_devinit *devinit = nouveau_devinit(init->bios);
struct nvkm_devinit *devinit = nvkm_devinit(init->bios);
trace("COMPUTE_MEM\n");
init->offset += 1;
@ -1404,7 +1422,7 @@ init_compute_mem(struct nvbios_init *init)
static void
init_reset(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u32 data1 = nv_ro32(bios, init->offset + 5);
u32 data2 = nv_ro32(bios, init->offset + 9);
@ -1440,7 +1458,7 @@ init_configure_mem_clk(struct nvbios_init *init)
static void
init_configure_mem(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 mdata, sdata;
u32 addr, data;
@ -1490,7 +1508,7 @@ init_configure_mem(struct nvbios_init *init)
static void
init_configure_clk(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 mdata, clock;
trace("CONFIGURE_CLK\n");
@ -1524,7 +1542,7 @@ init_configure_clk(struct nvbios_init *init)
static void
init_configure_preinit(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 strap;
trace("CONFIGURE_PREINIT\n");
@ -1550,7 +1568,7 @@ init_configure_preinit(struct nvbios_init *init)
static void
init_io(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 port = nv_ro16(bios, init->offset + 1);
u8 mask = nv_ro16(bios, init->offset + 3);
u8 data = nv_ro16(bios, init->offset + 4);
@ -1590,7 +1608,7 @@ init_io(struct nvbios_init *init)
static void
init_sub(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u16 addr, save;
@ -1617,7 +1635,7 @@ init_sub(struct nvbios_init *init)
static void
init_ram_condition(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 mask = nv_ro08(bios, init->offset + 1);
u8 value = nv_ro08(bios, init->offset + 2);
@ -1636,7 +1654,7 @@ init_ram_condition(struct nvbios_init *init)
static void
init_nv_reg(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u32 mask = nv_ro32(bios, init->offset + 5);
u32 data = nv_ro32(bios, init->offset + 9);
@ -1654,7 +1672,7 @@ init_nv_reg(struct nvbios_init *init)
static void
init_macro(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 macro = nv_ro08(bios, init->offset + 1);
u16 table;
@ -1690,7 +1708,7 @@ init_resume(struct nvbios_init *init)
static void
init_time(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 usec = nv_ro16(bios, init->offset + 1);
trace("TIME\t0x%04x\n", usec);
@ -1711,7 +1729,7 @@ init_time(struct nvbios_init *init)
static void
init_condition(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 cond = nv_ro08(bios, init->offset + 1);
trace("CONDITION\t0x%02x\n", cond);
@ -1728,7 +1746,7 @@ init_condition(struct nvbios_init *init)
static void
init_io_condition(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 cond = nv_ro08(bios, init->offset + 1);
trace("IO_CONDITION\t0x%02x\n", cond);
@ -1745,7 +1763,7 @@ init_io_condition(struct nvbios_init *init)
static void
init_index_io(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u16 port = nv_ro16(bios, init->offset + 1);
u8 index = nv_ro16(bios, init->offset + 3);
u8 mask = nv_ro08(bios, init->offset + 4);
@ -1767,7 +1785,7 @@ init_index_io(struct nvbios_init *init)
static void
init_pll(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 reg = nv_ro32(bios, init->offset + 1);
u32 freq = nv_ro16(bios, init->offset + 5) * 10;
@ -1784,7 +1802,7 @@ init_pll(struct nvbios_init *init)
static void
init_zm_reg(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 addr = nv_ro32(bios, init->offset + 1);
u32 data = nv_ro32(bios, init->offset + 5);
@ -1804,7 +1822,7 @@ init_zm_reg(struct nvbios_init *init)
static void
init_ram_restrict_pll(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 type = nv_ro08(bios, init->offset + 1);
u8 count = init_ram_restrict_group_count(init);
u8 strap = init_ram_restrict(init);
@ -1834,7 +1852,7 @@ init_ram_restrict_pll(struct nvbios_init *init)
static void
init_gpio(struct nvbios_init *init)
{
struct nouveau_gpio *gpio = nouveau_gpio(init->bios);
struct nvkm_gpio *gpio = nvkm_gpio(init->bios);
trace("GPIO\n");
init->offset += 1;
@ -1850,7 +1868,7 @@ init_gpio(struct nvbios_init *init)
static void
init_ram_restrict_zm_reg_group(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 addr = nv_ro32(bios, init->offset + 1);
u8 incr = nv_ro08(bios, init->offset + 5);
u8 num = nv_ro08(bios, init->offset + 6);
@ -1888,7 +1906,7 @@ init_ram_restrict_zm_reg_group(struct nvbios_init *init)
static void
init_copy_zm_reg(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 sreg = nv_ro32(bios, init->offset + 1);
u32 dreg = nv_ro32(bios, init->offset + 5);
@ -1905,7 +1923,7 @@ init_copy_zm_reg(struct nvbios_init *init)
static void
init_zm_reg_group(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 addr = nv_ro32(bios, init->offset + 1);
u8 count = nv_ro08(bios, init->offset + 5);
@ -1927,7 +1945,7 @@ init_zm_reg_group(struct nvbios_init *init)
static void
init_xlat(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 saddr = nv_ro32(bios, init->offset + 1);
u8 sshift = nv_ro08(bios, init->offset + 5);
u8 smask = nv_ro08(bios, init->offset + 6);
@ -1955,7 +1973,7 @@ init_xlat(struct nvbios_init *init)
static void
init_zm_mask_add(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 addr = nv_ro32(bios, init->offset + 1);
u32 mask = nv_ro32(bios, init->offset + 5);
u32 add = nv_ro32(bios, init->offset + 9);
@ -1976,7 +1994,7 @@ init_zm_mask_add(struct nvbios_init *init)
static void
init_auxch(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 addr = nv_ro32(bios, init->offset + 1);
u8 count = nv_ro08(bios, init->offset + 5);
@ -2000,7 +2018,7 @@ init_auxch(struct nvbios_init *init)
static void
init_zm_auxch(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u32 addr = nv_ro32(bios, init->offset + 1);
u8 count = nv_ro08(bios, init->offset + 5);
@ -2022,14 +2040,14 @@ init_zm_auxch(struct nvbios_init *init)
static void
init_i2c_long_if(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nvkm_bios *bios = init->bios;
u8 index = nv_ro08(bios, init->offset + 1);
u8 addr = nv_ro08(bios, init->offset + 2) >> 1;
u8 reglo = nv_ro08(bios, init->offset + 3);
u8 reghi = nv_ro08(bios, init->offset + 4);
u8 mask = nv_ro08(bios, init->offset + 5);
u8 data = nv_ro08(bios, init->offset + 6);
struct nouveau_i2c_port *port;
struct nvkm_i2c_port *port;
trace("I2C_LONG_IF\t"
"I2C[0x%02x][0x%02x][0x%02x%02x] & 0x%02x == 0x%02x\n",
@ -2061,8 +2079,8 @@ init_i2c_long_if(struct nvbios_init *init)
static void
init_gpio_ne(struct nvbios_init *init)
{
struct nouveau_bios *bios = init->bios;
struct nouveau_gpio *gpio = nouveau_gpio(bios);
struct nvkm_bios *bios = init->bios;
struct nvkm_gpio *gpio = nvkm_gpio(bios);
struct dcb_gpio_func func;
u8 count = nv_ro08(bios, init->offset + 1);
u8 idx = 0, ver, len;
@ -2185,9 +2203,9 @@ nvbios_exec(struct nvbios_init *init)
}
int
nvbios_init(struct nouveau_subdev *subdev, bool execute)
nvbios_init(struct nvkm_subdev *subdev, bool execute)
{
struct nouveau_bios *bios = nouveau_bios(subdev);
struct nvkm_bios *bios = nvkm_bios(subdev);
int ret = 0;
int i = -1;
u16 data;

23
drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/mxm.h>
u16
mxm_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr)
mxm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr)
{
struct bit_entry x;
@ -51,28 +50,28 @@ mxm_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr)
*
* MXM v3.x VBIOS are nicer and provide pointers to these tables.
*/
static u8 nv84_sor_map[16] = {
static u8 g84_sor_map[16] = {
0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static u8 nv92_sor_map[16] = {
static u8 g92_sor_map[16] = {
0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static u8 nv94_sor_map[16] = {
static u8 g94_sor_map[16] = {
0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31,
0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
};
static u8 nv98_sor_map[16] = {
static u8 g98_sor_map[16] = {
0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31,
0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
u8
mxm_sor_map(struct nouveau_bios *bios, u8 conn)
mxm_sor_map(struct nvkm_bios *bios, u8 conn)
{
u8 ver, hdr;
u16 mxm = mxm_table(bios, &ver, &hdr);
@ -95,20 +94,20 @@ mxm_sor_map(struct nouveau_bios *bios, u8 conn)
}
if (bios->version.chip == 0x84 || bios->version.chip == 0x86)
return nv84_sor_map[conn];
return g84_sor_map[conn];
if (bios->version.chip == 0x92)
return nv92_sor_map[conn];
return g92_sor_map[conn];
if (bios->version.chip == 0x94 || bios->version.chip == 0x96)
return nv94_sor_map[conn];
return g94_sor_map[conn];
if (bios->version.chip == 0x98)
return nv98_sor_map[conn];
return g98_sor_map[conn];
nv_warn(bios, "missing sor map\n");
return 0x00;
}
u8
mxm_ddc_map(struct nouveau_bios *bios, u8 port)
mxm_ddc_map(struct nvkm_bios *bios, u8 port)
{
u8 ver, hdr;
u16 mxm = mxm_table(bios, &ver, &hdr);

5
drivers/gpu/drm/nouveau/nvkm/subdev/bios/npde.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include <subdev/bios.h>
#include <subdev/bios/npde.h>
#include <subdev/bios/pcir.h>
u32
nvbios_npdeTe(struct nouveau_bios *bios, u32 base)
nvbios_npdeTe(struct nvkm_bios *bios, u32 base)
{
struct nvbios_pcirT pcir;
u8 ver; u16 hdr;
@ -47,7 +46,7 @@ nvbios_npdeTe(struct nouveau_bios *bios, u32 base)
}
u32
nvbios_npdeTp(struct nouveau_bios *bios, u32 base, struct nvbios_npdeT *info)
nvbios_npdeTp(struct nvkm_bios *bios, u32 base, struct nvbios_npdeT *info)
{
u32 data = nvbios_npdeTe(bios, base);
memset(info, 0x00, sizeof(*info));

5
drivers/gpu/drm/nouveau/nvkm/subdev/bios/pcir.c
View File

@ -21,12 +21,11 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include <subdev/bios.h>
#include <subdev/bios/pcir.h>
u32
nvbios_pcirTe(struct nouveau_bios *bios, u32 base, u8 *ver, u16 *hdr)
nvbios_pcirTe(struct nvkm_bios *bios, u32 base, u8 *ver, u16 *hdr)
{
u32 data = nv_ro16(bios, base + 0x18);
if (data) {
@ -49,7 +48,7 @@ nvbios_pcirTe(struct nouveau_bios *bios, u32 base, u8 *ver, u16 *hdr)
}
u32
nvbios_pcirTp(struct nouveau_bios *bios, u32 base, u8 *ver, u16 *hdr,
nvbios_pcirTp(struct nvkm_bios *bios, u32 base, u8 *ver, u16 *hdr,
struct nvbios_pcirT *info)
{
u32 data = nvbios_pcirTe(bios, base, ver, hdr);

18
drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c
View File

@ -21,13 +21,14 @@
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/perf.h>
#include <core/device.h>
u16
nvbios_perf_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr,
nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
@ -76,7 +77,7 @@ nvbios_perf_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr,
}
u16
nvbios_perf_entry(struct nouveau_bios *bios, int idx,
nvbios_perf_entry(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u8 snr, ssz;
@ -92,9 +93,8 @@ nvbios_perf_entry(struct nouveau_bios *bios, int idx,
}
u16
nvbios_perfEp(struct nouveau_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_perfE *info)
nvbios_perfEp(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_perfE *info)
{
u16 perf = nvbios_perf_entry(bios, idx, ver, hdr, cnt, len);
memset(info, 0x00, sizeof(*info));
@ -155,7 +155,7 @@ nvbios_perfEp(struct nouveau_bios *bios, int idx,
}
u32
nvbios_perfSe(struct nouveau_bios *bios, u32 perfE, int idx,
nvbios_perfSe(struct nvkm_bios *bios, u32 perfE, int idx,
u8 *ver, u8 *hdr, u8 cnt, u8 len)
{
u32 data = 0x00000000;
@ -167,7 +167,7 @@ nvbios_perfSe(struct nouveau_bios *bios, u32 perfE, int idx,
}
u32
nvbios_perfSp(struct nouveau_bios *bios, u32 perfE, int idx,
nvbios_perfSp(struct nvkm_bios *bios, u32 perfE, int idx,
u8 *ver, u8 *hdr, u8 cnt, u8 len,
struct nvbios_perfS *info)
{
@ -184,7 +184,7 @@ nvbios_perfSp(struct nouveau_bios *bios, u32 perfE, int idx,
}
int
nvbios_perf_fan_parse(struct nouveau_bios *bios,
nvbios_perf_fan_parse(struct nvkm_bios *bios,
struct nvbios_perf_fan *fan)
{
u8 ver, hdr, cnt, len, snr, ssz;

19
drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c
View File

@ -21,12 +21,13 @@
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include <subdev/vga.h>
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/bmp.h>
#include <subdev/bios/pll.h>
#include <subdev/vga.h>
#include <core/device.h>
struct pll_mapping {
u8 type;
@ -66,7 +67,7 @@ nv50_pll_mapping[] = {
};
static struct pll_mapping
nv84_pll_mapping[] = {
g84_pll_mapping[] = {
{ PLL_CORE , 0x004028 },
{ PLL_SHADER, 0x004020 },
{ PLL_MEMORY, 0x004008 },
@ -78,7 +79,7 @@ nv84_pll_mapping[] = {
};
static u16
pll_limits_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
pll_limits_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_C;
@ -109,7 +110,7 @@ pll_limits_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
static struct pll_mapping *
pll_map(struct nouveau_bios *bios)
pll_map(struct nvkm_bios *bios)
{
switch (nv_device(bios)->card_type) {
case NV_04:
@ -128,14 +129,14 @@ pll_map(struct nouveau_bios *bios)
if (nv_device(bios)->chipset < 0xa3 ||
nv_device(bios)->chipset == 0xaa ||
nv_device(bios)->chipset == 0xac)
return nv84_pll_mapping;
return g84_pll_mapping;
default:
return NULL;
}
}
static u16
pll_map_reg(struct nouveau_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
pll_map_reg(struct nvkm_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
{
struct pll_mapping *map;
u8 hdr, cnt;
@ -177,7 +178,7 @@ pll_map_reg(struct nouveau_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
}
static u16
pll_map_type(struct nouveau_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len)
pll_map_type(struct nvkm_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len)
{
struct pll_mapping *map;
u8 hdr, cnt;
@ -219,7 +220,7 @@ pll_map_type(struct nouveau_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len)
}
int
nvbios_pll_parse(struct nouveau_bios *bios, u32 type, struct nvbios_pll *info)
nvbios_pll_parse(struct nvkm_bios *bios, u32 type, struct nvbios_pll *info)
{
u8 ver, len;
u32 reg = type;

13
drivers/gpu/drm/nouveau/nvkm/subdev/bios/pmu.c
View File

@ -21,14 +21,13 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/image.h>
#include <subdev/bios/pmu.h>
static u32
weirdo_pointer(struct nouveau_bios *bios, u32 data)
weirdo_pointer(struct nvkm_bios *bios, u32 data)
{
struct nvbios_image image;
int idx = 0;
@ -43,7 +42,7 @@ weirdo_pointer(struct nouveau_bios *bios, u32 data)
}
u32
nvbios_pmuTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_pmuTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_p;
u32 data = 0;
@ -63,7 +62,7 @@ nvbios_pmuTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u32
nvbios_pmuTp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
nvbios_pmuTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_pmuT *info)
{
u32 data = nvbios_pmuTe(bios, ver, hdr, cnt, len);
@ -76,7 +75,7 @@ nvbios_pmuTp(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
}
u32
nvbios_pmuEe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
nvbios_pmuEe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr)
{
u8 cnt, len;
u32 data = nvbios_pmuTe(bios, ver, hdr, &cnt, &len);
@ -89,7 +88,7 @@ nvbios_pmuEe(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr)
}
u32
nvbios_pmuEp(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
nvbios_pmuEp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr,
struct nvbios_pmuE *info)
{
u32 data = nvbios_pmuEe(bios, idx, ver, hdr);
@ -104,7 +103,7 @@ nvbios_pmuEp(struct nouveau_bios *bios, int idx, u8 *ver, u8 *hdr,
}
bool
nvbios_pmuRm(struct nouveau_bios *bios, u8 type, struct nvbios_pmuR *info)
nvbios_pmuRm(struct nvkm_bios *bios, u8 type, struct nvbios_pmuR *info)
{
struct nvbios_pmuE pmuE;
u8 ver, hdr, idx = 0;

10
drivers/gpu/drm/nouveau/nvkm/subdev/bios/priv.h
View File

@ -1,18 +1,17 @@
#ifndef __NVKM_BIOS_PRIV_H__
#define __NVKM_BIOS_PRIV_H__
#include <subdev/bios.h>
struct nvbios_source {
const char *name;
void *(*init)(struct nouveau_bios *, const char *);
void *(*init)(struct nvkm_bios *, const char *);
void (*fini)(void *);
u32 (*read)(void *, u32 offset, u32 length, struct nouveau_bios *);
u32 (*read)(void *, u32 offset, u32 length, struct nvkm_bios *);
bool rw;
};
int nvbios_extend(struct nouveau_bios *, u32 length);
int nvbios_shadow(struct nouveau_bios *);
int nvbios_extend(struct nvkm_bios *, u32 length);
int nvbios_shadow(struct nvkm_bios *);
extern const struct nvbios_source nvbios_rom;
extern const struct nvbios_source nvbios_ramin;
@ -21,5 +20,4 @@ extern const struct nvbios_source nvbios_acpi_slow;
extern const struct nvbios_source nvbios_pcirom;
extern const struct nvbios_source nvbios_platform;
extern const struct nvbios_source nvbios_of;
#endif

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/ramcfg.c
View File

@ -21,20 +21,19 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/bios/M0203.h>
static u8
nvbios_ramcfg_strap(struct nouveau_subdev *subdev)
nvbios_ramcfg_strap(struct nvkm_subdev *subdev)
{
return (nv_rd32(subdev, 0x101000) & 0x0000003c) >> 2;
}
u8
nvbios_ramcfg_count(struct nouveau_bios *bios)
nvbios_ramcfg_count(struct nvkm_bios *bios)
{
struct bit_entry bit_M;
@ -49,9 +48,9 @@ nvbios_ramcfg_count(struct nouveau_bios *bios)
}
u8
nvbios_ramcfg_index(struct nouveau_subdev *subdev)
nvbios_ramcfg_index(struct nvkm_subdev *subdev)
{
struct nouveau_bios *bios = nouveau_bios(subdev);
struct nvkm_bios *bios = nvkm_bios(subdev);
u8 strap = nvbios_ramcfg_strap(subdev);
u32 xlat = 0x00000000;
struct bit_entry bit_M;

23
drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c
View File

@ -21,14 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/bios/rammap.h>
u32
nvbios_rammapTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr,
nvbios_rammapTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
@ -59,7 +57,7 @@ nvbios_rammapTe(struct nouveau_bios *bios, u8 *ver, u8 *hdr,
}
u32
nvbios_rammapEe(struct nouveau_bios *bios, int idx,
nvbios_rammapEe(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u8 snr, ssz;
@ -75,9 +73,8 @@ nvbios_rammapEe(struct nouveau_bios *bios, int idx,
}
u32
nvbios_rammapEp(struct nouveau_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ramcfg *p)
nvbios_rammapEp(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *p)
{
u32 data = nvbios_rammapEe(bios, idx, ver, hdr, cnt, len), temp;
memset(p, 0x00, sizeof(*p));
@ -118,9 +115,8 @@ nvbios_rammapEp(struct nouveau_bios *bios, int idx,
}
u32
nvbios_rammapEm(struct nouveau_bios *bios, u16 mhz,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ramcfg *info)
nvbios_rammapEm(struct nvkm_bios *bios, u16 mhz,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *info)
{
int idx = 0;
u32 data;
@ -132,9 +128,8 @@ nvbios_rammapEm(struct nouveau_bios *bios, u16 mhz,
}
u32
nvbios_rammapSe(struct nouveau_bios *bios, u32 data,
u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx,
u8 *ver, u8 *hdr)
nvbios_rammapSe(struct nvkm_bios *bios, u32 data,
u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx, u8 *ver, u8 *hdr)
{
if (idx < ecnt) {
data = data + ehdr + (idx * elen);
@ -146,7 +141,7 @@ nvbios_rammapSe(struct nouveau_bios *bios, u32 data,
}
u32
nvbios_rammapSp(struct nouveau_bios *bios, u32 data,
nvbios_rammapSp(struct nvkm_bios *bios, u32 data,
u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx,
u8 *ver, u8 *hdr, struct nvbios_ramcfg *p)
{

40
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c
View File

@ -21,13 +21,15 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
#include <core/device.h>
#include <core/option.h>
#include <subdev/bios.h>
#include <subdev/bios/image.h>
struct shadow {
struct nouveau_oclass base;
struct nvkm_oclass base;
u32 skip;
const struct nvbios_source *func;
void *data;
@ -36,7 +38,7 @@ struct shadow {
};
static bool
shadow_fetch(struct nouveau_bios *bios, u32 upto)
shadow_fetch(struct nvkm_bios *bios, u32 upto)
{
struct shadow *mthd = (void *)nv_object(bios)->oclass;
const u32 limit = (upto + 3) & ~3;
@ -50,36 +52,36 @@ shadow_fetch(struct nouveau_bios *bios, u32 upto)
}
static u8
shadow_rd08(struct nouveau_object *object, u64 addr)
shadow_rd08(struct nvkm_object *object, u64 addr)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
if (shadow_fetch(bios, addr + 1))
return bios->data[addr];
return 0x00;
}
static u16
shadow_rd16(struct nouveau_object *object, u64 addr)
shadow_rd16(struct nvkm_object *object, u64 addr)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
if (shadow_fetch(bios, addr + 2))
return get_unaligned_le16(&bios->data[addr]);
return 0x0000;
}
static u32
shadow_rd32(struct nouveau_object *object, u64 addr)
shadow_rd32(struct nvkm_object *object, u64 addr)
{
struct nouveau_bios *bios = (void *)object;
struct nvkm_bios *bios = (void *)object;
if (shadow_fetch(bios, addr + 4))
return get_unaligned_le32(&bios->data[addr]);
return 0x00000000;
}
static struct nouveau_oclass
static struct nvkm_oclass
shadow_class = {
.handle = NV_SUBDEV(VBIOS, 0x00),
.ofuncs = &(struct nouveau_ofuncs) {
.ofuncs = &(struct nvkm_ofuncs) {
.rd08 = shadow_rd08,
.rd16 = shadow_rd16,
.rd32 = shadow_rd32,
@ -87,7 +89,7 @@ shadow_class = {
};
static int
shadow_image(struct nouveau_bios *bios, int idx, struct shadow *mthd)
shadow_image(struct nvkm_bios *bios, int idx, struct shadow *mthd)
{
struct nvbios_image image;
int score = 1;
@ -126,9 +128,9 @@ shadow_image(struct nouveau_bios *bios, int idx, struct shadow *mthd)
}
static int
shadow_score(struct nouveau_bios *bios, struct shadow *mthd)
shadow_score(struct nvkm_bios *bios, struct shadow *mthd)
{
struct nouveau_oclass *oclass = nv_object(bios)->oclass;
struct nvkm_oclass *oclass = nv_object(bios)->oclass;
int score;
nv_object(bios)->oclass = &mthd->base;
score = shadow_image(bios, 0, mthd);
@ -138,7 +140,7 @@ shadow_score(struct nouveau_bios *bios, struct shadow *mthd)
}
static int
shadow_method(struct nouveau_bios *bios, struct shadow *mthd, const char *name)
shadow_method(struct nvkm_bios *bios, struct shadow *mthd, const char *name)
{
const struct nvbios_source *func = mthd->func;
if (func->name) {
@ -163,7 +165,7 @@ shadow_method(struct nouveau_bios *bios, struct shadow *mthd, const char *name)
}
static u32
shadow_fw_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
shadow_fw_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
const struct firmware *fw = data;
if (offset + length <= fw->size) {
@ -174,7 +176,7 @@ shadow_fw_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
}
static void *
shadow_fw_init(struct nouveau_bios *bios, const char *name)
shadow_fw_init(struct nvkm_bios *bios, const char *name)
{
struct device *dev = &nv_device(bios)->pdev->dev;
const struct firmware *fw;
@ -194,7 +196,7 @@ shadow_fw = {
};
int
nvbios_shadow(struct nouveau_bios *bios)
nvbios_shadow(struct nvkm_bios *bios)
{
struct shadow mthds[] = {
{ shadow_class, 0, &nvbios_of },
@ -211,7 +213,7 @@ nvbios_shadow(struct nouveau_bios *bios)
int optlen;
/* handle user-specified bios source */
optarg = nouveau_stropt(nv_device(bios)->cfgopt, "NvBios", &optlen);
optarg = nvkm_stropt(nv_device(bios)->cfgopt, "NvBios", &optlen);
source = optarg ? kstrndup(optarg, optlen, GFP_KERNEL) : NULL;
if (source) {
/* try to match one of the built-in methods */

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c
View File

@ -20,9 +20,10 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "priv.h"
#include <core/device.h>
#if defined(CONFIG_ACPI) && defined(CONFIG_X86)
int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
bool nouveau_acpi_rom_supported(struct pci_dev *pdev);
@ -45,7 +46,7 @@ nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len)
* on some systems, such as Lenovo W530.
*/
static u32
acpi_read_fast(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
acpi_read_fast(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
u32 limit = (offset + length + 0xfff) & ~0xfff;
u32 start = offset & ~0x00000fff;
@ -66,7 +67,7 @@ acpi_read_fast(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
* function.
*/
static u32
acpi_read_slow(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
acpi_read_slow(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
u32 limit = (offset + length + 0xfff) & ~0xfff;
u32 start = offset & ~0xfff;
@ -87,7 +88,7 @@ acpi_read_slow(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
}
static void *
acpi_init(struct nouveau_bios *bios, const char *name)
acpi_init(struct nvkm_bios *bios, const char *name)
{
if (!nouveau_acpi_rom_supported(nv_device(bios)->pdev))
return ERR_PTR(-ENODEV);

7
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.c
View File

@ -20,9 +20,10 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "priv.h"
#include <core/device.h>
#if defined(__powerpc__)
struct priv {
const void __iomem *data;
@ -30,7 +31,7 @@ struct priv {
};
static u32
of_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
of_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
struct priv *priv = data;
if (offset + length <= priv->size) {
@ -41,7 +42,7 @@ of_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
}
static void *
of_init(struct nouveau_bios *bios, const char *name)
of_init(struct nvkm_bios *bios, const char *name)
{
struct pci_dev *pdev = nv_device(bios)->pdev;
struct device_node *dn;

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowpci.c
View File

@ -20,9 +20,10 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "priv.h"
#include <core/device.h>
struct priv {
struct pci_dev *pdev;
void __iomem *rom;
@ -30,7 +31,7 @@ struct priv {
};
static u32
pcirom_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
pcirom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
struct priv *priv = data;
if (offset + length <= priv->size) {
@ -50,7 +51,7 @@ pcirom_fini(void *data)
}
static void *
pcirom_init(struct nouveau_bios *bios, const char *name)
pcirom_init(struct nvkm_bios *bios, const char *name)
{
struct pci_dev *pdev = nv_device(bios)->pdev;
struct priv *priv = NULL;
@ -82,7 +83,7 @@ nvbios_pcirom = {
};
static void *
platform_init(struct nouveau_bios *bios, const char *name)
platform_init(struct nvkm_bios *bios, const char *name)
{
struct pci_dev *pdev = nv_device(bios)->pdev;
struct priv *priv;

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.c
View File

@ -20,16 +20,17 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "priv.h"
#include <core/device.h>
struct priv {
struct nouveau_bios *bios;
struct nvkm_bios *bios;
u32 bar0;
};
static u32
pramin_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
pramin_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
u32 i;
if (offset + length <= 0x00100000) {
@ -51,7 +52,7 @@ pramin_fini(void *data)
}
static void *
pramin_init(struct nouveau_bios *bios, const char *name)
pramin_init(struct nvkm_bios *bios, const char *name)
{
struct priv *priv = NULL;
u64 addr = 0;

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.c
View File

@ -20,11 +20,12 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "priv.h"
#include <core/device.h>
static u32
prom_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
prom_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios)
{
u32 i;
if (offset + length <= 0x00100000) {
@ -38,7 +39,7 @@ prom_read(void *data, u32 offset, u32 length, struct nouveau_bios *bios)
static void
prom_fini(void *data)
{
struct nouveau_bios *bios = data;
struct nvkm_bios *bios = data;
if (nv_device(bios)->card_type < NV_50)
nv_mask(bios, 0x001850, 0x00000001, 0x00000001);
else
@ -46,7 +47,7 @@ prom_fini(void *data)
}
static void *
prom_init(struct nouveau_bios *bios, const char *name)
prom_init(struct nvkm_bios *bios, const char *name)
{
if (nv_device(bios)->card_type < NV_50) {
if (nv_device(bios)->card_type == NV_40 &&

15
drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.c
View File

@ -21,13 +21,14 @@
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/therm.h>
#include <core/device.h>
static u16
therm_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
{
struct bit_entry bit_P;
u16 therm = 0;
@ -51,12 +52,11 @@ therm_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
*hdr = nv_ro08(bios, therm + 1);
*len = nv_ro08(bios, therm + 2);
*cnt = nv_ro08(bios, therm + 3);
return therm + nv_ro08(bios, therm + 1);
}
static u16
nvbios_therm_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
nvbios_therm_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u16 therm = therm_table(bios, ver, &hdr, len, &cnt);
@ -66,7 +66,7 @@ nvbios_therm_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
}
int
nvbios_therm_sensor_parse(struct nouveau_bios *bios,
nvbios_therm_sensor_parse(struct nvkm_bios *bios,
enum nvbios_therm_domain domain,
struct nvbios_therm_sensor *sensor)
{
@ -152,10 +152,9 @@ nvbios_therm_sensor_parse(struct nouveau_bios *bios,
}
int
nvbios_therm_fan_parse(struct nouveau_bios *bios,
struct nvbios_therm_fan *fan)
nvbios_therm_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan)
{
struct nouveau_therm_trip_point *cur_trip = NULL;
struct nvbios_therm_trip_point *cur_trip = NULL;
u8 ver, len, i;
u16 entry;

11
drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c
View File

@ -21,14 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/ramcfg.h>
#include <subdev/bios/timing.h>
u16
nvbios_timingTe(struct nouveau_bios *bios,
nvbios_timingTe(struct nvkm_bios *bios,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
{
struct bit_entry bit_P;
@ -68,7 +66,7 @@ nvbios_timingTe(struct nouveau_bios *bios,
}
u16
nvbios_timingEe(struct nouveau_bios *bios, int idx,
nvbios_timingEe(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u8 snr, ssz;
@ -84,9 +82,8 @@ nvbios_timingEe(struct nouveau_bios *bios, int idx,
}
u16
nvbios_timingEp(struct nouveau_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_ramcfg *p)
nvbios_timingEp(struct nvkm_bios *bios, int idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *p)
{
u16 data = nvbios_timingEe(bios, idx, ver, hdr, cnt, len), temp;
p->timing_ver = *ver;

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/vmap.c
View File

@ -21,13 +21,12 @@
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/vmap.h>
u16
nvbios_vmap_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_vmap_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_P;
u16 vmap = 0x0000;
@ -55,7 +54,7 @@ nvbios_vmap_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
nvbios_vmap_parse(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
nvbios_vmap_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_vmap *info)
{
u16 vmap = nvbios_vmap_table(bios, ver, hdr, cnt, len);
@ -69,7 +68,7 @@ nvbios_vmap_parse(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
}
u16
nvbios_vmap_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
nvbios_vmap_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u16 vmap = nvbios_vmap_table(bios, ver, &hdr, &cnt, len);
@ -81,7 +80,7 @@ nvbios_vmap_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
}
u16
nvbios_vmap_entry_parse(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len,
nvbios_vmap_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len,
struct nvbios_vmap_entry *info)
{
u16 vmap = nvbios_vmap_entry(bios, idx, ver, len);

9
drivers/gpu/drm/nouveau/nvkm/subdev/bios/volt.c
View File

@ -21,13 +21,12 @@
*
* Authors: Martin Peres
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/volt.h>
u16
nvbios_volt_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
nvbios_volt_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
struct bit_entry bit_P;
u16 volt = 0x0000;
@ -67,7 +66,7 @@ nvbios_volt_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
nvbios_volt_parse(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_volt *info)
{
u16 volt = nvbios_volt_table(bios, ver, hdr, cnt, len);
@ -102,7 +101,7 @@ nvbios_volt_parse(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
}
u16
nvbios_volt_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
nvbios_volt_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
{
u8 hdr, cnt;
u16 volt = nvbios_volt_table(bios, ver, &hdr, &cnt, len);
@ -114,7 +113,7 @@ nvbios_volt_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
}
u16
nvbios_volt_entry_parse(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len,
nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len,
struct nvbios_volt_entry *info)
{
u16 volt = nvbios_volt_entry(bios, idx, ver, len);

10
drivers/gpu/drm/nouveau/nvkm/subdev/bios/xpio.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include <subdev/bios.h>
#include <subdev/bios/gpio.h>
#include <subdev/bios/xpio.h>
static u16
dcb_xpiod_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
dcb_xpiod_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 data = dcb_gpio_table(bios, ver, hdr, cnt, len);
if (data && *ver >= 0x40 && *hdr >= 0x06) {
@ -44,7 +43,7 @@ dcb_xpiod_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
}
u16
dcb_xpio_table(struct nouveau_bios *bios, u8 idx,
dcb_xpio_table(struct nvkm_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
{
u16 data = dcb_xpiod_table(bios, ver, hdr, cnt, len);
@ -62,9 +61,8 @@ dcb_xpio_table(struct nouveau_bios *bios, u8 idx,
}
u16
dcb_xpio_parse(struct nouveau_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
struct nvbios_xpio *info)
dcb_xpio_parse(struct nvkm_bios *bios, u8 idx,
u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_xpio *info)
{
u16 data = dcb_xpio_table(bios, idx, ver, hdr, cnt, len);
if (data && *len >= 6) {

6
drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c
View File

@ -33,9 +33,9 @@ static int
nouveau_therm_update_trip(struct nouveau_therm *therm)
{
struct nouveau_therm_priv *priv = (void *)therm;
struct nouveau_therm_trip_point *trip = priv->fan->bios.trip,
*cur_trip = NULL,
*last_trip = priv->last_trip;
struct nvbios_therm_trip_point *trip = priv->fan->bios.trip,
*cur_trip = NULL,
*last_trip = priv->last_trip;
u8 temp = therm->temp_get(therm);
u16 duty, i;

3
drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h
View File

@ -27,6 +27,7 @@
#include <subdev/therm.h>
#include <subdev/bios.h>
#include <subdev/bios/extdev.h>
#include <subdev/bios/gpio.h>
#include <subdev/bios/perf.h>
@ -74,7 +75,7 @@ struct nouveau_therm_priv {
/* automatic thermal management */
struct nouveau_alarm alarm;
spinlock_t lock;
struct nouveau_therm_trip_point *last_trip;
struct nvbios_therm_trip_point *last_trip;
int mode;
int cstate;
int suspend;