can: mcp251x: write intf only when needed
This patch introduces a variable "clear_intf" that hold the bits that should be cleared. Only read-modify-write register if "clear_intf" is set. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Wolfgang Grandegger <wg@grandegger.com>
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@ -125,6 +125,8 @@
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# define CANINTF_TX0IF 0x04
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# define CANINTF_TX0IF 0x04
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# define CANINTF_RX1IF 0x02
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# define CANINTF_RX1IF 0x02
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# define CANINTF_RX0IF 0x01
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# define CANINTF_RX0IF 0x01
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# define CANINTF_ERR_TX \
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(CANINTF_ERRIF | CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)
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#define EFLG 0x2d
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#define EFLG 0x2d
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# define EFLG_EWARN 0x01
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# define EFLG_EWARN 0x01
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# define EFLG_RXWAR 0x02
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# define EFLG_RXWAR 0x02
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@ -769,10 +771,12 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
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while (!priv->force_quit) {
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while (!priv->force_quit) {
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enum can_state new_state;
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enum can_state new_state;
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u8 intf, eflag;
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u8 intf, eflag;
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u8 clear_intf = 0;
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int can_id = 0, data1 = 0;
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int can_id = 0, data1 = 0;
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mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
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mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
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/* receive buffer 0 */
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if (intf & CANINTF_RX0IF) {
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if (intf & CANINTF_RX0IF) {
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mcp251x_hw_rx(spi, 0);
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mcp251x_hw_rx(spi, 0);
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/* Free one buffer ASAP */
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/* Free one buffer ASAP */
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@ -780,10 +784,17 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)
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0x00);
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0x00);
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}
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}
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if (intf & CANINTF_RX1IF)
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/* receive buffer 1 */
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if (intf & CANINTF_RX1IF) {
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mcp251x_hw_rx(spi, 1);
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mcp251x_hw_rx(spi, 1);
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clear_intf |= CANINTF_RX1IF;
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}
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mcp251x_write_bits(spi, CANINTF, intf, 0x00);
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/* any error or tx interrupt we need to clear? */
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if (intf & CANINTF_ERR_TX)
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clear_intf |= intf & CANINTF_ERR_TX;
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if (clear_intf)
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mcp251x_write_bits(spi, CANINTF, clear_intf, 0x00);
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if (eflag)
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if (eflag)
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mcp251x_write_bits(spi, EFLG, eflag, 0x00);
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mcp251x_write_bits(spi, EFLG, eflag, 0x00);
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