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[media] drxk: Allow enabling MERR/MVAL cfg 

Those two settings are different when used with az6007. Add
a config option to enable it.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
hifive-unleashed-5.1
Mauro Carvalho Chehab 2012-01-21 07:57:06 -03:00
parent 6fb65a66a2
commit d585681374
4 changed files with 13 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/media/dvb/dvb-usb/az6007.c
View File

@ -67,6 +67,7 @@ static struct drxk_config terratec_h7_drxk = {
.parallel_ts = true,
.dynamic_clk = true,
.single_master = true,
.enable_merr_cfg = true,
.no_i2c_bridge = false,
.chunk_size = 64,
.mpeg_out_clk_strength = 0x02,

2
drivers/media/dvb/frontends/drxk.h
View File

@ -12,6 +12,7 @@
* Serial otherwise.
* @dynamic_clk: True means that the clock will be dynamically
* adjusted. Static clock otherwise.
* @enable_merr_cfg: Enable SIO_PDR_PERR_CFG/SIO_PDR_MVAL_CFG.
* @single_master: Device is on the single master mode
* @no_i2c_bridge: Don't switch the I2C bridge to talk with tuner
* @antenna_gpio: GPIO bit used to control the antenna
@ -29,6 +30,7 @@ struct drxk_config {
bool no_i2c_bridge;
bool parallel_ts;
bool dynamic_clk;
bool enable_merr_cfg;
bool antenna_dvbt;
u16 antenna_gpio;

11
drivers/media/dvb/frontends/drxk_hard.c
View File

@ -1179,6 +1179,7 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
int status = -1;
u16 sioPdrMclkCfg = 0;
u16 sioPdrMdxCfg = 0;
u16 err_cfg = 0;
dprintk(1, ": mpeg %s, %s mode\n",
mpegEnable ? "enable" : "disable",
@ -1244,12 +1245,17 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
status = write16(state, SIO_PDR_MSTRT_CFG__A, sioPdrMdxCfg);
if (status < 0)
goto error;
status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); /* Disable */
if (state->enable_merr_cfg)
err_cfg = sioPdrMdxCfg;
status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg);
if (status < 0)
goto error;
status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); /* Disable */
status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg);
if (status < 0)
goto error;
if (state->m_enableParallel == true) {
/* paralel -> enable MD1 to MD7 */
status = write16(state, SIO_PDR_MD1_CFG__A, sioPdrMdxCfg);
@ -6379,6 +6385,7 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
state->antenna_gpio = config->antenna_gpio;
state->antenna_dvbt = config->antenna_dvbt;
state->m_ChunkSize = config->chunk_size;
state->enable_merr_cfg = config->enable_merr_cfg;
if (config->dynamic_clk) {
state->m_DVBTStaticCLK = 0;

1
drivers/media/dvb/frontends/drxk_hard.h
View File

@ -332,6 +332,7 @@ struct drxk_state {
u16 UIO_mask; /* Bits used by UIO */
bool enable_merr_cfg;
bool single_master;
bool no_i2c_bridge;
bool antenna_dvbt;