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ASoC: Correct left/right swap in wm_hubs DC offset correction

It was consistently wrong for everything except WM8993 so should be no
functional change.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.comm>
hifive-unleashed-5.1
Mark Brown 2011-06-07 23:28:45 +01:00
parent aef05294df
commit d5b040c92d
1 changed files with 8 additions and 8 deletions

View File

@ -133,9 +133,9 @@ static void calibrate_dc_servo(struct snd_soc_codec *codec)
break; break;
case 1: case 1:
reg = snd_soc_read(codec, WM8993_DC_SERVO_3); reg = snd_soc_read(codec, WM8993_DC_SERVO_3);
reg_l = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK) reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
>> WM8993_DCS_DAC_WR_VAL_1_SHIFT; >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
reg_r = reg & WM8993_DCS_DAC_WR_VAL_0_MASK; reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
break; break;
default: default:
WARN(1, "Unknown DCS readback method\n"); WARN(1, "Unknown DCS readback method\n");
@ -149,13 +149,13 @@ static void calibrate_dc_servo(struct snd_soc_codec *codec)
dev_dbg(codec->dev, "Applying %d code DC servo correction\n", dev_dbg(codec->dev, "Applying %d code DC servo correction\n",
hubs->dcs_codes); hubs->dcs_codes);
/* HPOUT1L */ /* HPOUT1R */
offset = reg_l; offset = reg_r;
offset += hubs->dcs_codes; offset += hubs->dcs_codes;
dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT; dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
/* HPOUT1R */ /* HPOUT1L */
offset = reg_r; offset = reg_l;
offset += hubs->dcs_codes; offset += hubs->dcs_codes;
dcs_cfg |= (u8)offset; dcs_cfg |= (u8)offset;
@ -167,8 +167,8 @@ static void calibrate_dc_servo(struct snd_soc_codec *codec)
WM8993_DCS_TRIG_DAC_WR_0 | WM8993_DCS_TRIG_DAC_WR_0 |
WM8993_DCS_TRIG_DAC_WR_1); WM8993_DCS_TRIG_DAC_WR_1);
} else { } else {
dcs_cfg = reg_l << WM8993_DCS_DAC_WR_VAL_1_SHIFT; dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
dcs_cfg |= reg_r; dcs_cfg |= reg_l;
} }
/* Save the callibrated offset if we're in class W mode and /* Save the callibrated offset if we're in class W mode and