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[ARM] S3C2412: Correct parents for EREFCLK and UREFCLK 

For s3c2412, set parent for clk_erefclk and clk_urefclk.
This allow for example to use xtal or extclk for i2s clock.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
hifive-unleashed-5.1
Matthieu Castet 2008-07-03 11:24:45 +01:00 committed by Ben Dooks
parent 9c3871ca59
commit d5c52922b6
2 changed files with 13 additions and 2 deletions
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13
arch/arm/mach-s3c2412/clock.c
View File

@ -631,6 +631,17 @@ static struct clk_init clks_src[] __initdata = {
.bit = S3C2412_CLKSRC_USBCLK_HCLK,
.src_0 = &clk_usysclk,
.src_1 = &clk_h,
/* here we assume OM[4] select xtal */
}, {
.clk = &clk_erefclk,
.bit = S3C2412_CLKSRC_EREFCLK_EXTCLK,
.src_0 = &clk_xtal,
.src_1 = &clk_ext,
}, {
.clk = &clk_urefclk,
.bit = S3C2412_CLKSRC_UREFCLK_EXTCLK,
.src_0 = &clk_xtal,
.src_1 = &clk_ext,
},
};
@ -666,8 +677,6 @@ static void __init s3c2412_clk_initparents(void)
static struct clk *clks[] __initdata = {
&clk_ext,
&clk_usb_bus,
&clk_erefclk,
&clk_urefclk,
&clk_mrefclk,
&clk_armclk,
};

2
include/asm-arm/arch-s3c2410/regs-clock.h
View File

@ -189,6 +189,8 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk)
#define S3C2412_CLKSRC_I2SCLK_MPLL (1<<9)
#define S3C2412_CLKSRC_USBCLK_HCLK (1<<10)
#define S3C2412_CLKSRC_CAMCLK_HCLK (1<<11)
#define S3C2412_CLKSRC_UREFCLK_EXTCLK (1<<12)
#define S3C2412_CLKSRC_EREFCLK_EXTCLK (1<<14)
#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */