atmel/nand: add DT support
Use a local copy of board informatin and fill with DT data. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>hifive-unleashed-5.1
Jean-Christophe PLAGNIOL-VILLARD
parent
770d7c39af
commit
d6a016616b
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@ -0,0 +1,41 @@
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Atmel NAND flash
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Required properties:
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- compatible : "atmel,at91rm9200-nand".
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- reg : should specify localbus address and size used for the chip,
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and if availlable the ECC.
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- atmel,nand-addr-offset : offset for the address latch.
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- atmel,nand-cmd-offset : offset for the command latch.
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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representing partitions.
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- gpios : specifies the gpio pins to control the NAND device. detect is an
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optional gpio and may be set to 0 if not present.
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Optional properties:
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- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
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Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
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"soft_bch".
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- nand-bus-width : 8 or 16 bus width if not present 8
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- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
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Examples:
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nand0: nand@40000000,0 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe800 0x200
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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nand-on-flash-bbt;
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nand-ecc-mode = "soft";
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gpios = <&pioC 13 0
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&pioC 14 0
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0
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>;
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partition@0 {
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...
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};
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};
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@ -172,5 +172,21 @@
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status = "disabled";
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};
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe800 0x200
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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gpios = <&pioC 13 0
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&pioC 14 0
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0
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>;
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status = "disabled";
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};
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};
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};
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@ -180,5 +180,21 @@
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status = "disabled";
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};
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe200 0x200
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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gpios = <&pioC 8 0
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&pioC 14 0
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0
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>;
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status = "disabled";
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};
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};
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};
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@ -14,7 +14,7 @@
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compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
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chosen {
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bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2";
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bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
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};
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memory@70000000 {
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@ -36,6 +36,29 @@
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status = "okay";
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};
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};
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nand0: nand@40000000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "soft";
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nand-on-flash-bbt;
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status = "okay";
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boot@0 {
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label = "bootstrap/uboot/kernel";
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reg = <0x0 0x400000>;
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};
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rootfs@400000 {
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label = "rootfs";
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reg = <0x400000 0x3C00000>;
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};
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data@4000000 {
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label = "data";
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reg = <0x4000000 0xC000000>;
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};
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};
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};
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leds {
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@ -13,7 +13,7 @@
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compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
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chosen {
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bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
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bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
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};
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memory@20000000 {
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@ -31,6 +31,48 @@
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status = "okay";
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};
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};
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nand0: nand@40000000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "soft";
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nand-on-flash-bbt;
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status = "okay";
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at91bootstrap@0 {
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label = "at91bootstrap";
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reg = <0x0 0x20000>;
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};
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barebox@20000 {
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label = "barebox";
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reg = <0x20000 0x40000>;
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};
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bareboxenv@60000 {
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label = "bareboxenv";
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reg = <0x60000 0x20000>;
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};
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bareboxenv2@80000 {
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label = "bareboxenv2";
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reg = <0x80000 0x20000>;
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};
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kernel@a0000 {
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label = "kernel";
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reg = <0xa0000 0x400000>;
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};
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rootfs@4a0000 {
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label = "rootfs";
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reg = <0x4a0000 0x7800000>;
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};
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data@7ca0000 {
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label = "data";
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reg = <0x7ca0000 0x8360000>;
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};
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};
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};
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leds {
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@ -313,11 +313,6 @@ void __init at91sam9x5_initialize(void)
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at91_gpio_init(NULL, 0);
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}
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/* --------------------------------------------------------------------
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* AT91SAM9x5 devices (temporary before modification of code)
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* -------------------------------------------------------------------- */
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void __init at91_add_device_nand(struct atmel_nand_data *data) {}
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/* --------------------------------------------------------------------
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* Interrupt initialization
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* -------------------------------------------------------------------- */
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@ -19,10 +19,7 @@
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <mach/hardware.h>
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#include <mach/board.h>
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#include <mach/system_rev.h>
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#include <mach/at91sam9_smc.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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@ -30,7 +27,6 @@
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include "sam9_smc.h"
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#include "generic.h"
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@ -40,50 +36,6 @@ static void __init ek_init_early(void)
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at91_initialize(12000000);
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}
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/* det_pin is not connected */
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static struct atmel_nand_data __initdata ek_nand_data = {
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.ale = 21,
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.cle = 22,
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.det_pin = -EINVAL,
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.rdy_pin = AT91_PIN_PC8,
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.enable_pin = AT91_PIN_PC14,
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.ecc_mode = NAND_ECC_SOFT,
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.on_flash_bbt = 1,
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};
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static struct sam9_smc_config __initdata ek_nand_smc_config = {
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.ncs_read_setup = 0,
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.nrd_setup = 2,
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.ncs_write_setup = 0,
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.nwe_setup = 2,
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.ncs_read_pulse = 4,
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.nrd_pulse = 4,
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.ncs_write_pulse = 4,
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.nwe_pulse = 4,
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.read_cycle = 7,
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.write_cycle = 7,
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.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
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.tdf_cycles = 3,
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};
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static void __init ek_add_device_nand(void)
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{
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ek_nand_data.bus_width_16 = board_have_nand_16bit();
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/* setup bus-width (8 or 16) */
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if (ek_nand_data.bus_width_16)
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ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
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else
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ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
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/* configure chip-select 3 (NAND) */
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sam9_smc_configure(0, 3, &ek_nand_smc_config);
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at91_add_device_nand(&ek_nand_data);
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}
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static const struct of_device_id irq_of_match[] __initconst = {
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{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
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@ -100,9 +52,6 @@ static void __init at91_dt_init_irq(void)
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static void __init at91_dt_device_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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/* NAND */
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ek_add_device_nand();
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}
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static const char *at91_dt_board_compat[] __initdata = {
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@ -27,6 +27,10 @@
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/of_mtd.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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@ -83,7 +87,7 @@ struct atmel_nand_host {
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struct mtd_info mtd;
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void __iomem *io_base;
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dma_addr_t io_phys;
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struct atmel_nand_data *board;
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struct atmel_nand_data board;
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struct device *dev;
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void __iomem *ecc;
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@ -101,8 +105,8 @@ static int cpu_has_dma(void)
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*/
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static void atmel_nand_enable(struct atmel_nand_host *host)
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{
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if (gpio_is_valid(host->board->enable_pin))
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gpio_set_value(host->board->enable_pin, 0);
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if (gpio_is_valid(host->board.enable_pin))
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gpio_set_value(host->board.enable_pin, 0);
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}
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/*
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@ -110,8 +114,8 @@ static void atmel_nand_enable(struct atmel_nand_host *host)
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*/
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static void atmel_nand_disable(struct atmel_nand_host *host)
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{
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if (gpio_is_valid(host->board->enable_pin))
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gpio_set_value(host->board->enable_pin, 1);
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if (gpio_is_valid(host->board.enable_pin))
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gpio_set_value(host->board.enable_pin, 1);
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}
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/*
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@ -132,9 +136,9 @@ static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl
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return;
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if (ctrl & NAND_CLE)
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writeb(cmd, host->io_base + (1 << host->board->cle));
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writeb(cmd, host->io_base + (1 << host->board.cle));
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else
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writeb(cmd, host->io_base + (1 << host->board->ale));
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writeb(cmd, host->io_base + (1 << host->board.ale));
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}
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/*
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@ -145,8 +149,8 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
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struct nand_chip *nand_chip = mtd->priv;
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struct atmel_nand_host *host = nand_chip->priv;
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return gpio_get_value(host->board->rdy_pin) ^
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!!host->board->rdy_pin_active_low;
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return gpio_get_value(host->board.rdy_pin) ^
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!!host->board.rdy_pin_active_low;
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}
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/*
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@ -261,7 +265,7 @@ static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
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if (atmel_nand_dma_op(mtd, buf, len, 1) == 0)
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return;
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if (host->board->bus_width_16)
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if (host->board.bus_width_16)
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atmel_read_buf16(mtd, buf, len);
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else
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atmel_read_buf8(mtd, buf, len);
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@ -277,7 +281,7 @@ static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
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if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) == 0)
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return;
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if (host->board->bus_width_16)
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if (host->board.bus_width_16)
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atmel_write_buf16(mtd, buf, len);
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else
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atmel_write_buf8(mtd, buf, len);
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@ -469,6 +473,56 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode)
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}
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}
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#if defined(CONFIG_OF)
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static int __devinit atmel_of_init_port(struct atmel_nand_host *host,
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struct device_node *np)
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{
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u32 val;
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int ecc_mode;
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struct atmel_nand_data *board = &host->board;
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enum of_gpio_flags flags;
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if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) {
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if (val >= 32) {
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dev_err(host->dev, "invalid addr-offset %u\n", val);
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return -EINVAL;
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}
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board->ale = val;
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}
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if (of_property_read_u32(np, "atmel,nand-cmd-offset", &val) == 0) {
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if (val >= 32) {
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dev_err(host->dev, "invalid cmd-offset %u\n", val);
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return -EINVAL;
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}
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board->cle = val;
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}
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ecc_mode = of_get_nand_ecc_mode(np);
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board->ecc_mode = ecc_mode < 0 ? NAND_ECC_SOFT : ecc_mode;
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board->on_flash_bbt = of_get_nand_on_flash_bbt(np);
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if (of_get_nand_bus_width(np) == 16)
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board->bus_width_16 = 1;
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board->rdy_pin = of_get_gpio_flags(np, 0, &flags);
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board->rdy_pin_active_low = (flags == OF_GPIO_ACTIVE_LOW);
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board->enable_pin = of_get_gpio(np, 1);
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board->det_pin = of_get_gpio(np, 2);
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return 0;
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}
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#else
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static int __devinit atmel_of_init_port(struct atmel_nand_host *host,
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struct device_node *np)
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{
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return -EINVAL;
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}
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#endif
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/*
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* Probe for the NAND device.
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*/
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@ -479,6 +533,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
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struct nand_chip *nand_chip;
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struct resource *regs;
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struct resource *mem;
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struct mtd_part_parser_data ppdata = {};
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int res;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -505,8 +560,15 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
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mtd = &host->mtd;
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nand_chip = &host->nand_chip;
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host->board = pdev->dev.platform_data;
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host->dev = &pdev->dev;
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if (pdev->dev.of_node) {
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res = atmel_of_init_port(host, pdev->dev.of_node);
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if (res)
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goto err_nand_ioremap;
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} else {
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memcpy(&host->board, pdev->dev.platform_data,
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sizeof(struct atmel_nand_data));
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}
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nand_chip->priv = host; /* link the private data structures */
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mtd->priv = nand_chip;
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@ -517,10 +579,10 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
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nand_chip->IO_ADDR_W = host->io_base;
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nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
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|
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if (gpio_is_valid(host->board->rdy_pin))
|
||||
if (gpio_is_valid(host->board.rdy_pin))
|
||||
nand_chip->dev_ready = atmel_nand_device_ready;
|
||||
|
||||
nand_chip->ecc.mode = host->board->ecc_mode;
|
||||
nand_chip->ecc.mode = host->board.ecc_mode;
|
||||
|
||||
regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
if (!regs && nand_chip->ecc.mode == NAND_ECC_HW) {
|
||||
|
|
@ -545,7 +607,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
|
|||
|
||||
nand_chip->chip_delay = 20; /* 20us command delay time */
|
||||
|
||||
if (host->board->bus_width_16) /* 16-bit bus width */
|
||||
if (host->board.bus_width_16) /* 16-bit bus width */
|
||||
nand_chip->options |= NAND_BUSWIDTH_16;
|
||||
|
||||
nand_chip->read_buf = atmel_read_buf;
|
||||
|
|
@ -554,15 +616,15 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
|
|||
platform_set_drvdata(pdev, host);
|
||||
atmel_nand_enable(host);
|
||||
|
||||
if (gpio_is_valid(host->board->det_pin)) {
|
||||
if (gpio_get_value(host->board->det_pin)) {
|
||||
if (gpio_is_valid(host->board.det_pin)) {
|
||||
if (gpio_get_value(host->board.det_pin)) {
|
||||
printk(KERN_INFO "No SmartMedia card inserted.\n");
|
||||
res = -ENXIO;
|
||||
goto err_no_card;
|
||||
}
|
||||
}
|
||||
|
||||
if (host->board->on_flash_bbt || on_flash_bbt) {
|
||||
if (host->board.on_flash_bbt || on_flash_bbt) {
|
||||
printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
|
||||
nand_chip->bbt_options |= NAND_BBT_USE_FLASH;
|
||||
}
|
||||
|
|
@ -637,8 +699,9 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
mtd->name = "atmel_nand";
|
||||
res = mtd_device_parse_register(mtd, NULL, 0,
|
||||
host->board->parts, host->board->num_parts);
|
||||
ppdata.of_node = pdev->dev.of_node;
|
||||
res = mtd_device_parse_register(mtd, NULL, &ppdata,
|
||||
host->board.parts, host->board.num_parts);
|
||||
if (!res)
|
||||
return res;
|
||||
|
||||
|
|
@ -682,11 +745,21 @@ static int __exit atmel_nand_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static const struct of_device_id atmel_nand_dt_ids[] = {
|
||||
{ .compatible = "atmel,at91rm9200-nand" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, atmel_nand_dt_ids);
|
||||
#endif
|
||||
|
||||
static struct platform_driver atmel_nand_driver = {
|
||||
.remove = __exit_p(atmel_nand_remove),
|
||||
.driver = {
|
||||
.name = "atmel_nand",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(atmel_nand_dt_ids),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue