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avr: Cleanup genirq namespace

Scripted conversion to new function names with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
hifive-unleashed-5.1
Thomas Gleixner 2011-03-24 16:39:32 +01:00
parent 250153361f
commit d75f1bfdbc
5 changed files with 17 additions and 17 deletions

View File

@ -301,7 +301,7 @@ static int __init mrmt1_init(void)
/* Select the Touchscreen interrupt pin mode */
at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING );
irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING);
at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
#endif

View File

@ -322,6 +322,6 @@ static int __init atngw100_arch_init(void)
/* set_irq_type() after the arch_initcall for EIC has run, and
* before the I2C subsystem could try using this IRQ.
*/
return set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
}
arch_initcall(atngw100_arch_init);

View File

@ -134,9 +134,9 @@ static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type)
if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
flow_type |= IRQ_LEVEL;
__set_irq_handler_unlocked(irq, handle_level_irq);
__irq_set_handler_locked(irq, handle_level_irq);
} else
__set_irq_handler_unlocked(irq, handle_edge_irq);
__irq_set_handler_locked(irq, handle_edge_irq);
desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
desc->status |= flow_type;
}
@ -155,7 +155,7 @@ static struct irq_chip eic_chip = {
static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
{
struct eic *eic = get_irq_desc_data(desc);
struct eic *eic = irq_desc_get_handler_data(desc);
unsigned long status, pending;
unsigned int i;
@ -235,13 +235,13 @@ static int __init eic_probe(struct platform_device *pdev)
eic->chip = &eic_chip;
for (i = 0; i < nr_of_irqs; i++) {
set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
irq_set_chip_and_handler(eic->first_irq + i, &eic_chip,
handle_level_irq);
set_irq_chip_data(eic->first_irq + i, eic);
irq_set_chip_data(eic->first_irq + i, eic);
}
set_irq_chained_handler(int_irq, demux_eic_irq);
set_irq_data(int_irq, eic);
irq_set_chained_handler(int_irq, demux_eic_irq);
irq_set_handler_data(int_irq, eic);
if (pdev->id == 0) {
nmi_eic = eic;

View File

@ -126,7 +126,7 @@ void __init init_IRQ(void)
intc_writel(&intc0, INTPR0 + 4 * i, offset);
readback = intc_readl(&intc0, INTPR0 + 4 * i);
if (readback == offset)
set_irq_chip_and_handler(i, &intc0.chip,
irq_set_chip_and_handler(i, &intc0.chip,
handle_simple_irq);
}

View File

@ -285,7 +285,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
struct pio_device *pio = get_irq_desc_chip_data(desc);
unsigned gpio_irq;
gpio_irq = (unsigned) get_irq_data(irq);
gpio_irq = (unsigned) irq_get_handler_data(irq);
for (;;) {
u32 isr;
@ -310,16 +310,16 @@ gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
{
unsigned i;
set_irq_chip_data(irq, pio);
set_irq_data(irq, (void *) gpio_irq);
irq_set_chip_data(irq, pio);
irq_set_handler_data(irq, (void *)gpio_irq);
for (i = 0; i < 32; i++, gpio_irq++) {
set_irq_chip_data(gpio_irq, pio);
set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
handle_simple_irq);
irq_set_chip_data(gpio_irq, pio);
irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
handle_simple_irq);
}
set_irq_chained_handler(irq, gpio_irq_handler);
irq_set_chained_handler(irq, gpio_irq_handler);
}
/*--------------------------------------------------------------------------*/