drm/i915: remove duplicate PIPE*STAT bit definitions
Having two sets has made me think I caught a bug more than once now. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -171,10 +171,10 @@ void intel_enable_asle (struct drm_device *dev)
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ironlake_enable_display_irq(dev_priv, DE_GSE);
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else {
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i915_enable_pipestat(dev_priv, 1,
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I915_LEGACY_BLC_EVENT_ENABLE);
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PIPE_LEGACY_BLC_EVENT_ENABLE);
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if (IS_I965G(dev))
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i915_enable_pipestat(dev_priv, 0,
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I915_LEGACY_BLC_EVENT_ENABLE);
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PIPE_LEGACY_BLC_EVENT_ENABLE);
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}
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}
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@ -856,9 +856,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
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iir = I915_READ(IIR);
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if (IS_I965G(dev))
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vblank_status = I915_START_VBLANK_INTERRUPT_STATUS;
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vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS;
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else
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vblank_status = I915_VBLANK_INTERRUPT_STATUS;
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vblank_status = PIPE_VBLANK_INTERRUPT_STATUS;
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for (;;) {
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irq_received = iir != 0;
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@ -962,8 +962,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
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intel_finish_page_flip(dev, 1);
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}
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if ((pipea_stats & I915_LEGACY_BLC_EVENT_STATUS) ||
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(pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) ||
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if ((pipea_stats & PIPE_LEGACY_BLC_EVENT_STATUS) ||
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(pipeb_stats & PIPE_LEGACY_BLC_EVENT_STATUS) ||
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(iir & I915_ASLE_INTERRUPT))
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opregion_asle_intr(dev);
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@ -595,32 +595,6 @@
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#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
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#define DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW 0x00ff8000 /* Pineview */
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#define I915_FIFO_UNDERRUN_STATUS (1UL<<31)
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#define I915_CRC_ERROR_ENABLE (1UL<<29)
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#define I915_CRC_DONE_ENABLE (1UL<<28)
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#define I915_GMBUS_EVENT_ENABLE (1UL<<27)
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#define I915_VSYNC_INTERRUPT_ENABLE (1UL<<25)
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#define I915_DISPLAY_LINE_COMPARE_ENABLE (1UL<<24)
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#define I915_DPST_EVENT_ENABLE (1UL<<23)
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#define I915_LEGACY_BLC_EVENT_ENABLE (1UL<<22)
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#define I915_ODD_FIELD_INTERRUPT_ENABLE (1UL<<21)
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#define I915_EVEN_FIELD_INTERRUPT_ENABLE (1UL<<20)
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#define I915_START_VBLANK_INTERRUPT_ENABLE (1UL<<18) /* 965 or later */
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#define I915_VBLANK_INTERRUPT_ENABLE (1UL<<17)
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#define I915_OVERLAY_UPDATED_ENABLE (1UL<<16)
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#define I915_CRC_ERROR_INTERRUPT_STATUS (1UL<<13)
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#define I915_CRC_DONE_INTERRUPT_STATUS (1UL<<12)
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#define I915_GMBUS_INTERRUPT_STATUS (1UL<<11)
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#define I915_VSYNC_INTERRUPT_STATUS (1UL<<9)
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#define I915_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
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#define I915_DPST_EVENT_STATUS (1UL<<7)
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#define I915_LEGACY_BLC_EVENT_STATUS (1UL<<6)
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#define I915_ODD_FIELD_INTERRUPT_STATUS (1UL<<5)
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#define I915_EVEN_FIELD_INTERRUPT_STATUS (1UL<<4)
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#define I915_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
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#define I915_VBLANK_INTERRUPT_STATUS (1UL<<1)
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#define I915_OVERLAY_UPDATED_STATUS (1UL<<0)
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#define SRX_INDEX 0x3c4
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#define SRX_DATA 0x3c5
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#define SR01 1
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