From d91068f32271da2b3c0dfc36143d2db07dff8f3e Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Tue, 17 Mar 2020 18:27:16 +0800 Subject: [PATCH] MLK-23618-10: ASoC: fsl_esai: Don't bind clock with regmap The call flow: devm_regmap_init_mmio_clk - clk_prepare() - clk_pm_runtime_get() Cause the power domain of lpcg clock always be enabled. which impact the power consumption. So we can't bind clock with regmap, then explicitly enable clock when using. As we already enable all clock in pm_runtime_resume, so only need to enable clock in probe. Signed-off-by: Shengjiu Wang Reviewed-by: Daniel Baluta --- sound/soc/fsl/fsl_esai.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c index 2bed950d462b..3bd7ac30406c 100644 --- a/sound/soc/fsl/fsl_esai.c +++ b/sound/soc/fsl/fsl_esai.c @@ -1016,7 +1016,7 @@ static int fsl_esai_probe(struct platform_device *pdev) return PTR_ERR(regs); esai_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, - "core", regs, &fsl_esai_regmap_config); + NULL, regs, &fsl_esai_regmap_config); if (IS_ERR(esai_priv->regmap)) { dev_err(&pdev->dev, "failed to init regmap: %ld\n", PTR_ERR(esai_priv->regmap)); @@ -1106,6 +1106,11 @@ static int fsl_esai_probe(struct platform_device *pdev) dev_set_drvdata(&pdev->dev, esai_priv); spin_lock_init(&esai_priv->lock); + + ret = clk_prepare_enable(esai_priv->coreclk); + if (ret) + return ret; + ret = fsl_esai_hw_init(esai_priv); if (ret) return ret; @@ -1119,6 +1124,8 @@ static int fsl_esai_probe(struct platform_device *pdev) regmap_write(esai_priv->regmap, REG_ESAI_RSMA, 0); regmap_write(esai_priv->regmap, REG_ESAI_RSMB, 0); + clk_disable_unprepare(esai_priv->coreclk); + ret = devm_snd_soc_register_component(&pdev->dev, &fsl_esai_component, &fsl_esai_dai, 1); if (ret) {