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pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume 

The TDSELCTRL register is responsible for configuring the SDHI/MMC clock
return path delay and may be adjusted by the bootloader. Retain the value
across suspend/resume to prevent hardware instability after resume.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
hifive-unleashed-5.2
Marek Vasut 2019-02-23 23:39:55 +01:00 committed by Geert Uytterhoeven
parent 2cee6cb290
commit d92ee9cf8e
8 changed files with 24 additions and 0 deletions
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2
drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
View File

@ -5547,10 +5547,12 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
enum ioctrl_regs {
POCCTRL,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

2
drivers/pinctrl/sh-pfc/pfc-r8a7795.c
View File

@ -5897,10 +5897,12 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
enum ioctrl_regs {
POCCTRL,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

2
drivers/pinctrl/sh-pfc/pfc-r8a7796.c
View File

@ -5855,10 +5855,12 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
enum ioctrl_regs {
POCCTRL,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

2
drivers/pinctrl/sh-pfc/pfc-r8a77965.c
View File

@ -6012,10 +6012,12 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
enum ioctrl_regs {
POCCTRL,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

2
drivers/pinctrl/sh-pfc/pfc-r8a77970.c
View File

@ -2409,12 +2409,14 @@ enum ioctrl_regs {
POCCTRL0,
POCCTRL1,
POCCTRL2,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL0] = { 0xe6060380 },
[POCCTRL1] = { 0xe6060384 },
[POCCTRL2] = { 0xe6060388 },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

2
drivers/pinctrl/sh-pfc/pfc-r8a77980.c
View File

@ -2832,6 +2832,7 @@ enum ioctrl_regs {
POCCTRL1,
POCCTRL2,
POCCTRL3,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
@ -2839,6 +2840,7 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL1] = { 0xe6060384, },
[POCCTRL2] = { 0xe6060388, },
[POCCTRL3] = { 0xe606038c, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

2
drivers/pinctrl/sh-pfc/pfc-r8a77990.c
View File

@ -4996,10 +4996,12 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
enum ioctrl_regs {
POCCTRL0,
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[POCCTRL0] = { 0xe6060380, },
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};

10
drivers/pinctrl/sh-pfc/pfc-r8a77995.c
View File

@ -2833,6 +2833,15 @@ static int r8a77995_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *po
return bit;
}
enum ioctrl_regs {
TDSELCTRL,
};
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
[TDSELCTRL] = { 0xe60603c0, },
{ /* sentinel */ },
};
static const struct sh_pfc_soc_operations r8a77995_pinmux_ops = {
.pin_to_pocctrl = r8a77995_pin_to_pocctrl,
};
@ -2852,6 +2861,7 @@ const struct sh_pfc_soc_info r8a77995_pinmux_info = {
.nr_functions = ARRAY_SIZE(pinmux_functions),
.cfg_regs = pinmux_config_regs,
.ioctrl_regs = pinmux_ioctrl_regs,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),