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gpio: tegra: configure pins during irq_set_type

When a Tegra GPIO is used as an IRQ, it should be enabled as a GPIO (so
the pinmux module isn't driving it as an output) and configured as a GPIO
input (so the GPIO module isn't driving it as an output). Set this up
automatically whenever an IRQ is requested, so that users of IRQs don't
need to do this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
hifive-unleashed-5.1
Stephen Warren 2012-03-19 10:31:58 -06:00
parent 4bee6417c9
commit d941136fc6
1 changed files with 3 additions and 0 deletions

View File

@ -224,6 +224,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
tegra_gpio_mask_write(GPIO_MSK_OE(gpio), gpio, 0);
tegra_gpio_enable(gpio);
if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
__irq_set_handler_locked(d->irq, handle_level_irq);
else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))