gpu: host1x: Do not limit DMA segment size
host1x nor any its clients have any limitations on the DMA segment size, so don't pretend that they do. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -445,7 +445,7 @@ static int host1x_device_add(struct host1x *host1x,
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of_dma_configure(&device->dev, host1x->dev->of_node, true);
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device->dev.dma_parms = &device->dma_parms;
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dma_set_max_seg_size(&device->dev, SZ_4M);
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dma_set_max_seg_size(&device->dev, UINT_MAX);
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err = host1x_device_parse_dt(device, driver);
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if (err < 0) {
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@ -237,6 +237,9 @@ static int host1x_probe(struct platform_device *pdev)
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return PTR_ERR(host->hv_regs);
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}
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host->dev->dma_parms = &host->dma_parms;
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dma_set_max_seg_size(host->dev, UINT_MAX);
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dma_set_mask_and_coherent(host->dev, host->info->dma_mask);
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if (host->info->init) {
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@ -140,6 +140,8 @@ struct host1x {
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struct list_head devices;
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struct list_head list;
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struct device_dma_parameters dma_parms;
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};
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void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v);
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