drm pull for 5.12-rc1
docs: - lots of updated docs core: - require crtc to have unique primary plane - fourcc macro fix - PCI bar quirk for bar resizing - don't sent hotplug on error - move vm code to legacy - nuke hose only used on old oboslete alpha dma-buf: - kernel doc updates - improved lock tracking dp/hdmi: - DP-HDMI2.1 protocol converter support ttm: - bo size handling cleanup - release a pinned bo warning - cleanup lru handler - avoid using pages with drm_prime_sg_to_page_addr_arrays cma-helper: - prime/mmap fixes bridge: - add DP support gma500: - remove gma3600 support i915: - try eDP fast/narrow link again with fallback - Intel eDP backlight control - replace display register read/write macros - refactor intel_display.c - display power improvements - HPD code cleanup - Rocketlake display fixes - Power/backlight/RPM fixes - DG1 display fix - IVB/BYT clear residuals security fix again - make i915 mitigations options via parameter - HSW GT1 GPU hangs fixes - DG1 workaround hang fixes - TGL DMAR hang avoidance - Lots of GT fixes - follow on fixes for residuals clear - gen7 per-engine-reset support - HDCP2.2 + HDCP1.4 GEN12 DP MST support - TGL clear color support - backlight refactoring - VRR/Adaptive sync enabling on DP/EDP for TGL+ - async flips for all ilk+ amdgpu: - rework IH ring handling (Vega/Navi) - rework HDP handling (Vega/Navi) - swSMU updates for renoir/vangogh - Sienna Cichild overdrive support - FP16 on DCE8-11 support - GPU reset on navy flounder/vangogh - SMU profile fixes for APU - SR-IOV fixes - Vangogh SMU fixes - fan speed control fixes amdkfd: - config handling fix - buffer free fix - recursive lock warnings fix nouveau: - Turing MMU fault recovery fixes - mDP connectors reporting fix - audio locking fixes - rework engines/instances code to support new scheme tegra: - VIC newer firmware support - display/gr2d fixes for older tegra - pm reference leak fix mediatek: - SOC MT8183 support - decouple sub driver + share mtk mutex driver radeon: - PCI resource fix for some platforms ingenic: - pm support - 8-bit delta RGB panels vmwgfx: - managed driver helpers vc4: - BCM2711 DSI1 support - converted to atomic helpers - enable 10/12 bpc outputs - gem prime mmap helpers - CEC fix omap: - use degamma table - CTM support - rework DSI support imx: - stack usage fixes - drm managed support - imx-tve clock provider leak fix - rcar-du: - default mode fixes - conversion to managed API hisilicon: - use simple encoder vkms: - writeback connector support d3: - BT2020 support -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJgL1RCAAoJEAx081l5xIa+BxoP/325goULPaGBwUKgVkSl6mTT Ror0r8U3ifQHrqPk57C5b4GfvNuJ8vJZC13GYiiwooPn/+sifbl8haMRQWKyH4fz PThm9vroIQZ8VC+fqixgrOwFKEwkKqucZ3f7dEj8paBVVcO9DcBIaSeO4QW2EAR/ n2r7nHtFxVHYEwiOnJvIeWIh1dAmudr/U6pHyB6PnuofVgqveXHT5+mmkY51pJqF sn2Y+Ye3tP5+FDlKkueg8JUteyFRTGz1g7JQThxSI//b/+p4MmmRX03qcWvIIkOX XiNlP73Ssh7PPMcUgwFmvKbMfm9sfpwf7yX3nqzaAQAHZGufznxX0k50BRkxWyYL eMVxRs5/Vl5JAn3vhspAUZhc4BgOcJm9L4zazb7YqDghwpohSnXk/riunUevqFCf Dgsc8N63nft8WEBk3aB6loRpDDpo5rm8gVpl5LKk1YXT92o9x4eP+/B1+kf2RepM 52H3CKD1GLK3ayJlRNa/ljE2qXaQru+PmjCxORgDPEZ7SXdb8q5bfH0MjCB4vEBp YIybWYIDQzRBKglN5qMQ3XNIgv95oqrxXKaDFFtp8lMEjVG0v+y2antzFHftXS2g Cj0aeyBx4PC3pNbZe54npEhFwVIs7NFXX9brpQnnLJvQj/Qp+GEhf8uqiCUJNnYA AF7qRRL0bBGTeiJGt4nM =TeKl -----END PGP SIGNATURE----- Merge tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "A pretty normal tree, lots of refactoring across the board, ttm, i915, nouveau, and bunch of features in various drivers. docs: - lots of updated docs core: - require crtc to have unique primary plane - fourcc macro fix - PCI bar quirk for bar resizing - don't sent hotplug on error - move vm code to legacy - nuke hose only used on old oboslete alpha dma-buf: - kernel doc updates - improved lock tracking dp/hdmi: - DP-HDMI2.1 protocol converter support ttm: - bo size handling cleanup - release a pinned bo warning - cleanup lru handler - avoid using pages with drm_prime_sg_to_page_addr_arrays cma-helper: - prime/mmap fixes bridge: - add DP support gma500: - remove gma3600 support i915: - try eDP fast/narrow link again with fallback - Intel eDP backlight control - replace display register read/write macros - refactor intel_display.c - display power improvements - HPD code cleanup - Rocketlake display fixes - Power/backlight/RPM fixes - DG1 display fix - IVB/BYT clear residuals security fix again - make i915 mitigations options via parameter - HSW GT1 GPU hangs fixes - DG1 workaround hang fixes - TGL DMAR hang avoidance - Lots of GT fixes - follow on fixes for residuals clear - gen7 per-engine-reset support - HDCP2.2 + HDCP1.4 GEN12 DP MST support - TGL clear color support - backlight refactoring - VRR/Adaptive sync enabling on DP/EDP for TGL+ - async flips for all ilk+ amdgpu: - rework IH ring handling (Vega/Navi) - rework HDP handling (Vega/Navi) - swSMU updates for renoir/vangogh - Sienna Cichild overdrive support - FP16 on DCE8-11 support - GPU reset on navy flounder/vangogh - SMU profile fixes for APU - SR-IOV fixes - Vangogh SMU fixes - fan speed control fixes amdkfd: - config handling fix - buffer free fix - recursive lock warnings fix nouveau: - Turing MMU fault recovery fixes - mDP connectors reporting fix - audio locking fixes - rework engines/instances code to support new scheme tegra: - VIC newer firmware support - display/gr2d fixes for older tegra - pm reference leak fix mediatek: - SOC MT8183 support - decouple sub driver + share mtk mutex driver radeon: - PCI resource fix for some platforms ingenic: - pm support - 8-bit delta RGB panels vmwgfx: - managed driver helpers vc4: - BCM2711 DSI1 support - converted to atomic helpers - enable 10/12 bpc outputs - gem prime mmap helpers - CEC fix omap: - use degamma table - CTM support - rework DSI support imx: - stack usage fixes - drm managed support - imx-tve clock provider leak fix - rcar-du: - default mode fixes - conversion to managed API hisilicon: - use simple encoder vkms: - writeback connector support d3: - BT2020 support" * tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits) drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2) drm/radeon: OLAND boards don't have VCE drm/amdkfd: Fix recursive lock warnings drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth() drm/amd/display: Fix potential integer overflow drm/amdgpu/display: remove hdcp_srm sysfs on device removal drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3 drm/i915/gt: Correct surface base address for renderclear drm/i915: Disallow plane x+w>stride on ilk+ with X-tiling drm/nouveau/top/ga100: initial support drm/nouveau/top: add ioctrl/nvjpg drm/nouveau/privring: rename from ibus drm/nouveau/nvkm: remove nvkm_subdev.index drm/nouveau/nvkm: determine subdev id/order from layout drm/nouveau/vic: switch to instanced constructor drm/nouveau/sw: switch to instanced constructor drm/nouveau/sec2: switch to instanced constructor drm/nouveau/sec: switch to instanced constructor drm/nouveau/pm: switch to instanced constructor drm/nouveau/nvenc: switch to instanced constructor ...master
Linus Torvalds
commit
d99676af54
|
|
@ -84,36 +84,23 @@ properties:
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|||
const: dma-mem
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||||
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ports:
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||||
type: object
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||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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||||
$ref: /schemas/graph.yaml#/properties/ports
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properties:
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||||
"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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||||
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||||
port@0:
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type: object
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description: |
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Input endpoints of the controller.
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port@1:
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type: object
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description: |
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output endpoints of the controller.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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@ -57,35 +57,22 @@ properties:
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maxItems: 1
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ports:
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type: object
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description: |
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input endpoints of the controller.
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port@1:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Output endpoints of the controller.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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|
|
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@ -76,37 +76,24 @@ properties:
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- const: audio-tx
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ports:
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type: object
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description: |
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input endpoints of the controller.
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port@1:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Output endpoints of the controller. Usually an HDMI
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connector.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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|
|
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@ -115,31 +115,24 @@ properties:
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- const: lvds
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ports:
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type: object
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description: |
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input endpoints of the controller.
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port@1:
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type: object
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: |
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Output endpoints of the controller.
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patternProperties:
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"^endpoint(@[0-9])$":
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type: object
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$ref: /schemas/graph.yaml#/$defs/endpoint-base
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unevaluatedProperties: false
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properties:
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allwinner,tcon-channel:
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@ -156,16 +149,10 @@ properties:
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property is not present, the endpoint number will be
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used as the channel number.
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unevaluatedProperties: true
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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|
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@ -24,11 +24,9 @@ properties:
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maxItems: 1
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port:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description:
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A port node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt. The
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first port should be the input endpoint, usually coming from the
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The first port should be the input endpoint, usually coming from the
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associated TCON.
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required:
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|
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@ -46,36 +46,23 @@ properties:
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maxItems: 1
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ports:
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type: object
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description: |
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input endpoints of the controller.
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port@1:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Output endpoints of the controller.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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|
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@ -47,11 +47,9 @@ properties:
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const: dphy
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port:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description:
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A port node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt. That
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port should be the input endpoint, usually coming from the
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The port should be the input endpoint, usually coming from the
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associated TCON.
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required:
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|
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|
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@ -43,35 +43,22 @@ properties:
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maxItems: 1
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ports:
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type: object
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description: |
|
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input endpoints of the controller.
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port@1:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Output endpoints of the controller.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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|
|
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@ -93,38 +93,25 @@ properties:
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The VCC power supply of the controller
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ports:
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type: object
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description: |
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
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Input endpoints of the controller. Usually the associated
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TCON.
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port@1:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
|
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Output endpoints of the controller. Usually an HDMI
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connector.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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|
|
|
|||
|
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@ -80,141 +80,45 @@ properties:
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maxItems: 1
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ports:
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type: object
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description: |
|
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A ports node with endpoint definitions as defined in
|
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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All ports should have only one endpoint connected to
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remote endpoint.
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
|
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Input endpoint for Mixer 0 mux.
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|
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port@1:
|
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type: object
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$ref: /schemas/graph.yaml#/properties/port
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description: |
|
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Output endpoint for Mixer 0 mux
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||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg: true
|
||||
|
||||
patternProperties:
|
||||
"^endpoint@[0-9]$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
ID of the target TCON
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoint for Mixer 1 mux.
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoint for Mixer 1 mux
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg: true
|
||||
|
||||
patternProperties:
|
||||
"^endpoint@[0-9]$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
ID of the target TCON
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@4:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoint for HDMI mux.
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
reg: true
|
||||
|
||||
patternProperties:
|
||||
"^endpoint@[0-9]$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
ID of the target TCON
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
port@5:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoint for HDMI mux
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
- port@4
|
||||
- port@5
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- "#clock-cells"
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -40,36 +40,23 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Input endpoints of the controller.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Output endpoints of the controller.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -81,12 +81,12 @@ properties:
|
|||
description: phandle to an external 5V regulator to power the HDMI logic
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the VENC Input port node.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the TMDS Output port node.
|
||||
|
||||
|
|
|
|||
|
|
@ -83,12 +83,12 @@ properties:
|
|||
description: phandle to the associated power domain
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the CVBS VDAC port node.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the HDMI-TX port node.
|
||||
|
||||
|
|
|
|||
|
|
@ -53,6 +53,24 @@ properties:
|
|||
- const: audio
|
||||
- const: cec
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: CEC TX interrupt
|
||||
- description: CEC RX interrupt
|
||||
- description: CEC stuck at low interrupt
|
||||
- description: Wake-up interrupt
|
||||
- description: Hotplug connected interrupt
|
||||
- description: Hotplug removed interrupt
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: cec-tx
|
||||
- const: cec-rx
|
||||
- const: cec-low
|
||||
- const: wakeup
|
||||
- const: hpd-connected
|
||||
- const: hpd-removed
|
||||
|
||||
ddc:
|
||||
allOf:
|
||||
- $ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
|
@ -90,7 +108,7 @@ required:
|
|||
- resets
|
||||
- ddc
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -27,10 +27,9 @@ properties:
|
|||
- const: pixel
|
||||
|
||||
port:
|
||||
type: object
|
||||
description: >
|
||||
Port node with a single endpoint connecting to the panel, as
|
||||
defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Port node with a single endpoint connecting to the panel.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@ properties:
|
|||
|
||||
compatible:
|
||||
enum:
|
||||
- brcm,bcm2711-dsi1
|
||||
- brcm,bcm2835-dsi0
|
||||
- brcm,bcm2835-dsi1
|
||||
|
||||
|
|
|
|||
|
|
@ -35,16 +35,16 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for MIPI DSI input.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for panel or connector.
|
||||
|
||||
|
|
|
|||
|
|
@ -42,31 +42,18 @@ properties:
|
|||
description: Regulator for 1.0V digital core power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing input and output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Video port for HDMI input.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for SlimPort, DisplayPort, eDP or MyDP output.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
|
|
|||
|
|
@ -32,31 +32,23 @@ properties:
|
|||
description: Regulator for 2.5V digital core power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for LVTTL input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for eDP output (panel or connector).
|
||||
May be omitted if EDID works reliably.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -57,47 +57,37 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
Ports as described in Documentation/devicetree/bindings/graph.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
First input port representing the DP bridge input.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Second input port representing the DP bridge input.
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Third input port representing the DP bridge input.
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Fourth input port representing the DP bridge input.
|
||||
|
||||
port@4:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Output port representing the DP bridge output.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@4
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
|
|
|
|||
|
|
@ -19,16 +19,16 @@ properties:
|
|||
description: I2C address of the device
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Video port for RGB input.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
DVI port, should be connected to a node compatible with the
|
||||
dvi-connector binding.
|
||||
|
|
|
|||
|
|
@ -35,29 +35,21 @@ properties:
|
|||
- const: clk_mipi_cfg
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: MIPI DSI input port.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: DSI output port.
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ properties:
|
|||
description: extcon specifier for the Power Delivery
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: A port node pointing to DPI host port node
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -38,82 +38,26 @@ properties:
|
|||
description: Regulator for 3.3V IO power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Primary MIPI port-1 for MIPI input
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Additional MIPI port-2 for MIPI input, used in combination
|
||||
with primary MIPI port-1 to drive higher resolution displays
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
HDMI port for HDMI output
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 2
|
||||
|
||||
patternProperties:
|
||||
"^endpoint(@[0-9])$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@2
|
||||
|
||||
|
|
|
|||
|
|
@ -45,25 +45,17 @@ properties:
|
|||
- thine,thc63lvdm83d # For the THC63LVDM83D LVDS serializer
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
This device has two video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
For LVDS encoders, port 0 is the parallel input
|
||||
For LVDS decoders, port 0 is the LVDS input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
For LVDS encoders, port 1 is the LVDS output
|
||||
For LVDS decoders, port 1 is the parallel output
|
||||
|
|
@ -72,8 +64,6 @@ properties:
|
|||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
powerdown-gpios:
|
||||
description:
|
||||
The GPIO used to control the power down line of this device.
|
||||
|
|
|
|||
|
|
@ -84,40 +84,23 @@ properties:
|
|||
- const: pclk
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing DSI input & output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
description:
|
||||
Input port node to receive pixel data from the
|
||||
display controller. Exactly one endpoint must be
|
||||
specified.
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
endpoint@0:
|
||||
$ref: /schemas/graph.yaml#/properties/endpoint
|
||||
description: sub-node describing the input from LCDIF
|
||||
type: object
|
||||
|
||||
endpoint@1:
|
||||
$ref: /schemas/graph.yaml#/properties/endpoint
|
||||
description: sub-node describing the input from DCSS
|
||||
type: object
|
||||
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- reg
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
|
|
@ -125,28 +108,18 @@ properties:
|
|||
- required:
|
||||
- endpoint@1
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
DSI output port node to the panel or the next bridge
|
||||
in the chain
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
|
|
|||
|
|
@ -41,34 +41,22 @@ properties:
|
|||
description: Regulator for 3.3V digital core power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing DSI input & output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for DSI input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for eDP output (panel or connector).
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -49,33 +49,21 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
This device has two video ports. Their connections are modelled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
Each port shall have a single endpoint.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Parallel RGB input port
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: LVDS output port
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
|
|
@ -83,9 +71,9 @@ properties:
|
|||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle to the companion LVDS encoder. This property is mandatory
|
||||
for the first LVDS encoder on D3 and E3 SoCs, and shall point to
|
||||
the second encoder to be used as a companion in dual-link mode. It
|
||||
shall not be set for any other LVDS encoder.
|
||||
for the first LVDS encoder on R-Car D3 and E3, and RZ/G2E SoCs, and shall
|
||||
point to the second encoder to be used as a companion in dual-link mode.
|
||||
It shall not be set for any other LVDS encoder.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -30,31 +30,21 @@ properties:
|
|||
- ti,ths8135
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description: |
|
||||
This device has two video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: The bridge input
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: The bridge output
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
enable-gpios:
|
||||
maxItems: 1
|
||||
description: GPIO controlling bridge enable
|
||||
|
|
|
|||
|
|
@ -47,14 +47,15 @@ properties:
|
|||
const: apb
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Input node to receive pixel data.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: DSI output node to panel.
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -25,46 +25,41 @@ properties:
|
|||
const: thine,thc63lvd1024
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description: |
|
||||
This device has four video ports. Their connections are modeled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
The device can operate in single or dual input and output modes.
|
||||
|
||||
The device can operate in single-link mode or dual-link mode. In
|
||||
single-link mode, all pixels are received on port@0, and port@1 shall not
|
||||
contain any endpoint. In dual-link mode, even-numbered pixels are
|
||||
received on port@0 and odd-numbered pixels on port@1, and both port@0 and
|
||||
port@1 shall contain endpoints.
|
||||
When operating in single input mode, all pixels are received on port@0,
|
||||
and port@1 shall not contain any endpoint. In dual input mode,
|
||||
even-numbered pixels are received on port@0 and odd-numbered pixels on
|
||||
port@1, and both port@0 and port@1 shall contain endpoints.
|
||||
|
||||
When operating in single output mode all pixels are output from the first
|
||||
CMOS/TTL port and port@3 shall not contain any endpoint. In dual output
|
||||
mode pixels are output from both CMOS/TTL ports and both port@2 and
|
||||
port@3 shall contain endpoints.
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: First LVDS input port
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Second LVDS input port
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: First digital CMOS/TTL parallel output
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Second digital CMOS/TTL parallel output
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@2
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
oe-gpios:
|
||||
maxItems: 1
|
||||
description: Output enable GPIO signal, pin name "OE", active high.
|
||||
|
|
|
|||
|
|
@ -71,54 +71,26 @@ properties:
|
|||
description: See ../../pwm/pwm.yaml for description of the cell formats.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for MIPI DSI input
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
endpoint:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
properties:
|
||||
remote-endpoint: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description:
|
||||
Video port for eDP output (panel or connector).
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
endpoint:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
$ref: /schemas/graph.yaml#/$defs/endpoint-base
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint: true
|
||||
|
||||
data-lanes:
|
||||
oneOf:
|
||||
- minItems: 1
|
||||
|
|
@ -171,12 +143,7 @@ properties:
|
|||
dependencies:
|
||||
lane-polarities: [data-lanes]
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
|
|
|
|||
|
|
@ -31,23 +31,18 @@ properties:
|
|||
maximum: 7
|
||||
|
||||
ports:
|
||||
description:
|
||||
A node containing input and output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: DPI input port.
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
endpoint:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/endpoint-base
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
pclk-sample:
|
||||
|
|
@ -67,15 +62,8 @@ properties:
|
|||
default: 24
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: DVI output port.
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
endpoint:
|
||||
type: object
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
|
|
|||
|
|
@ -25,62 +25,20 @@ properties:
|
|||
description: Regulator for 1.2V internal core power.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for MIPI DSI input
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
endpoint:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
description: |
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Video port for MIPI DPI output (panel or connector).
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
endpoint:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
|
|
|
|||
|
|
@ -42,65 +42,30 @@ properties:
|
|||
const: refclk
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
Video port for RGB input
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
endpoint:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
$ref: /schemas/graph.yaml#/$defs/endpoint-base
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lines:
|
||||
enum: [ 16, 18, 24 ]
|
||||
|
||||
remote-endpoint: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Video port for DSI output (panel or connector).
|
||||
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
endpoint:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
remote-endpoint: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
|
|
@ -156,4 +121,3 @@ examples:
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -42,31 +42,22 @@ properties:
|
|||
description: Hardware reset, Low active
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing input and output port nodes with endpoint definitions
|
||||
as documented in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
DSI Input. The remote endpoint phandle should be a
|
||||
reference to a valid mipi_dsi_host device node.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Video port for LVDS output (panel or connector).
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Video port for Dual link LVDS output (panel or connector).
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@ properties:
|
|||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Connection to controller providing analog TV signals
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/connector/dp-connector.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: DisplayPort Connector
|
||||
|
||||
maintainers:
|
||||
- Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: dp-connector
|
||||
|
||||
label: true
|
||||
|
||||
type:
|
||||
enum:
|
||||
- full-size
|
||||
- mini
|
||||
|
||||
hpd-gpios:
|
||||
description: A GPIO line connected to HPD
|
||||
maxItems: 1
|
||||
|
||||
dp-pwr-supply:
|
||||
description: Power supply for the DP_PWR pin
|
||||
maxItems: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Connection to controller providing DP signals
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- type
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
connector {
|
||||
compatible = "dp-connector";
|
||||
label = "dp0";
|
||||
type = "full-size";
|
||||
|
||||
port {
|
||||
dp_connector_in: endpoint {
|
||||
remote-endpoint = <&dp_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -36,6 +36,7 @@ properties:
|
|||
description: the connector has pins for DVI dual-link
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Connection to controller providing DVI signals
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -37,6 +37,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Connection to controller providing HDMI signals
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ properties:
|
|||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Connection to controller providing VGA signals
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@ properties:
|
|||
- description: Must be 400 MHz
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A port node pointing to the input port of a HDMI/DP or MIPI display bridge.
|
||||
|
||||
|
|
|
|||
|
|
@ -31,9 +31,8 @@ properties:
|
|||
clock-names:
|
||||
const: ipu
|
||||
|
||||
patternProperties:
|
||||
"^ports?$":
|
||||
description: OF graph bindings (specified in bindings/graph.txt).
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -39,18 +39,18 @@ properties:
|
|||
minItems: 1
|
||||
|
||||
port:
|
||||
description: OF graph bindings (specified in bindings/graph.txt).
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
ports:
|
||||
description: OF graph bindings (specified in bindings/graph.txt).
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: DPI output, to interface with TFT panels.
|
||||
|
||||
port@8:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Link to the Image Processing Unit (IPU).
|
||||
(See ingenic,ipu.yaml).
|
||||
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Display output node to DSI.
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -37,13 +37,14 @@ Required properties (all function blocks):
|
|||
"mediatek,<chip>-disp-aal" - adaptive ambient light controller
|
||||
"mediatek,<chip>-disp-gamma" - gamma correction
|
||||
"mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
|
||||
"mediatek,<chip>-disp-postmask" - control round corner for display frame
|
||||
"mediatek,<chip>-disp-split" - split stream to two encoders
|
||||
"mediatek,<chip>-disp-ufoe" - data compression engine
|
||||
"mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
|
||||
"mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
|
||||
"mediatek,<chip>-disp-mutex" - display mutex
|
||||
"mediatek,<chip>-disp-od" - overdrive
|
||||
the supported chips are mt2701, mt7623, mt2712, mt8167 and mt8173.
|
||||
the supported chips are mt2701, mt7623, mt2712, mt8167, mt8173, mt8183 and mt8192.
|
||||
- reg: Physical base address and length of the function block register space
|
||||
- interrupts: The interrupt signal from the function block (required, except for
|
||||
merge and split function blocks).
|
||||
|
|
@ -66,6 +67,14 @@ Required properties (DMA function blocks):
|
|||
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
|
||||
for details.
|
||||
|
||||
Optional properties (RDMA function blocks):
|
||||
- mediatek,rdma-fifo-size: rdma fifo size may be different even in same SOC, add this
|
||||
property to the corresponding rdma
|
||||
the value is the Max value which defined in hardware data sheet.
|
||||
mediatek,rdma-fifo-size of mt8173-rdma0 is 8K
|
||||
mediatek,rdma-fifo-size of mt8183-rdma0 is 5K
|
||||
mediatek,rdma-fifo-size of mt8183-rdma1 is 2K
|
||||
|
||||
Examples:
|
||||
|
||||
mmsys: clock-controller@14000000 {
|
||||
|
|
@ -103,6 +112,7 @@ rdma0: rdma@1400e000 {
|
|||
clocks = <&mmsys CLK_MM_DISP_RDMA0>;
|
||||
iommus = <&iommu M4U_PORT_DISP_RDMA0>;
|
||||
mediatek,larb = <&larb0>;
|
||||
mediatek,rdma-fifosize = <8192>;
|
||||
};
|
||||
|
||||
rdma1: rdma@1400f000 {
|
||||
|
|
|
|||
|
|
@ -37,34 +37,33 @@ properties:
|
|||
panel-timing: true
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: The sink for odd pixels.
|
||||
properties:
|
||||
reg:
|
||||
const: 0
|
||||
|
||||
dual-lvds-odd-pixels: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
- dual-lvds-odd-pixels
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: The sink for even pixels.
|
||||
properties:
|
||||
reg:
|
||||
const: 1
|
||||
|
||||
dual-lvds-even-pixels: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
- dual-lvds-even-pixels
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ properties:
|
|||
compatible:
|
||||
enum:
|
||||
- mantix,mlaf057we51-x
|
||||
- ys,ys57pss36bh5gq
|
||||
|
||||
port: true
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -68,16 +68,7 @@ properties:
|
|||
|
||||
# Connectivity
|
||||
port:
|
||||
type: object
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
Panels receive video data through one or multiple connections. While
|
||||
the nature of those connections is specific to the panel type, the
|
||||
connectivity is expressed in a standard fashion using ports as specified
|
||||
in the device graph bindings defined in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
ddc-i2c-bus:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
|
|
|||
|
|
@ -35,6 +35,8 @@ properties:
|
|||
- boe,tv080wum-nl0
|
||||
# Innolux P079ZCA 7.85" 768x1024 TFT LCD panel
|
||||
- innolux,p079zca
|
||||
# Khadas TS050 5" 1080x1920 LCD panel
|
||||
- khadas,ts050
|
||||
# Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
|
||||
- kingdisplay,kd097d04
|
||||
# LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
|
||||
|
|
|
|||
|
|
@ -76,6 +76,8 @@ properties:
|
|||
# BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel
|
||||
- boe,nv101wxmn51
|
||||
# BOE NV133FHM-N61 13.3" FHD (1920x1080) TFT LCD Panel
|
||||
- boe,nv110wtm-n61
|
||||
# BOE NV110WTM-N61 11.0" 2160x1440 TFT LCD Panel
|
||||
- boe,nv133fhm-n61
|
||||
# BOE NV133FHM-N62 13.3" FHD (1920x1080) TFT LCD Panel
|
||||
- boe,nv133fhm-n62
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ maintainers:
|
|||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- $ref: /schemas/leds/backlight/common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -19,6 +20,8 @@ properties:
|
|||
reg: true
|
||||
reset-gpios: true
|
||||
port: true
|
||||
default-brightness: true
|
||||
max-brightness: true
|
||||
|
||||
vdd3-supply:
|
||||
description: VDD regulator
|
||||
|
|
@ -31,7 +34,6 @@ required:
|
|||
- reset-gpios
|
||||
- vdd3-supply
|
||||
- vci-supply
|
||||
- port
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -43,34 +43,24 @@ properties:
|
|||
This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Port node with two endpoints, numbered 0 and 1,
|
||||
connected respectively to vop0 and vop1.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Port node with one endpoint connected to a hdmi-connector node.
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -70,10 +70,7 @@ properties:
|
|||
- const: dclk
|
||||
|
||||
port:
|
||||
type: object
|
||||
description:
|
||||
A port node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 2
|
||||
|
|
|
|||
|
|
@ -51,20 +51,16 @@ properties:
|
|||
Phandle of the regulator that provides the supply voltage.
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
A node containing DSI input & output port nodes with endpoint
|
||||
definitions as documented in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
DSI input port node, connected to the ltdc rgb output port.
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
DSI output port node, connected to a panel or a bridge input port"
|
||||
|
||||
|
|
|
|||
|
|
@ -35,15 +35,13 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
port:
|
||||
type: object
|
||||
description:
|
||||
"Video port for DPI RGB output.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
Video port for DPI RGB output.
|
||||
ltdc has one video port with up to 2 endpoints:
|
||||
- for external dpi rgb panel or bridge, using gpios.
|
||||
- for internal dpi input of the MIPI DSI host controller.
|
||||
Note: These 2 endpoints cannot be activated simultaneously.
|
||||
Please refer to the bindings defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt."
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -1,104 +0,0 @@
|
|||
ST-Ericsson Multi Channel Display Engine MCDE
|
||||
|
||||
The ST-Ericsson MCDE is a display controller with support for compositing
|
||||
and displaying several channels memory resident graphics data on DSI or
|
||||
LCD displays or bridges. It is used in the ST-Ericsson U8500 platform.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: must be:
|
||||
"ste,mcde"
|
||||
- reg: register base for the main MCDE control registers, should be
|
||||
0x1000 in size
|
||||
- interrupts: the interrupt line for the MCDE
|
||||
- epod-supply: a phandle to the EPOD regulator
|
||||
- vana-supply: a phandle to the analog voltage regulator
|
||||
- clocks: an array of the MCDE clocks in this strict order:
|
||||
MCDECLK (main MCDE clock), LCDCLK (LCD clock), PLLDSI
|
||||
(HDMI clock), DSI0ESCLK (DSI0 energy save clock),
|
||||
DSI1ESCLK (DSI1 energy save clock), DSI2ESCLK (DSI2 energy
|
||||
save clock)
|
||||
- clock-names: must be the following array:
|
||||
"mcde", "lcd", "hdmi"
|
||||
to match the required clock inputs above.
|
||||
- #address-cells: should be <1> (for the DSI hosts that will be children)
|
||||
- #size-cells: should be <1> (for the DSI hosts that will be children)
|
||||
- ranges: this should always be stated
|
||||
|
||||
Required subnodes:
|
||||
|
||||
The devicetree must specify subnodes for the DSI host adapters.
|
||||
These must have the following characteristics:
|
||||
|
||||
- compatible: must be:
|
||||
"ste,mcde-dsi"
|
||||
- reg: must specify the register range for the DSI host
|
||||
- vana-supply: phandle to the VANA voltage regulator
|
||||
- clocks: phandles to the high speed and low power (energy save) clocks
|
||||
the high speed clock is not present on the third (dsi2) block, so it
|
||||
should only have the "lp" clock
|
||||
- clock-names: "hs" for the high speed clock and "lp" for the low power
|
||||
(energy save) clock
|
||||
- #address-cells: should be <1>
|
||||
- #size-cells: should be <0>
|
||||
|
||||
Display panels and bridges will appear as children on the DSI hosts, and
|
||||
the displays are connected to the DSI hosts using the common binding
|
||||
for video transmitter interfaces; see
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt
|
||||
|
||||
If a DSI host is unused (not connected) it will have no children defined.
|
||||
|
||||
Example:
|
||||
|
||||
mcde@a0350000 {
|
||||
compatible = "ste,mcde";
|
||||
reg = <0xa0350000 0x1000>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
epod-supply = <&db8500_b2r2_mcde_reg>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
|
||||
<&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
|
||||
<&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
|
||||
clock-names = "mcde", "lcd", "hdmi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dsi0: dsi@a0351000 {
|
||||
compatible = "ste,mcde-dsi";
|
||||
reg = <0xa0351000 0x1000>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
|
||||
clock-names = "hs", "lp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel {
|
||||
compatible = "samsung,s6d16d0";
|
||||
reg = <0>;
|
||||
vdd1-supply = <&ab8500_ldo_aux1_reg>;
|
||||
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
};
|
||||
dsi1: dsi@a0352000 {
|
||||
compatible = "ste,mcde-dsi";
|
||||
reg = <0xa0352000 0x1000>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
|
||||
clock-names = "hs", "lp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
dsi2: dsi@a0353000 {
|
||||
compatible = "ste,mcde-dsi";
|
||||
reg = <0xa0353000 0x1000>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
/* This DSI port only has the Low Power / Energy Save clock */
|
||||
clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
|
||||
clock-names = "lp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,168 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/ste,mcde.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ST-Ericsson Multi Channel Display Engine MCDE
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ste,mcde
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: an array of the MCDE clocks
|
||||
items:
|
||||
- description: MCDECLK (main MCDE clock)
|
||||
- description: LCDCLK (LCD clock)
|
||||
- description: PLLDSI (HDMI clock)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: mcde
|
||||
- const: lcd
|
||||
- const: hdmi
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
epod-supply:
|
||||
description: a phandle to the EPOD regulator
|
||||
|
||||
vana-supply:
|
||||
description: a phandle to the analog voltage regulator
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
A DPI port node
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
patternProperties:
|
||||
"^dsi@[0-9a-f]+$":
|
||||
description: subnodes for the three DSI host adapters
|
||||
type: object
|
||||
allOf:
|
||||
- $ref: dsi-controller.yaml#
|
||||
properties:
|
||||
compatible:
|
||||
const: ste,mcde-dsi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vana-supply:
|
||||
description: a phandle to the analog voltage regulator
|
||||
|
||||
clocks:
|
||||
description: phandles to the high speed and low power (energy save) clocks
|
||||
the high speed clock is not present on the third (dsi2) block, so it
|
||||
should only have the "lp" clock
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: hs
|
||||
- const: lp
|
||||
- items:
|
||||
- const: lp
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vana-supply
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- epod-supply
|
||||
- vana-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/mfd/dbx500-prcmu.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
mcde@a0350000 {
|
||||
compatible = "ste,mcde";
|
||||
reg = <0xa0350000 0x1000>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
epod-supply = <&db8500_b2r2_mcde_reg>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
clocks = <&prcmu_clk PRCMU_MCDECLK>,
|
||||
<&prcmu_clk PRCMU_LCDCLK>,
|
||||
<&prcmu_clk PRCMU_PLLDSI>;
|
||||
clock-names = "mcde", "lcd", "hdmi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dsi0: dsi@a0351000 {
|
||||
compatible = "ste,mcde-dsi";
|
||||
reg = <0xa0351000 0x1000>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
|
||||
clock-names = "hs", "lp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "samsung,s6d16d0";
|
||||
reg = <0>;
|
||||
vdd1-supply = <&ab8500_ldo_aux1_reg>;
|
||||
reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
dsi1: dsi@a0352000 {
|
||||
compatible = "ste,mcde-dsi";
|
||||
reg = <0xa0352000 0x1000>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
|
||||
clock-names = "hs", "lp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
dsi2: dsi@a0353000 {
|
||||
compatible = "ste,mcde-dsi";
|
||||
reg = <0xa0353000 0x1000>;
|
||||
vana-supply = <&ab8500_ldo_ana_reg>;
|
||||
/* This DSI port only has the Low Power / Energy Save clock */
|
||||
clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
|
||||
clock-names = "lp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -74,30 +74,19 @@ properties:
|
|||
type: boolean
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
Ports as described in Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
The DSS OLDI output port node form video port 1
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
The DSS DPI output port node from video port 2
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
ti,am65x-oldi-io-ctrl:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -107,40 +107,29 @@ properties:
|
|||
type: boolean
|
||||
|
||||
ports:
|
||||
type: object
|
||||
description:
|
||||
Ports as described in Documentation/devicetree/bindings/graph.txt
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
The output port node form video port 1
|
||||
|
||||
port@1:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
The output port node from video port 2
|
||||
|
||||
port@2:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
The output port node from video port 3
|
||||
|
||||
port@3:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
The output port node from video port 4
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
|
||||
max-memory-bandwidth:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -54,9 +54,8 @@ properties:
|
|||
description: phandle to the associated power domain
|
||||
|
||||
port:
|
||||
type: object
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
Port as described in Documentation/devicetree/bindings/graph.txt.
|
||||
The DSS DPI output port node
|
||||
|
||||
max-memory-bandwidth:
|
||||
|
|
|
|||
|
|
@ -1272,6 +1272,8 @@ patternProperties:
|
|||
description: YSH & ATIL
|
||||
"^yones-toptech,.*":
|
||||
description: Yones Toptech Co., Ltd.
|
||||
"^ys,.*":
|
||||
description: Shenzhen Yashi Changhua Intelligent Technology Co., Ltd.
|
||||
"^ysoft,.*":
|
||||
description: Y Soft Corporation a.s.
|
||||
"^zealz,.*":
|
||||
|
|
|
|||
|
|
@ -319,6 +319,15 @@ CRTC Functions Reference
|
|||
.. kernel-doc:: drivers/gpu/drm/drm_crtc.c
|
||||
:export:
|
||||
|
||||
Color Management Functions Reference
|
||||
------------------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_color_mgmt.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: include/drm/drm_color_mgmt.h
|
||||
:internal:
|
||||
|
||||
Frame Buffer Abstraction
|
||||
========================
|
||||
|
||||
|
|
@ -370,6 +379,21 @@ Plane Functions Reference
|
|||
.. kernel-doc:: drivers/gpu/drm/drm_plane.c
|
||||
:export:
|
||||
|
||||
Plane Composition Functions Reference
|
||||
-------------------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_blend.c
|
||||
:export:
|
||||
|
||||
Plane Damage Tracking Functions Reference
|
||||
-----------------------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_damage_helper.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: include/drm/drm_damage_helper.h
|
||||
:internal:
|
||||
|
||||
Display Modes Function Reference
|
||||
================================
|
||||
|
||||
|
|
@ -436,6 +460,9 @@ KMS Locking
|
|||
KMS Properties
|
||||
==============
|
||||
|
||||
This section of the documentation is primarily aimed at user-space developers.
|
||||
For the driver APIs, see the other sections.
|
||||
|
||||
Property Types and Blob Property Support
|
||||
----------------------------------------
|
||||
|
||||
|
|
@ -466,39 +493,30 @@ Standard CRTC Properties
|
|||
.. kernel-doc:: drivers/gpu/drm/drm_crtc.c
|
||||
:doc: standard CRTC properties
|
||||
|
||||
Standard Plane Properties
|
||||
-------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_plane.c
|
||||
:doc: standard plane properties
|
||||
|
||||
Plane Composition Properties
|
||||
----------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_blend.c
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_blend.c
|
||||
:export:
|
||||
|
||||
FB_DAMAGE_CLIPS
|
||||
~~~~~~~~~~~~~~~
|
||||
Damage Tracking Properties
|
||||
--------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_damage_helper.c
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_damage_helper.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: include/drm/drm_damage_helper.h
|
||||
:internal:
|
||||
|
||||
Color Management Properties
|
||||
---------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_color_mgmt.c
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_color_mgmt.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: include/drm/drm_color_mgmt.h
|
||||
:internal:
|
||||
|
||||
Tile Group Property
|
||||
-------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -457,5 +457,8 @@ Userspace API Structures
|
|||
.. kernel-doc:: include/uapi/drm/drm_mode.h
|
||||
:doc: overview
|
||||
|
||||
.. kernel-doc:: include/uapi/drm/drm.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: include/uapi/drm/drm_mode.h
|
||||
:internal:
|
||||
|
|
|
|||
|
|
@ -428,7 +428,7 @@ User Batchbuffer Execution
|
|||
Logical Rings, Logical Ring Contexts and Execlists
|
||||
--------------------------------------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_lrc.c
|
||||
.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_execlists_submission.c
|
||||
:doc: Logical Rings, Logical Ring Contexts and Execlists
|
||||
|
||||
Global GTT views
|
||||
|
|
|
|||
|
|
@ -23,6 +23,9 @@ Advanced: Tricky tasks that need fairly good understanding of the DRM subsystem
|
|||
and graphics topics. Generally need the relevant hardware for development and
|
||||
testing.
|
||||
|
||||
Expert: Only attempt these if you've successfully completed some tricky
|
||||
refactorings already and are an expert in the specific area
|
||||
|
||||
Subsystem-wide refactorings
|
||||
===========================
|
||||
|
||||
|
|
@ -168,6 +171,22 @@ Contact: Daniel Vetter, respective driver maintainers
|
|||
|
||||
Level: Advanced
|
||||
|
||||
Move Buffer Object Locking to dma_resv_lock()
|
||||
---------------------------------------------
|
||||
|
||||
Many drivers have their own per-object locking scheme, usually using
|
||||
mutex_lock(). This causes all kinds of trouble for buffer sharing, since
|
||||
depending which driver is the exporter and importer, the locking hierarchy is
|
||||
reversed.
|
||||
|
||||
To solve this we need one standard per-object locking mechanism, which is
|
||||
dma_resv_lock(). This lock needs to be called as the outermost lock, with all
|
||||
other driver specific per-object locks removed. The problem is tha rolling out
|
||||
the actual change to the locking contract is a flag day, due to struct dma_buf
|
||||
buffer sharing.
|
||||
|
||||
Level: Expert
|
||||
|
||||
Convert logging to drm_* functions with drm_device paramater
|
||||
------------------------------------------------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -7,6 +7,88 @@
|
|||
.. kernel-doc:: drivers/gpu/drm/vkms/vkms_drv.c
|
||||
:doc: vkms (Virtual Kernel Modesetting)
|
||||
|
||||
Setup
|
||||
=====
|
||||
|
||||
The VKMS driver can be setup with the following steps:
|
||||
|
||||
To check if VKMS is loaded, run::
|
||||
|
||||
lsmod | grep vkms
|
||||
|
||||
This should list the VKMS driver. If no output is obtained, then
|
||||
you need to enable and/or load the VKMS driver.
|
||||
Ensure that the VKMS driver has been set as a loadable module in your
|
||||
kernel config file. Do::
|
||||
|
||||
make nconfig
|
||||
|
||||
Go to `Device Drivers> Graphics support`
|
||||
|
||||
Enable `Virtual KMS (EXPERIMENTAL)`
|
||||
|
||||
Compile and build the kernel for the changes to get reflected.
|
||||
Now, to load the driver, use::
|
||||
|
||||
sudo modprobe vkms
|
||||
|
||||
On running the lsmod command now, the VKMS driver will appear listed.
|
||||
You can also observe the driver being loaded in the dmesg logs.
|
||||
|
||||
The VKMS driver has optional features to simulate different kinds of hardware,
|
||||
which are exposed as module options. You can use the `modinfo` command
|
||||
to see the module options for vkms::
|
||||
|
||||
modinfo vkms
|
||||
|
||||
Module options are helpful when testing, and enabling modules
|
||||
can be done while loading vkms. For example, to load vkms with cursor enabled,
|
||||
use::
|
||||
|
||||
sudo modprobe vkms enable_cursor=1
|
||||
|
||||
To disable the driver, use ::
|
||||
|
||||
sudo modprobe -r vkms
|
||||
|
||||
Testing With IGT
|
||||
================
|
||||
|
||||
The IGT GPU Tools is a test suite used specifically for debugging and
|
||||
development of the DRM drivers.
|
||||
The IGT Tools can be installed from
|
||||
`here <https://gitlab.freedesktop.org/drm/igt-gpu-tools>`_ .
|
||||
|
||||
The tests need to be run without a compositor, so you need to switch to text
|
||||
only mode. You can do this by::
|
||||
|
||||
sudo systemctl isolate multi-user.target
|
||||
|
||||
To return to graphical mode, do::
|
||||
|
||||
sudo systemctl isolate graphical.target
|
||||
|
||||
Once you are in text only mode, you can run tests using the --device switch
|
||||
or IGT_DEVICE variable to specify the device filter for the driver we want
|
||||
to test. IGT_DEVICE can also be used with the run-test.sh script to run the
|
||||
tests for a specific driver::
|
||||
|
||||
sudo ./build/tests/<name of test> --device "sys:/sys/devices/platform/vkms"
|
||||
sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./build/tests/<name of test>
|
||||
sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./scripts/run-tests.sh -t <name of test>
|
||||
|
||||
For example, to test the functionality of the writeback library,
|
||||
we can run the kms_writeback test::
|
||||
|
||||
sudo ./build/tests/kms_writeback --device "sys:/sys/devices/platform/vkms"
|
||||
sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./build/tests/kms_writeback
|
||||
sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./scripts/run-tests.sh -t kms_writeback
|
||||
|
||||
You can also run subtests if you do not want to run the entire test::
|
||||
|
||||
sudo ./build/tests/kms_flip --run-subtest basic-plain-flip --device "sys:/sys/devices/platform/vkms"
|
||||
sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./build/tests/kms_flip --run-subtest basic-plain-flip
|
||||
|
||||
TODO
|
||||
====
|
||||
|
||||
|
|
|
|||
11
MAINTAINERS
11
MAINTAINERS
|
|
@ -5760,6 +5760,7 @@ F: drivers/gpu/drm/vboxvideo/
|
|||
DRM DRIVER FOR VMWARE VIRTUAL GPU
|
||||
M: "VMware Graphics" <linux-graphics-maintainer@vmware.com>
|
||||
M: Roland Scheidegger <sroland@vmware.com>
|
||||
M: Zack Rusin <zackr@vmware.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Supported
|
||||
T: git git://people.freedesktop.org/~sroland/linux
|
||||
|
|
@ -5961,8 +5962,8 @@ F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml
|
|||
F: drivers/gpu/drm/stm
|
||||
|
||||
DRM DRIVERS FOR TI KEYSTONE
|
||||
M: Jyri Sarha <jsarha@ti.com>
|
||||
M: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
M: Jyri Sarha <jyri.sarha@iki.fi>
|
||||
M: Tomi Valkeinen <tomba@kernel.org>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
|
|
@ -5972,15 +5973,15 @@ F: Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
|
|||
F: drivers/gpu/drm/tidss/
|
||||
|
||||
DRM DRIVERS FOR TI LCDC
|
||||
M: Jyri Sarha <jsarha@ti.com>
|
||||
R: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
M: Jyri Sarha <jyri.sarha@iki.fi>
|
||||
R: Tomi Valkeinen <tomba@kernel.org>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/display/tilcdc/
|
||||
F: drivers/gpu/drm/tilcdc/
|
||||
|
||||
DRM DRIVERS FOR TI OMAP
|
||||
M: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
||||
M: Tomi Valkeinen <tomba@kernel.org>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/display/ti/
|
||||
|
|
|
|||
|
|
@ -518,6 +518,9 @@
|
|||
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
|
||||
<&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
|
||||
clock-names = "fck", "sys_clk";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -550,6 +553,9 @@
|
|||
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
|
||||
<&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
|
||||
clock-names = "fck", "sys_clk";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -356,8 +356,8 @@ CONFIG_DRM_OMAP=m
|
|||
CONFIG_OMAP5_DSS_HDMI=y
|
||||
CONFIG_OMAP2_DSS_SDI=y
|
||||
CONFIG_OMAP2_DSS_DSI=y
|
||||
CONFIG_DRM_OMAP_PANEL_DSI_CM=m
|
||||
CONFIG_DRM_TILCDC=m
|
||||
CONFIG_DRM_PANEL_DSI_CM=m
|
||||
CONFIG_DRM_PANEL_SIMPLE=m
|
||||
CONFIG_DRM_PANEL_LG_LB035Q02=m
|
||||
CONFIG_DRM_PANEL_NEC_NL8048HL11=m
|
||||
|
|
|
|||
|
|
@ -50,6 +50,14 @@ config DMABUF_MOVE_NOTIFY
|
|||
This is marked experimental because we don't yet have a consistent
|
||||
execution context and memory management between drivers.
|
||||
|
||||
config DMABUF_DEBUG
|
||||
bool "DMA-BUF debug checks"
|
||||
default y if DMA_API_DEBUG
|
||||
help
|
||||
This option enables additional checks for DMA-BUF importers and
|
||||
exporters. Specifically it validates that importers do not peek at the
|
||||
underlying struct page when they import a buffer.
|
||||
|
||||
config DMABUF_SELFTESTS
|
||||
tristate "Selftests for the dma-buf interfaces"
|
||||
default n
|
||||
|
|
|
|||
|
|
@ -493,7 +493,7 @@ err_alloc_file:
|
|||
*
|
||||
* 4. Once a driver is done with a shared buffer it needs to call
|
||||
* dma_buf_detach() (after cleaning up any mappings) and then release the
|
||||
* reference acquired with dma_buf_get by calling dma_buf_put().
|
||||
* reference acquired with dma_buf_get() by calling dma_buf_put().
|
||||
*
|
||||
* For the detailed semantics exporters are expected to implement see
|
||||
* &dma_buf_ops.
|
||||
|
|
@ -509,9 +509,10 @@ err_alloc_file:
|
|||
* by the exporter. see &struct dma_buf_export_info
|
||||
* for further details.
|
||||
*
|
||||
* Returns, on success, a newly created dma_buf object, which wraps the
|
||||
* supplied private data and operations for dma_buf_ops. On either missing
|
||||
* ops, or error in allocating struct dma_buf, will return negative error.
|
||||
* Returns, on success, a newly created struct dma_buf object, which wraps the
|
||||
* supplied private data and operations for struct dma_buf_ops. On either
|
||||
* missing ops, or error in allocating struct dma_buf, will return negative
|
||||
* error.
|
||||
*
|
||||
* For most cases the easiest way to create @exp_info is through the
|
||||
* %DEFINE_DMA_BUF_EXPORT_INFO macro.
|
||||
|
|
@ -597,7 +598,7 @@ err_module:
|
|||
EXPORT_SYMBOL_GPL(dma_buf_export);
|
||||
|
||||
/**
|
||||
* dma_buf_fd - returns a file descriptor for the given dma_buf
|
||||
* dma_buf_fd - returns a file descriptor for the given struct dma_buf
|
||||
* @dmabuf: [in] pointer to dma_buf for which fd is required.
|
||||
* @flags: [in] flags to give to fd
|
||||
*
|
||||
|
|
@ -621,10 +622,10 @@ int dma_buf_fd(struct dma_buf *dmabuf, int flags)
|
|||
EXPORT_SYMBOL_GPL(dma_buf_fd);
|
||||
|
||||
/**
|
||||
* dma_buf_get - returns the dma_buf structure related to an fd
|
||||
* @fd: [in] fd associated with the dma_buf to be returned
|
||||
* dma_buf_get - returns the struct dma_buf related to an fd
|
||||
* @fd: [in] fd associated with the struct dma_buf to be returned
|
||||
*
|
||||
* On success, returns the dma_buf structure associated with an fd; uses
|
||||
* On success, returns the struct dma_buf associated with an fd; uses
|
||||
* file's refcounting done by fget to increase refcount. returns ERR_PTR
|
||||
* otherwise.
|
||||
*/
|
||||
|
|
@ -665,9 +666,36 @@ void dma_buf_put(struct dma_buf *dmabuf)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(dma_buf_put);
|
||||
|
||||
static void mangle_sg_table(struct sg_table *sg_table)
|
||||
{
|
||||
#ifdef CONFIG_DMABUF_DEBUG
|
||||
int i;
|
||||
struct scatterlist *sg;
|
||||
|
||||
/* To catch abuse of the underlying struct page by importers mix
|
||||
* up the bits, but take care to preserve the low SG_ bits to
|
||||
* not corrupt the sgt. The mixing is undone in __unmap_dma_buf
|
||||
* before passing the sgt back to the exporter. */
|
||||
for_each_sgtable_sg(sg_table, sg, i)
|
||||
sg->page_link ^= ~0xffUL;
|
||||
#endif
|
||||
|
||||
}
|
||||
static struct sg_table * __map_dma_buf(struct dma_buf_attachment *attach,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
struct sg_table *sg_table;
|
||||
|
||||
sg_table = attach->dmabuf->ops->map_dma_buf(attach, direction);
|
||||
|
||||
if (!IS_ERR_OR_NULL(sg_table))
|
||||
mangle_sg_table(sg_table);
|
||||
|
||||
return sg_table;
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_buf_dynamic_attach - Add the device to dma_buf's attachments list; optionally,
|
||||
* calls attach() of dma_buf_ops to allow device-specific attach functionality
|
||||
* dma_buf_dynamic_attach - Add the device to dma_buf's attachments list
|
||||
* @dmabuf: [in] buffer to attach device to.
|
||||
* @dev: [in] device to be attached.
|
||||
* @importer_ops: [in] importer operations for the attachment
|
||||
|
|
@ -676,6 +704,9 @@ EXPORT_SYMBOL_GPL(dma_buf_put);
|
|||
* Returns struct dma_buf_attachment pointer for this attachment. Attachments
|
||||
* must be cleaned up by calling dma_buf_detach().
|
||||
*
|
||||
* Optionally this calls &dma_buf_ops.attach to allow device-specific attach
|
||||
* functionality.
|
||||
*
|
||||
* Returns:
|
||||
*
|
||||
* A pointer to newly created &dma_buf_attachment on success, or a negative
|
||||
|
|
@ -734,7 +765,7 @@ dma_buf_dynamic_attach(struct dma_buf *dmabuf, struct device *dev,
|
|||
goto err_unlock;
|
||||
}
|
||||
|
||||
sgt = dmabuf->ops->map_dma_buf(attach, DMA_BIDIRECTIONAL);
|
||||
sgt = __map_dma_buf(attach, DMA_BIDIRECTIONAL);
|
||||
if (!sgt)
|
||||
sgt = ERR_PTR(-ENOMEM);
|
||||
if (IS_ERR(sgt)) {
|
||||
|
|
@ -781,13 +812,24 @@ struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(dma_buf_attach);
|
||||
|
||||
static void __unmap_dma_buf(struct dma_buf_attachment *attach,
|
||||
struct sg_table *sg_table,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
/* uses XOR, hence this unmangles */
|
||||
mangle_sg_table(sg_table);
|
||||
|
||||
attach->dmabuf->ops->unmap_dma_buf(attach, sg_table, direction);
|
||||
}
|
||||
|
||||
/**
|
||||
* dma_buf_detach - Remove the given attachment from dmabuf's attachments list;
|
||||
* optionally calls detach() of dma_buf_ops for device-specific detach
|
||||
* dma_buf_detach - Remove the given attachment from dmabuf's attachments list
|
||||
* @dmabuf: [in] buffer to detach from.
|
||||
* @attach: [in] attachment to be detached; is free'd after this call.
|
||||
*
|
||||
* Clean up a device attachment obtained by calling dma_buf_attach().
|
||||
*
|
||||
* Optionally this calls &dma_buf_ops.detach for device-specific detach.
|
||||
*/
|
||||
void dma_buf_detach(struct dma_buf *dmabuf, struct dma_buf_attachment *attach)
|
||||
{
|
||||
|
|
@ -798,7 +840,7 @@ void dma_buf_detach(struct dma_buf *dmabuf, struct dma_buf_attachment *attach)
|
|||
if (dma_buf_is_dynamic(attach->dmabuf))
|
||||
dma_resv_lock(attach->dmabuf->resv, NULL);
|
||||
|
||||
dmabuf->ops->unmap_dma_buf(attach, attach->sgt, attach->dir);
|
||||
__unmap_dma_buf(attach, attach->sgt, attach->dir);
|
||||
|
||||
if (dma_buf_is_dynamic(attach->dmabuf)) {
|
||||
dma_buf_unpin(attach);
|
||||
|
|
@ -818,9 +860,15 @@ EXPORT_SYMBOL_GPL(dma_buf_detach);
|
|||
|
||||
/**
|
||||
* dma_buf_pin - Lock down the DMA-buf
|
||||
*
|
||||
* @attach: [in] attachment which should be pinned
|
||||
*
|
||||
* Only dynamic importers (who set up @attach with dma_buf_dynamic_attach()) may
|
||||
* call this, and only for limited use cases like scanout and not for temporary
|
||||
* pin operations. It is not permitted to allow userspace to pin arbitrary
|
||||
* amounts of buffers through this interface.
|
||||
*
|
||||
* Buffers must be unpinned by calling dma_buf_unpin().
|
||||
*
|
||||
* Returns:
|
||||
* 0 on success, negative error code on failure.
|
||||
*/
|
||||
|
|
@ -829,6 +877,8 @@ int dma_buf_pin(struct dma_buf_attachment *attach)
|
|||
struct dma_buf *dmabuf = attach->dmabuf;
|
||||
int ret = 0;
|
||||
|
||||
WARN_ON(!dma_buf_attachment_is_dynamic(attach));
|
||||
|
||||
dma_resv_assert_held(dmabuf->resv);
|
||||
|
||||
if (dmabuf->ops->pin)
|
||||
|
|
@ -839,14 +889,19 @@ int dma_buf_pin(struct dma_buf_attachment *attach)
|
|||
EXPORT_SYMBOL_GPL(dma_buf_pin);
|
||||
|
||||
/**
|
||||
* dma_buf_unpin - Remove lock from DMA-buf
|
||||
*
|
||||
* dma_buf_unpin - Unpin a DMA-buf
|
||||
* @attach: [in] attachment which should be unpinned
|
||||
*
|
||||
* This unpins a buffer pinned by dma_buf_pin() and allows the exporter to move
|
||||
* any mapping of @attach again and inform the importer through
|
||||
* &dma_buf_attach_ops.move_notify.
|
||||
*/
|
||||
void dma_buf_unpin(struct dma_buf_attachment *attach)
|
||||
{
|
||||
struct dma_buf *dmabuf = attach->dmabuf;
|
||||
|
||||
WARN_ON(!dma_buf_attachment_is_dynamic(attach));
|
||||
|
||||
dma_resv_assert_held(dmabuf->resv);
|
||||
|
||||
if (dmabuf->ops->unpin)
|
||||
|
|
@ -907,7 +962,7 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach,
|
|||
}
|
||||
}
|
||||
|
||||
sg_table = attach->dmabuf->ops->map_dma_buf(attach, direction);
|
||||
sg_table = __map_dma_buf(attach, direction);
|
||||
if (!sg_table)
|
||||
sg_table = ERR_PTR(-ENOMEM);
|
||||
|
||||
|
|
@ -970,7 +1025,7 @@ void dma_buf_unmap_attachment(struct dma_buf_attachment *attach,
|
|||
if (dma_buf_is_dynamic(attach->dmabuf))
|
||||
dma_resv_assert_held(attach->dmabuf->resv);
|
||||
|
||||
attach->dmabuf->ops->unmap_dma_buf(attach, sg_table, direction);
|
||||
__unmap_dma_buf(attach, sg_table, direction);
|
||||
|
||||
if (dma_buf_is_dynamic(attach->dmabuf) &&
|
||||
!IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY))
|
||||
|
|
@ -1014,15 +1069,15 @@ EXPORT_SYMBOL_GPL(dma_buf_move_notify);
|
|||
* vmalloc space might be limited and result in vmap calls failing.
|
||||
*
|
||||
* Interfaces::
|
||||
*
|
||||
* void \*dma_buf_vmap(struct dma_buf \*dmabuf)
|
||||
* void dma_buf_vunmap(struct dma_buf \*dmabuf, void \*vaddr)
|
||||
*
|
||||
* The vmap call can fail if there is no vmap support in the exporter, or if
|
||||
* it runs out of vmalloc space. Fallback to kmap should be implemented. Note
|
||||
* that the dma-buf layer keeps a reference count for all vmap access and
|
||||
* calls down into the exporter's vmap function only when no vmapping exists,
|
||||
* and only unmaps it once. Protection against concurrent vmap/vunmap calls is
|
||||
* provided by taking the dma_buf->lock mutex.
|
||||
* it runs out of vmalloc space. Note that the dma-buf layer keeps a reference
|
||||
* count for all vmap access and calls down into the exporter's vmap function
|
||||
* only when no vmapping exists, and only unmaps it once. Protection against
|
||||
* concurrent vmap/vunmap calls is provided by taking the &dma_buf.lock mutex.
|
||||
*
|
||||
* - For full compatibility on the importer side with existing userspace
|
||||
* interfaces, which might already support mmap'ing buffers. This is needed in
|
||||
|
|
@ -1074,11 +1129,12 @@ EXPORT_SYMBOL_GPL(dma_buf_move_notify);
|
|||
* shootdowns would increase the complexity quite a bit.
|
||||
*
|
||||
* Interface::
|
||||
*
|
||||
* int dma_buf_mmap(struct dma_buf \*, struct vm_area_struct \*,
|
||||
* unsigned long);
|
||||
*
|
||||
* If the importing subsystem simply provides a special-purpose mmap call to
|
||||
* set up a mapping in userspace, calling do_mmap with dma_buf->file will
|
||||
* set up a mapping in userspace, calling do_mmap with &dma_buf.file will
|
||||
* equally achieve that for a dma-buf object.
|
||||
*/
|
||||
|
||||
|
|
@ -1111,6 +1167,11 @@ static int __dma_buf_begin_cpu_access(struct dma_buf *dmabuf,
|
|||
* dma_buf_end_cpu_access(). Only when cpu access is braketed by both calls is
|
||||
* it guaranteed to be coherent with other DMA access.
|
||||
*
|
||||
* This function will also wait for any DMA transactions tracked through
|
||||
* implicit synchronization in &dma_buf.resv. For DMA transactions with explicit
|
||||
* synchronization this function will only ensure cache coherency, callers must
|
||||
* ensure synchronization with such DMA transactions on their own.
|
||||
*
|
||||
* Can return negative error values, returns 0 on success.
|
||||
*/
|
||||
int dma_buf_begin_cpu_access(struct dma_buf *dmabuf,
|
||||
|
|
@ -1121,6 +1182,8 @@ int dma_buf_begin_cpu_access(struct dma_buf *dmabuf,
|
|||
if (WARN_ON(!dmabuf))
|
||||
return -EINVAL;
|
||||
|
||||
might_lock(&dmabuf->resv->lock.base);
|
||||
|
||||
if (dmabuf->ops->begin_cpu_access)
|
||||
ret = dmabuf->ops->begin_cpu_access(dmabuf, direction);
|
||||
|
||||
|
|
@ -1154,6 +1217,8 @@ int dma_buf_end_cpu_access(struct dma_buf *dmabuf,
|
|||
|
||||
WARN_ON(!dmabuf);
|
||||
|
||||
might_lock(&dmabuf->resv->lock.base);
|
||||
|
||||
if (dmabuf->ops->end_cpu_access)
|
||||
ret = dmabuf->ops->end_cpu_access(dmabuf, direction);
|
||||
|
||||
|
|
@ -1212,7 +1277,10 @@ EXPORT_SYMBOL_GPL(dma_buf_mmap);
|
|||
* This call may fail due to lack of virtual mapping address space.
|
||||
* These calls are optional in drivers. The intended use for them
|
||||
* is for mapping objects linear in kernel space for high use objects.
|
||||
* Please attempt to use kmap/kunmap before thinking about these interfaces.
|
||||
*
|
||||
* To ensure coherency users must call dma_buf_begin_cpu_access() and
|
||||
* dma_buf_end_cpu_access() around any cpu access performed through this
|
||||
* mapping.
|
||||
*
|
||||
* Returns 0 on success, or a negative errno code otherwise.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -471,8 +471,11 @@ static int thread_signal_callback(void *arg)
|
|||
dma_fence_signal(f1);
|
||||
|
||||
smp_store_mb(cb.seen, false);
|
||||
if (!f2 || dma_fence_add_callback(f2, &cb.cb, simple_callback))
|
||||
miss++, cb.seen = true;
|
||||
if (!f2 ||
|
||||
dma_fence_add_callback(f2, &cb.cb, simple_callback)) {
|
||||
miss++;
|
||||
cb.seen = true;
|
||||
}
|
||||
|
||||
if (!t->before)
|
||||
dma_fence_signal(f1);
|
||||
|
|
|
|||
|
|
@ -214,10 +214,6 @@ config DRM_GEM_SHMEM_HELPER
|
|||
help
|
||||
Choose this if you need the GEM shmem helper functions
|
||||
|
||||
config DRM_VM
|
||||
bool
|
||||
depends on DRM && MMU
|
||||
|
||||
config DRM_SCHED
|
||||
tristate
|
||||
depends on DRM
|
||||
|
|
@ -391,7 +387,6 @@ source "drivers/gpu/drm/xlnx/Kconfig"
|
|||
menuconfig DRM_LEGACY
|
||||
bool "Enable legacy drivers (DANGEROUS)"
|
||||
depends on DRM && MMU
|
||||
select DRM_VM
|
||||
help
|
||||
Enable legacy DRI1 drivers. Those drivers expose unsafe and dangerous
|
||||
APIs to user-space, which can be used to circumvent access
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
|
||||
drm-y := drm_auth.o drm_cache.o \
|
||||
drm_file.o drm_gem.o drm_ioctl.o drm_irq.o \
|
||||
drm_memory.o drm_drv.o \
|
||||
drm_drv.o \
|
||||
drm_sysfs.o drm_hashtab.o drm_mm.o \
|
||||
drm_crtc.o drm_fourcc.o drm_modes.o drm_edid.o \
|
||||
drm_encoder_slave.o \
|
||||
|
|
@ -20,9 +20,9 @@ drm-y := drm_auth.o drm_cache.o \
|
|||
drm_client_modeset.o drm_atomic_uapi.o drm_hdcp.o \
|
||||
drm_managed.o drm_vblank_work.o
|
||||
|
||||
drm-$(CONFIG_DRM_LEGACY) += drm_legacy_misc.o drm_bufs.o drm_context.o drm_dma.o drm_scatter.o drm_lock.o
|
||||
drm-$(CONFIG_DRM_LEGACY) += drm_bufs.o drm_context.o drm_dma.o drm_legacy_misc.o drm_lock.o \
|
||||
drm_memory.o drm_scatter.o drm_vm.o
|
||||
drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o
|
||||
drm-$(CONFIG_DRM_VM) += drm_vm.o
|
||||
drm-$(CONFIG_COMPAT) += drm_ioc32.o
|
||||
drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
|
||||
drm-$(CONFIG_DRM_GEM_SHMEM_HELPER) += drm_gem_shmem_helper.o
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
|
|||
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
|
||||
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
|
||||
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
|
||||
amdgpu_fw_attestation.o
|
||||
amdgpu_fw_attestation.o amdgpu_securedisplay.o
|
||||
|
||||
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
|
||||
|
||||
|
|
@ -71,7 +71,7 @@ amdgpu-y += \
|
|||
vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \
|
||||
vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o navi10_reg_init.o navi14_reg_init.o \
|
||||
arct_reg_init.o navi12_reg_init.o mxgpu_nv.o sienna_cichlid_reg_init.o vangogh_reg_init.o \
|
||||
nbio_v7_2.o dimgrey_cavefish_reg_init.o
|
||||
nbio_v7_2.o dimgrey_cavefish_reg_init.o hdp_v4_0.o hdp_v5_0.o
|
||||
|
||||
# add DF block
|
||||
amdgpu-y += \
|
||||
|
|
@ -97,6 +97,7 @@ amdgpu-y += \
|
|||
tonga_ih.o \
|
||||
cz_ih.o \
|
||||
vega10_ih.o \
|
||||
vega20_ih.o \
|
||||
navi10_ih.o
|
||||
|
||||
# add PSP block
|
||||
|
|
@ -170,7 +171,8 @@ amdgpu-y += \
|
|||
# add SMUIO block
|
||||
amdgpu-y += \
|
||||
smuio_v9_0.o \
|
||||
smuio_v11_0.o
|
||||
smuio_v11_0.o \
|
||||
smuio_v11_0_6.o
|
||||
|
||||
# add amdkfd interfaces
|
||||
amdgpu-y += amdgpu_amdkfd.o
|
||||
|
|
|
|||
|
|
@ -55,7 +55,6 @@
|
|||
#include <drm/ttm/ttm_bo_api.h>
|
||||
#include <drm/ttm/ttm_bo_driver.h>
|
||||
#include <drm/ttm/ttm_placement.h>
|
||||
#include <drm/ttm/ttm_module.h>
|
||||
#include <drm/ttm/ttm_execbuf_util.h>
|
||||
|
||||
#include <drm/amdgpu_drm.h>
|
||||
|
|
@ -89,6 +88,7 @@
|
|||
#include "amdgpu_gfx.h"
|
||||
#include "amdgpu_sdma.h"
|
||||
#include "amdgpu_nbio.h"
|
||||
#include "amdgpu_hdp.h"
|
||||
#include "amdgpu_dm.h"
|
||||
#include "amdgpu_virt.h"
|
||||
#include "amdgpu_csa.h"
|
||||
|
|
@ -107,6 +107,7 @@
|
|||
#include "amdgpu_gfxhub.h"
|
||||
#include "amdgpu_df.h"
|
||||
#include "amdgpu_smuio.h"
|
||||
#include "amdgpu_hdp.h"
|
||||
|
||||
#define MAX_GPU_INSTANCE 16
|
||||
|
||||
|
|
@ -286,7 +287,7 @@ enum amdgpu_kiq_irq {
|
|||
|
||||
#define MAX_KIQ_REG_WAIT 5000 /* in usecs, 5ms */
|
||||
#define MAX_KIQ_REG_BAILOUT_INTERVAL 5 /* in msecs, 5ms */
|
||||
#define MAX_KIQ_REG_TRY 80 /* 20 -> 80 */
|
||||
#define MAX_KIQ_REG_TRY 1000
|
||||
|
||||
int amdgpu_device_ip_set_clockgating_state(void *dev,
|
||||
enum amd_ip_block_type block_type,
|
||||
|
|
@ -578,7 +579,8 @@ enum amd_reset_method {
|
|||
AMD_RESET_METHOD_MODE0,
|
||||
AMD_RESET_METHOD_MODE1,
|
||||
AMD_RESET_METHOD_MODE2,
|
||||
AMD_RESET_METHOD_BACO
|
||||
AMD_RESET_METHOD_BACO,
|
||||
AMD_RESET_METHOD_PCI,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -608,7 +610,6 @@ struct amdgpu_asic_funcs {
|
|||
/* invalidate hdp read cache */
|
||||
void (*invalidate_hdp)(struct amdgpu_device *adev,
|
||||
struct amdgpu_ring *ring);
|
||||
void (*reset_hdp_ras_error_count)(struct amdgpu_device *adev);
|
||||
/* check if the asic needs a full reset of if soft reset will work */
|
||||
bool (*need_full_reset)(struct amdgpu_device *adev);
|
||||
/* initialize doorbell layout for specific asic*/
|
||||
|
|
@ -891,6 +892,7 @@ struct amdgpu_device {
|
|||
/* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
|
||||
struct work_struct hotplug_work;
|
||||
struct amdgpu_irq_src crtc_irq;
|
||||
struct amdgpu_irq_src vline0_irq;
|
||||
struct amdgpu_irq_src vupdate_irq;
|
||||
struct amdgpu_irq_src pageflip_irq;
|
||||
struct amdgpu_irq_src hpd_irq;
|
||||
|
|
@ -921,6 +923,9 @@ struct amdgpu_device {
|
|||
/* nbio */
|
||||
struct amdgpu_nbio nbio;
|
||||
|
||||
/* hdp */
|
||||
struct amdgpu_hdp hdp;
|
||||
|
||||
/* smuio */
|
||||
struct amdgpu_smuio smuio;
|
||||
|
||||
|
|
@ -1202,8 +1207,10 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
|
|||
#define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
|
||||
#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
|
||||
#define amdgpu_asic_get_config_memsize(adev) (adev)->asic_funcs->get_config_memsize((adev))
|
||||
#define amdgpu_asic_flush_hdp(adev, r) (adev)->asic_funcs->flush_hdp((adev), (r))
|
||||
#define amdgpu_asic_invalidate_hdp(adev, r) (adev)->asic_funcs->invalidate_hdp((adev), (r))
|
||||
#define amdgpu_asic_flush_hdp(adev, r) \
|
||||
((adev)->asic_funcs->flush_hdp ? (adev)->asic_funcs->flush_hdp((adev), (r)) : (adev)->hdp.funcs->flush_hdp((adev), (r)))
|
||||
#define amdgpu_asic_invalidate_hdp(adev, r) \
|
||||
((adev)->asic_funcs->invalidate_hdp ? (adev)->asic_funcs->invalidate_hdp((adev), (r)) : (adev)->hdp.funcs->invalidate_hdp((adev), (r)))
|
||||
#define amdgpu_asic_need_full_reset(adev) (adev)->asic_funcs->need_full_reset((adev))
|
||||
#define amdgpu_asic_init_doorbell_index(adev) (adev)->asic_funcs->init_doorbell_index((adev))
|
||||
#define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) ((adev)->asic_funcs->get_pcie_usage((adev), (cnt0), (cnt1)))
|
||||
|
|
@ -1222,6 +1229,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
|
|||
int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
|
||||
struct amdgpu_job* job);
|
||||
void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
|
||||
int amdgpu_device_pci_reset(struct amdgpu_device *adev);
|
||||
bool amdgpu_device_need_post(struct amdgpu_device *adev);
|
||||
|
||||
void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
|
||||
|
|
|
|||
|
|
@ -47,12 +47,8 @@ int amdgpu_amdkfd_init(void)
|
|||
amdgpu_amdkfd_total_mem_size = si.totalram - si.totalhigh;
|
||||
amdgpu_amdkfd_total_mem_size *= si.mem_unit;
|
||||
|
||||
#ifdef CONFIG_HSA_AMD
|
||||
ret = kgd2kfd_init();
|
||||
amdgpu_amdkfd_gpuvm_init_mem_limits();
|
||||
#else
|
||||
ret = -ENOENT;
|
||||
#endif
|
||||
kfd_initialized = !ret;
|
||||
|
||||
return ret;
|
||||
|
|
@ -696,86 +692,3 @@ bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd)
|
|||
|
||||
return adev->have_atomics_support;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_HSA_AMD
|
||||
bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo)
|
||||
{
|
||||
}
|
||||
|
||||
int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
|
||||
struct amdgpu_vm *vm)
|
||||
{
|
||||
}
|
||||
|
||||
struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev,
|
||||
unsigned int asic_type, bool vf)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
bool kgd2kfd_device_init(struct kfd_dev *kfd,
|
||||
struct drm_device *ddev,
|
||||
const struct kgd2kfd_shared_resources *gpu_resources)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
void kgd2kfd_device_exit(struct kfd_dev *kfd)
|
||||
{
|
||||
}
|
||||
|
||||
void kgd2kfd_exit(void)
|
||||
{
|
||||
}
|
||||
|
||||
void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
|
||||
{
|
||||
}
|
||||
|
||||
int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kgd2kfd_pre_reset(struct kfd_dev *kfd)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kgd2kfd_post_reset(struct kfd_dev *kfd)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
|
||||
{
|
||||
}
|
||||
|
||||
void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
|
||||
{
|
||||
}
|
||||
|
||||
void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint32_t throttle_bitmask)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -94,11 +94,6 @@ enum kgd_engine_type {
|
|||
KGD_ENGINE_MAX
|
||||
};
|
||||
|
||||
struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
|
||||
struct mm_struct *mm);
|
||||
bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
|
||||
struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
|
||||
int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo);
|
||||
|
||||
struct amdkfd_process_info {
|
||||
/* List head of all VMs that belong to a KFD process */
|
||||
|
|
@ -132,8 +127,6 @@ void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
|
|||
void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
|
||||
void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
|
||||
void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev);
|
||||
|
||||
int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm);
|
||||
int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
|
||||
uint32_t vmid, uint64_t gpu_addr,
|
||||
uint32_t *ib_cmd, uint32_t ib_len);
|
||||
|
|
@ -153,6 +146,38 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
|
|||
int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
|
||||
int queue_bit);
|
||||
|
||||
struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
|
||||
struct mm_struct *mm);
|
||||
#if IS_ENABLED(CONFIG_HSA_AMD)
|
||||
bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
|
||||
struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
|
||||
int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo);
|
||||
int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm);
|
||||
#else
|
||||
static inline
|
||||
bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline
|
||||
struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline
|
||||
int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline
|
||||
int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
/* Shared API */
|
||||
int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
|
||||
void **mem_obj, uint64_t *gpu_addr,
|
||||
|
|
@ -215,8 +240,6 @@ int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd,
|
|||
struct file *filp, u32 pasid,
|
||||
void **vm, void **process_info,
|
||||
struct dma_fence **ef);
|
||||
void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
|
||||
struct amdgpu_vm *vm);
|
||||
void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm);
|
||||
void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm);
|
||||
uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm);
|
||||
|
|
@ -236,23 +259,43 @@ int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_dev *kgd,
|
|||
struct kgd_mem *mem, void **kptr, uint64_t *size);
|
||||
int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
|
||||
struct dma_fence **ef);
|
||||
|
||||
int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd,
|
||||
struct kfd_vm_fault_info *info);
|
||||
|
||||
int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,
|
||||
struct dma_buf *dmabuf,
|
||||
uint64_t va, void *vm,
|
||||
struct kgd_mem **mem, uint64_t *size,
|
||||
uint64_t *mmap_offset);
|
||||
|
||||
void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
|
||||
void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo);
|
||||
|
||||
int amdgpu_amdkfd_get_tile_config(struct kgd_dev *kgd,
|
||||
struct tile_config *config);
|
||||
#if IS_ENABLED(CONFIG_HSA_AMD)
|
||||
void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
|
||||
void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
|
||||
struct amdgpu_vm *vm);
|
||||
void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo);
|
||||
#else
|
||||
static inline
|
||||
void amdgpu_amdkfd_gpuvm_init_mem_limits(void)
|
||||
{
|
||||
}
|
||||
|
||||
static inline
|
||||
void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
|
||||
struct amdgpu_vm *vm)
|
||||
{
|
||||
}
|
||||
|
||||
static inline
|
||||
void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
/* KGD2KFD callbacks */
|
||||
int kgd2kfd_quiesce_mm(struct mm_struct *mm);
|
||||
int kgd2kfd_resume_mm(struct mm_struct *mm);
|
||||
int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
|
||||
struct dma_fence *fence);
|
||||
#if IS_ENABLED(CONFIG_HSA_AMD)
|
||||
int kgd2kfd_init(void);
|
||||
void kgd2kfd_exit(void);
|
||||
struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev,
|
||||
|
|
@ -266,11 +309,68 @@ int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm);
|
|||
int kgd2kfd_pre_reset(struct kfd_dev *kfd);
|
||||
int kgd2kfd_post_reset(struct kfd_dev *kfd);
|
||||
void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
|
||||
int kgd2kfd_quiesce_mm(struct mm_struct *mm);
|
||||
int kgd2kfd_resume_mm(struct mm_struct *mm);
|
||||
int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
|
||||
struct dma_fence *fence);
|
||||
void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
|
||||
void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint32_t throttle_bitmask);
|
||||
#else
|
||||
static inline int kgd2kfd_init(void)
|
||||
{
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
static inline void kgd2kfd_exit(void)
|
||||
{
|
||||
}
|
||||
|
||||
static inline
|
||||
struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev,
|
||||
unsigned int asic_type, bool vf)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline
|
||||
bool kgd2kfd_device_init(struct kfd_dev *kfd, struct drm_device *ddev,
|
||||
const struct kgd2kfd_shared_resources *gpu_resources)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline void kgd2kfd_device_exit(struct kfd_dev *kfd)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int kgd2kfd_post_reset(struct kfd_dev *kfd)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline
|
||||
void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
|
||||
{
|
||||
}
|
||||
|
||||
static inline
|
||||
void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
|
||||
{
|
||||
}
|
||||
|
||||
static inline
|
||||
void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint32_t throttle_bitmask)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
#endif /* AMDGPU_AMDKFD_H_INCLUDED */
|
||||
|
|
|
|||
|
|
@ -23,7 +23,6 @@
|
|||
#include "amdgpu_amdkfd.h"
|
||||
#include "gc/gc_10_1_0_offset.h"
|
||||
#include "gc/gc_10_1_0_sh_mask.h"
|
||||
#include "navi10_enum.h"
|
||||
#include "athub/athub_2_0_0_offset.h"
|
||||
#include "athub/athub_2_0_0_sh_mask.h"
|
||||
#include "oss/osssys_5_0_0_offset.h"
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#include "amdgpu_amdkfd.h"
|
||||
#include "gc/gc_10_3_0_offset.h"
|
||||
#include "gc/gc_10_3_0_sh_mask.h"
|
||||
#include "navi10_enum.h"
|
||||
#include "oss/osssys_5_0_0_offset.h"
|
||||
#include "oss/osssys_5_0_0_sh_mask.h"
|
||||
#include "soc15_common.h"
|
||||
|
|
|
|||
|
|
@ -454,7 +454,7 @@ static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem,
|
|||
struct amdgpu_bo *bo = mem->bo;
|
||||
uint64_t va = mem->va;
|
||||
struct list_head *list_bo_va = &mem->bo_va_list;
|
||||
unsigned long bo_size = bo->tbo.mem.size;
|
||||
unsigned long bo_size = bo->tbo.base.size;
|
||||
|
||||
if (!va) {
|
||||
pr_err("Invalid VA when adding BO to VM\n");
|
||||
|
|
@ -1277,7 +1277,7 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
|
|||
struct kgd_dev *kgd, struct kgd_mem *mem, uint64_t *size)
|
||||
{
|
||||
struct amdkfd_process_info *process_info = mem->process_info;
|
||||
unsigned long bo_size = mem->bo->tbo.mem.size;
|
||||
unsigned long bo_size = mem->bo->tbo.base.size;
|
||||
struct kfd_bo_va_list *entry, *tmp;
|
||||
struct bo_vm_reservation_context ctx;
|
||||
struct ttm_validate_buffer *bo_list_entry;
|
||||
|
|
@ -1398,7 +1398,7 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
|
|||
mutex_lock(&mem->lock);
|
||||
|
||||
domain = mem->domain;
|
||||
bo_size = bo->tbo.mem.size;
|
||||
bo_size = bo->tbo.base.size;
|
||||
|
||||
pr_debug("Map VA 0x%llx - 0x%llx to vm %p domain %s\n",
|
||||
mem->va,
|
||||
|
|
@ -1502,7 +1502,7 @@ int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
|
|||
struct amdgpu_device *adev = get_amdgpu_device(kgd);
|
||||
struct amdkfd_process_info *process_info =
|
||||
((struct amdgpu_vm *)vm)->process_info;
|
||||
unsigned long bo_size = mem->bo->tbo.mem.size;
|
||||
unsigned long bo_size = mem->bo->tbo.base.size;
|
||||
struct kfd_bo_va_list *entry;
|
||||
struct bo_vm_reservation_context ctx;
|
||||
int ret;
|
||||
|
|
|
|||
|
|
@ -155,7 +155,7 @@ static bool amdgpu_read_bios_from_rom(struct amdgpu_device *adev)
|
|||
u8 header[AMD_VBIOS_SIGNATURE_END+1] = {0};
|
||||
int len;
|
||||
|
||||
if (!adev->asic_funcs->read_bios_from_rom)
|
||||
if (!adev->asic_funcs || !adev->asic_funcs->read_bios_from_rom)
|
||||
return false;
|
||||
|
||||
/* validate VBIOS signature */
|
||||
|
|
@ -348,7 +348,8 @@ static bool amdgpu_read_disabled_bios(struct amdgpu_device *adev)
|
|||
if (adev->flags & AMD_IS_APU)
|
||||
return igp_read_bios_from_vram(adev);
|
||||
else
|
||||
return amdgpu_asic_read_disabled_bios(adev);
|
||||
return (!adev->asic_funcs || !adev->asic_funcs->read_disabled_bios) ?
|
||||
false : amdgpu_asic_read_disabled_bios(adev);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
|
|
|
|||
|
|
@ -98,8 +98,7 @@ static int amdgpu_cs_bo_handles_chunk(struct amdgpu_cs_parser *p,
|
|||
return 0;
|
||||
|
||||
error_free:
|
||||
if (info)
|
||||
kvfree(info);
|
||||
kvfree(info);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@
|
|||
#include "amdgpu_dm_debugfs.h"
|
||||
#include "amdgpu_ras.h"
|
||||
#include "amdgpu_rap.h"
|
||||
#include "amdgpu_securedisplay.h"
|
||||
#include "amdgpu_fw_attestation.h"
|
||||
|
||||
/**
|
||||
|
|
@ -1427,7 +1428,7 @@ static void amdgpu_ib_preempt_job_recovery(struct drm_gpu_scheduler *sched)
|
|||
struct dma_fence *fence;
|
||||
|
||||
spin_lock(&sched->job_list_lock);
|
||||
list_for_each_entry(s_job, &sched->ring_mirror_list, node) {
|
||||
list_for_each_entry(s_job, &sched->pending_list, list) {
|
||||
fence = sched->ops->run_job(s_job);
|
||||
dma_fence_put(fence);
|
||||
}
|
||||
|
|
@ -1459,10 +1460,10 @@ static void amdgpu_ib_preempt_mark_partial_job(struct amdgpu_ring *ring)
|
|||
|
||||
no_preempt:
|
||||
spin_lock(&sched->job_list_lock);
|
||||
list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
|
||||
list_for_each_entry_safe(s_job, tmp, &sched->pending_list, list) {
|
||||
if (dma_fence_is_signaled(&s_job->s_fence->finished)) {
|
||||
/* remove job from ring_mirror_list */
|
||||
list_del_init(&s_job->node);
|
||||
list_del_init(&s_job->list);
|
||||
sched->ops->free_job(s_job);
|
||||
continue;
|
||||
}
|
||||
|
|
@ -1669,6 +1670,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
|
|||
|
||||
amdgpu_rap_debugfs_init(adev);
|
||||
|
||||
amdgpu_securedisplay_debugfs_init(adev);
|
||||
|
||||
amdgpu_fw_attestation_debugfs_init(adev);
|
||||
|
||||
return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_list,
|
||||
|
|
|
|||
|
|
@ -929,6 +929,18 @@ void amdgpu_device_pci_config_reset(struct amdgpu_device *adev)
|
|||
pci_write_config_dword(adev->pdev, 0x7c, AMDGPU_ASIC_RESET_DATA);
|
||||
}
|
||||
|
||||
/**
|
||||
* amdgpu_device_pci_reset - reset the GPU using generic PCI means
|
||||
*
|
||||
* @adev: amdgpu_device pointer
|
||||
*
|
||||
* Resets the GPU using generic pci reset interfaces (FLR, SBR, etc.).
|
||||
*/
|
||||
int amdgpu_device_pci_reset(struct amdgpu_device *adev)
|
||||
{
|
||||
return pci_reset_function(adev->pdev);
|
||||
}
|
||||
|
||||
/*
|
||||
* GPU doorbell aperture helpers function.
|
||||
*/
|
||||
|
|
@ -1105,8 +1117,7 @@ void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb)
|
|||
*/
|
||||
int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
|
||||
{
|
||||
u64 space_needed = roundup_pow_of_two(adev->gmc.real_vram_size);
|
||||
u32 rbar_size = order_base_2(((space_needed >> 20) | 1)) - 1;
|
||||
int rbar_size = pci_rebar_bytes_to_size(adev->gmc.real_vram_size);
|
||||
struct pci_bus *root;
|
||||
struct resource *res;
|
||||
unsigned i;
|
||||
|
|
@ -1137,6 +1148,10 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
|
|||
if (!res)
|
||||
return 0;
|
||||
|
||||
/* Limit the BAR size to what is available */
|
||||
rbar_size = min(fls(pci_rebar_get_possible_sizes(adev->pdev, 0)) - 1,
|
||||
rbar_size);
|
||||
|
||||
/* Disable memory decoding while we change the BAR addresses and size */
|
||||
pci_read_config_word(adev->pdev, PCI_COMMAND, &cmd);
|
||||
pci_write_config_word(adev->pdev, PCI_COMMAND,
|
||||
|
|
@ -1422,24 +1437,22 @@ static void amdgpu_switcheroo_set_state(struct pci_dev *pdev,
|
|||
/* don't suspend or resume card normally */
|
||||
dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
||||
|
||||
pci_set_power_state(dev->pdev, PCI_D0);
|
||||
amdgpu_device_load_pci_state(dev->pdev);
|
||||
r = pci_enable_device(dev->pdev);
|
||||
pci_set_power_state(pdev, PCI_D0);
|
||||
amdgpu_device_load_pci_state(pdev);
|
||||
r = pci_enable_device(pdev);
|
||||
if (r)
|
||||
DRM_WARN("pci_enable_device failed (%d)\n", r);
|
||||
amdgpu_device_resume(dev, true);
|
||||
|
||||
dev->switch_power_state = DRM_SWITCH_POWER_ON;
|
||||
drm_kms_helper_poll_enable(dev);
|
||||
} else {
|
||||
pr_info("switched off\n");
|
||||
drm_kms_helper_poll_disable(dev);
|
||||
dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
||||
amdgpu_device_suspend(dev, true);
|
||||
amdgpu_device_cache_pci_state(dev->pdev);
|
||||
amdgpu_device_cache_pci_state(pdev);
|
||||
/* Shut down the device */
|
||||
pci_disable_device(dev->pdev);
|
||||
pci_set_power_state(dev->pdev, PCI_D3cold);
|
||||
pci_disable_device(pdev);
|
||||
pci_set_power_state(pdev, PCI_D3cold);
|
||||
dev->switch_power_state = DRM_SWITCH_POWER_OFF;
|
||||
}
|
||||
}
|
||||
|
|
@ -1702,8 +1715,7 @@ static void amdgpu_device_enable_virtual_display(struct amdgpu_device *adev)
|
|||
adev->enable_virtual_display = false;
|
||||
|
||||
if (amdgpu_virtual_display) {
|
||||
struct drm_device *ddev = adev_to_drm(adev);
|
||||
const char *pci_address_name = pci_name(ddev->pdev);
|
||||
const char *pci_address_name = pci_name(adev->pdev);
|
||||
char *pciaddstr, *pciaddstr_tmp, *pciaddname_tmp, *pciaddname;
|
||||
|
||||
pciaddstr = kstrdup(amdgpu_virtual_display, GFP_KERNEL);
|
||||
|
|
@ -3116,7 +3128,10 @@ static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev)
|
|||
*/
|
||||
adev->gfx_timeout = msecs_to_jiffies(10000);
|
||||
adev->sdma_timeout = adev->video_timeout = adev->gfx_timeout;
|
||||
if (amdgpu_sriov_vf(adev) || amdgpu_passthrough(adev))
|
||||
if (amdgpu_sriov_vf(adev))
|
||||
adev->compute_timeout = amdgpu_sriov_is_pp_one_vf(adev) ?
|
||||
msecs_to_jiffies(60000) : msecs_to_jiffies(10000);
|
||||
else if (amdgpu_passthrough(adev))
|
||||
adev->compute_timeout = msecs_to_jiffies(60000);
|
||||
else
|
||||
adev->compute_timeout = MAX_SCHEDULE_TIMEOUT;
|
||||
|
|
@ -3396,7 +3411,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
|
|||
}
|
||||
}
|
||||
|
||||
pci_enable_pcie_error_reporting(adev->ddev.pdev);
|
||||
pci_enable_pcie_error_reporting(adev->pdev);
|
||||
|
||||
/* Post card if necessary */
|
||||
if (amdgpu_device_need_post(adev)) {
|
||||
|
|
@ -3719,7 +3734,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
|
|||
|
||||
r = amdgpu_device_ip_suspend_phase1(adev);
|
||||
|
||||
amdgpu_amdkfd_suspend(adev, !fbcon);
|
||||
amdgpu_amdkfd_suspend(adev, adev->in_runpm);
|
||||
|
||||
/* evict vram memory */
|
||||
amdgpu_bo_evict_vram(adev);
|
||||
|
|
@ -3803,7 +3818,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
|
|||
}
|
||||
}
|
||||
}
|
||||
r = amdgpu_amdkfd_resume(adev, !fbcon);
|
||||
r = amdgpu_amdkfd_resume(adev, adev->in_runpm);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
|
|
@ -4154,8 +4169,8 @@ bool amdgpu_device_has_job_running(struct amdgpu_device *adev)
|
|||
continue;
|
||||
|
||||
spin_lock(&ring->sched.job_list_lock);
|
||||
job = list_first_entry_or_null(&ring->sched.ring_mirror_list,
|
||||
struct drm_sched_job, node);
|
||||
job = list_first_entry_or_null(&ring->sched.pending_list,
|
||||
struct drm_sched_job, list);
|
||||
spin_unlock(&ring->sched.job_list_lock);
|
||||
if (job)
|
||||
return true;
|
||||
|
|
@ -4205,6 +4220,8 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev)
|
|||
case CHIP_NAVI14:
|
||||
case CHIP_NAVI12:
|
||||
case CHIP_SIENNA_CICHLID:
|
||||
case CHIP_NAVY_FLOUNDER:
|
||||
case CHIP_DIMGREY_CAVEFISH:
|
||||
break;
|
||||
default:
|
||||
goto disabled;
|
||||
|
|
@ -4454,6 +4471,46 @@ static void amdgpu_device_unlock_adev(struct amdgpu_device *adev)
|
|||
up_write(&adev->reset_sem);
|
||||
}
|
||||
|
||||
/*
|
||||
* to lockup a list of amdgpu devices in a hive safely, if not a hive
|
||||
* with multiple nodes, it will be similar as amdgpu_device_lock_adev.
|
||||
*
|
||||
* unlock won't require roll back.
|
||||
*/
|
||||
static int amdgpu_device_lock_hive_adev(struct amdgpu_device *adev, struct amdgpu_hive_info *hive)
|
||||
{
|
||||
struct amdgpu_device *tmp_adev = NULL;
|
||||
|
||||
if (adev->gmc.xgmi.num_physical_nodes > 1) {
|
||||
if (!hive) {
|
||||
dev_err(adev->dev, "Hive is NULL while device has multiple xgmi nodes");
|
||||
return -ENODEV;
|
||||
}
|
||||
list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
|
||||
if (!amdgpu_device_lock_adev(tmp_adev, hive))
|
||||
goto roll_back;
|
||||
}
|
||||
} else if (!amdgpu_device_lock_adev(adev, hive))
|
||||
return -EAGAIN;
|
||||
|
||||
return 0;
|
||||
roll_back:
|
||||
if (!list_is_first(&tmp_adev->gmc.xgmi.head, &hive->device_list)) {
|
||||
/*
|
||||
* if the lockup iteration break in the middle of a hive,
|
||||
* it may means there may has a race issue,
|
||||
* or a hive device locked up independently.
|
||||
* we may be in trouble and may not, so will try to roll back
|
||||
* the lock and give out a warnning.
|
||||
*/
|
||||
dev_warn(tmp_adev->dev, "Hive lock iteration broke in the middle. Rolling back to unlock");
|
||||
list_for_each_entry_continue_reverse(tmp_adev, &hive->device_list, gmc.xgmi.head) {
|
||||
amdgpu_device_unlock_adev(tmp_adev);
|
||||
}
|
||||
}
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
static void amdgpu_device_resume_display_audio(struct amdgpu_device *adev)
|
||||
{
|
||||
struct pci_dev *p = NULL;
|
||||
|
|
@ -4567,11 +4624,29 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
|
|||
DRM_INFO("Bailing on TDR for s_job:%llx, hive: %llx as another already in progress",
|
||||
job ? job->base.id : -1, hive->hive_id);
|
||||
amdgpu_put_xgmi_hive(hive);
|
||||
if (job)
|
||||
drm_sched_increase_karma(&job->base);
|
||||
return 0;
|
||||
}
|
||||
mutex_lock(&hive->hive_lock);
|
||||
}
|
||||
|
||||
/*
|
||||
* lock the device before we try to operate the linked list
|
||||
* if didn't get the device lock, don't touch the linked list since
|
||||
* others may iterating it.
|
||||
*/
|
||||
r = amdgpu_device_lock_hive_adev(adev, hive);
|
||||
if (r) {
|
||||
dev_info(adev->dev, "Bailing on TDR for s_job:%llx, as another already in progress",
|
||||
job ? job->base.id : -1);
|
||||
|
||||
/* even we skipped this reset, still need to set the job to guilty */
|
||||
if (job)
|
||||
drm_sched_increase_karma(&job->base);
|
||||
goto skip_recovery;
|
||||
}
|
||||
|
||||
/*
|
||||
* Build list of devices to reset.
|
||||
* In case we are in XGMI hive mode, resort the device list
|
||||
|
|
@ -4579,8 +4654,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
|
|||
*/
|
||||
INIT_LIST_HEAD(&device_list);
|
||||
if (adev->gmc.xgmi.num_physical_nodes > 1) {
|
||||
if (!hive)
|
||||
return -ENODEV;
|
||||
if (!list_is_first(&adev->gmc.xgmi.head, &hive->device_list))
|
||||
list_rotate_to_front(&adev->gmc.xgmi.head, &hive->device_list);
|
||||
device_list_handle = &hive->device_list;
|
||||
|
|
@ -4591,13 +4664,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
|
|||
|
||||
/* block all schedulers and reset given job's ring */
|
||||
list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
|
||||
if (!amdgpu_device_lock_adev(tmp_adev, hive)) {
|
||||
dev_info(tmp_adev->dev, "Bailing on TDR for s_job:%llx, as another already in progress",
|
||||
job ? job->base.id : -1);
|
||||
r = 0;
|
||||
goto skip_recovery;
|
||||
}
|
||||
|
||||
/*
|
||||
* Try to put the audio codec into suspend state
|
||||
* before gpu reset started.
|
||||
|
|
@ -4735,7 +4801,7 @@ skip_recovery:
|
|||
amdgpu_put_xgmi_hive(hive);
|
||||
}
|
||||
|
||||
if (r)
|
||||
if (r && r != -EAGAIN)
|
||||
dev_info(adev->dev, "GPU reset end with ret = %d\n", r);
|
||||
return r;
|
||||
}
|
||||
|
|
@ -4785,7 +4851,13 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev)
|
|||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3);
|
||||
} else {
|
||||
if (speed_cap == PCIE_SPEED_16_0GT)
|
||||
if (speed_cap == PCIE_SPEED_32_0GT)
|
||||
adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN4 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN5);
|
||||
else if (speed_cap == PCIE_SPEED_16_0GT)
|
||||
adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 |
|
||||
CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3 |
|
||||
|
|
@ -4805,7 +4877,13 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev)
|
|||
adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2);
|
||||
} else {
|
||||
if (platform_speed_cap == PCIE_SPEED_16_0GT)
|
||||
if (platform_speed_cap == PCIE_SPEED_32_0GT)
|
||||
adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN5);
|
||||
else if (platform_speed_cap == PCIE_SPEED_16_0GT)
|
||||
adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
|
||||
CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3 |
|
||||
|
|
@ -4949,8 +5027,8 @@ pci_ers_result_t amdgpu_pci_error_detected(struct pci_dev *pdev, pci_channel_sta
|
|||
case pci_channel_io_normal:
|
||||
return PCI_ERS_RESULT_CAN_RECOVER;
|
||||
/* Fatal error, prepare for slot reset */
|
||||
case pci_channel_io_frozen:
|
||||
/*
|
||||
case pci_channel_io_frozen:
|
||||
/*
|
||||
* Cancel and wait for all TDRs in progress if failing to
|
||||
* set adev->in_gpu_reset in amdgpu_device_lock_adev
|
||||
*
|
||||
|
|
@ -5041,7 +5119,7 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)
|
|||
goto out;
|
||||
}
|
||||
|
||||
adev->in_pci_err_recovery = true;
|
||||
adev->in_pci_err_recovery = true;
|
||||
r = amdgpu_device_pre_asic_reset(adev, NULL, &need_full_reset);
|
||||
adev->in_pci_err_recovery = false;
|
||||
if (r)
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@
|
|||
#include <linux/dma-buf.h>
|
||||
#include <linux/dma-fence-array.h>
|
||||
#include <linux/pci-p2pdma.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
/**
|
||||
* amdgpu_gem_prime_mmap - &drm_driver.gem_prime_mmap implementation
|
||||
|
|
@ -151,9 +152,13 @@ static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,
|
|||
if (attach->dev->driver == adev->dev->driver)
|
||||
return 0;
|
||||
|
||||
r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
|
||||
if (r < 0)
|
||||
goto out;
|
||||
|
||||
r = amdgpu_bo_reserve(bo, false);
|
||||
if (unlikely(r != 0))
|
||||
return r;
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* We only create shared fences for internal use, but importers
|
||||
|
|
@ -165,11 +170,15 @@ static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,
|
|||
*/
|
||||
r = __dma_resv_make_exclusive(bo->tbo.base.resv);
|
||||
if (r)
|
||||
return r;
|
||||
goto out;
|
||||
|
||||
bo->prime_shared_count++;
|
||||
amdgpu_bo_unreserve(bo);
|
||||
return 0;
|
||||
|
||||
out:
|
||||
pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
|
||||
return r;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -189,6 +198,9 @@ static void amdgpu_dma_buf_detach(struct dma_buf *dmabuf,
|
|||
|
||||
if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
|
||||
bo->prime_shared_count--;
|
||||
|
||||
pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);
|
||||
pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -269,7 +281,7 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
|
|||
case TTM_PL_TT:
|
||||
sgt = drm_prime_pages_to_sg(obj->dev,
|
||||
bo->tbo.ttm->pages,
|
||||
bo->tbo.num_pages);
|
||||
bo->tbo.ttm->num_pages);
|
||||
if (IS_ERR(sgt))
|
||||
return sgt;
|
||||
|
||||
|
|
|
|||
|
|
@ -132,8 +132,12 @@ uint amdgpu_pg_mask = 0xffffffff;
|
|||
uint amdgpu_sdma_phase_quantum = 32;
|
||||
char *amdgpu_disable_cu = NULL;
|
||||
char *amdgpu_virtual_display = NULL;
|
||||
/* OverDrive(bit 14) disabled by default*/
|
||||
uint amdgpu_pp_feature_mask = 0xffffbfff;
|
||||
|
||||
/*
|
||||
* OverDrive(bit 14) disabled by default
|
||||
* GFX DCS(bit 19) disabled by default
|
||||
*/
|
||||
uint amdgpu_pp_feature_mask = 0xfff7bfff;
|
||||
uint amdgpu_force_long_training;
|
||||
int amdgpu_job_hang_limit;
|
||||
int amdgpu_lbpw = -1;
|
||||
|
|
@ -789,9 +793,9 @@ module_param_named(tmz, amdgpu_tmz, int, 0444);
|
|||
|
||||
/**
|
||||
* DOC: reset_method (int)
|
||||
* GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)
|
||||
* GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco, 5 = pci)
|
||||
*/
|
||||
MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)");
|
||||
MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco, 5 = pci)");
|
||||
module_param_named(reset_method, amdgpu_reset_method, int, 0444);
|
||||
|
||||
/**
|
||||
|
|
@ -1094,6 +1098,7 @@ static const struct pci_device_id pciidlist[] = {
|
|||
|
||||
/* Sienna_Cichlid */
|
||||
{0x1002, 0x73A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
|
||||
{0x1002, 0x73A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
|
||||
{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
|
||||
{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
|
||||
{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
|
||||
|
|
@ -1206,7 +1211,6 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
ddev->pdev = pdev;
|
||||
pci_set_drvdata(pdev, ddev);
|
||||
|
||||
ret = amdgpu_driver_load_kms(adev, ent->driver_data);
|
||||
|
|
@ -1344,11 +1348,12 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)
|
|||
adev->in_runpm = true;
|
||||
if (amdgpu_device_supports_atpx(drm_dev))
|
||||
drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
||||
drm_kms_helper_poll_disable(drm_dev);
|
||||
|
||||
ret = amdgpu_device_suspend(drm_dev, false);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
adev->in_runpm = false;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (amdgpu_device_supports_atpx(drm_dev)) {
|
||||
/* Only need to handle PCI state in the driver for ATPX
|
||||
|
|
@ -1401,7 +1406,6 @@ static int amdgpu_pmops_runtime_resume(struct device *dev)
|
|||
amdgpu_device_baco_exit(drm_dev);
|
||||
}
|
||||
ret = amdgpu_device_resume(drm_dev, false);
|
||||
drm_kms_helper_poll_enable(drm_dev);
|
||||
if (amdgpu_device_supports_atpx(drm_dev))
|
||||
drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
|
||||
adev->in_runpm = false;
|
||||
|
|
|
|||
|
|
@ -271,7 +271,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
|
|||
DRM_INFO("fb depth is %d\n", fb->format->depth);
|
||||
DRM_INFO(" pitch is %d\n", fb->pitches[0]);
|
||||
|
||||
vga_switcheroo_client_fb_set(adev_to_drm(adev)->pdev, info);
|
||||
vga_switcheroo_client_fb_set(adev->pdev, info);
|
||||
return 0;
|
||||
|
||||
out:
|
||||
|
|
|
|||
|
|
@ -47,10 +47,9 @@ typedef struct FW_ATT_RECORD
|
|||
uint16_t AttFwIdV2; /* V2 FW ID field */
|
||||
uint32_t AttFWVersion; /* FW Version */
|
||||
uint16_t AttFWActiveFunctionID; /* The VF ID (only in VF Attestation Table) */
|
||||
uint16_t AttSource; /* FW source indicator */
|
||||
uint16_t RecordValid; /* Indicates whether the record is a valid entry */
|
||||
uint8_t AttFwTaId; /* Ta ID (only in TA Attestation Table) */
|
||||
uint8_t Reserved;
|
||||
uint8_t AttSource; /* FW source indicator */
|
||||
uint8_t RecordValid; /* Indicates whether the record is a valid entry */
|
||||
uint32_t AttFwTaId; /* Ta ID (only in TA Attestation Table) */
|
||||
} FW_ATT_RECORD;
|
||||
|
||||
static ssize_t amdgpu_fw_attestation_debugfs_read(struct file *f,
|
||||
|
|
|
|||
|
|
@ -619,7 +619,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
|
|||
int r = 0;
|
||||
|
||||
if (args->va_address < AMDGPU_VA_RESERVED_SIZE) {
|
||||
dev_dbg(&dev->pdev->dev,
|
||||
dev_dbg(dev->dev,
|
||||
"va_address 0x%LX is in reserved area 0x%LX\n",
|
||||
args->va_address, AMDGPU_VA_RESERVED_SIZE);
|
||||
return -EINVAL;
|
||||
|
|
@ -627,7 +627,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
|
|||
|
||||
if (args->va_address >= AMDGPU_GMC_HOLE_START &&
|
||||
args->va_address < AMDGPU_GMC_HOLE_END) {
|
||||
dev_dbg(&dev->pdev->dev,
|
||||
dev_dbg(dev->dev,
|
||||
"va_address 0x%LX is in VA hole 0x%LX-0x%LX\n",
|
||||
args->va_address, AMDGPU_GMC_HOLE_START,
|
||||
AMDGPU_GMC_HOLE_END);
|
||||
|
|
@ -639,14 +639,14 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
|
|||
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
|
||||
vm_size -= AMDGPU_VA_RESERVED_SIZE;
|
||||
if (args->va_address + args->map_size > vm_size) {
|
||||
dev_dbg(&dev->pdev->dev,
|
||||
dev_dbg(dev->dev,
|
||||
"va_address 0x%llx is in top reserved area 0x%llx\n",
|
||||
args->va_address + args->map_size, vm_size);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) {
|
||||
dev_dbg(&dev->pdev->dev, "invalid flags combination 0x%08X\n",
|
||||
dev_dbg(dev->dev, "invalid flags combination 0x%08X\n",
|
||||
args->flags);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
@ -658,7 +658,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
|
|||
case AMDGPU_VA_OP_REPLACE:
|
||||
break;
|
||||
default:
|
||||
dev_dbg(&dev->pdev->dev, "unsupported operation %d\n",
|
||||
dev_dbg(dev->dev, "unsupported operation %d\n",
|
||||
args->operation);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -193,15 +193,16 @@ static bool amdgpu_gfx_is_multipipe_capable(struct amdgpu_device *adev)
|
|||
}
|
||||
|
||||
bool amdgpu_gfx_is_high_priority_compute_queue(struct amdgpu_device *adev,
|
||||
int pipe, int queue)
|
||||
struct amdgpu_ring *ring)
|
||||
{
|
||||
bool multipipe_policy = amdgpu_gfx_is_multipipe_capable(adev);
|
||||
int cond;
|
||||
/* Policy: alternate between normal and high priority */
|
||||
cond = multipipe_policy ? pipe : queue;
|
||||
|
||||
return ((cond % 2) != 0);
|
||||
/* Policy: use 1st queue as high priority compute queue if we
|
||||
* have more than one compute queue.
|
||||
*/
|
||||
if (adev->gfx.num_compute_rings > 1 &&
|
||||
ring == &adev->gfx.compute_ring[0])
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev)
|
||||
|
|
|
|||
|
|
@ -380,7 +380,7 @@ void amdgpu_queue_mask_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
|
|||
bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec,
|
||||
int pipe, int queue);
|
||||
bool amdgpu_gfx_is_high_priority_compute_queue(struct amdgpu_device *adev,
|
||||
int pipe, int queue);
|
||||
struct amdgpu_ring *ring);
|
||||
int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev, int me,
|
||||
int pipe, int queue);
|
||||
void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,
|
||||
|
|
|
|||
|
|
@ -120,7 +120,7 @@ uint64_t amdgpu_gmc_agp_addr(struct ttm_buffer_object *bo)
|
|||
{
|
||||
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
|
||||
|
||||
if (bo->num_pages != 1 || bo->ttm->caching == ttm_cached)
|
||||
if (bo->ttm->num_pages != 1 || bo->ttm->caching == ttm_cached)
|
||||
return AMDGPU_BO_INVALID_OFFSET;
|
||||
|
||||
if (bo->ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
* Copyright 2020 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
#ifndef __AMDGPU_HDP_H__
|
||||
#define __AMDGPU_HDP_H__
|
||||
|
||||
struct amdgpu_hdp_funcs {
|
||||
void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
|
||||
void (*invalidate_hdp)(struct amdgpu_device *adev,
|
||||
struct amdgpu_ring *ring);
|
||||
void (*reset_ras_error_count)(struct amdgpu_device *adev);
|
||||
void (*update_clock_gating)(struct amdgpu_device *adev, bool enable);
|
||||
void (*get_clock_gating_state)(struct amdgpu_device *adev, u32 *flags);
|
||||
void (*init_registers)(struct amdgpu_device *adev);
|
||||
};
|
||||
|
||||
struct amdgpu_hdp {
|
||||
const struct amdgpu_hdp_funcs *funcs;
|
||||
};
|
||||
|
||||
#endif /* __AMDGPU_HDP_H__ */
|
||||
|
|
@ -176,7 +176,7 @@ struct amdgpu_i2c_chan *amdgpu_i2c_create(struct drm_device *dev,
|
|||
i2c->rec = *rec;
|
||||
i2c->adapter.owner = THIS_MODULE;
|
||||
i2c->adapter.class = I2C_CLASS_DDC;
|
||||
i2c->adapter.dev.parent = &dev->pdev->dev;
|
||||
i2c->adapter.dev.parent = dev->dev;
|
||||
i2c->dev = dev;
|
||||
i2c_set_adapdata(&i2c->adapter, i2c);
|
||||
mutex_init(&i2c->mutex);
|
||||
|
|
|
|||
|
|
@ -195,6 +195,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
|
|||
if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync)
|
||||
ring->funcs->emit_mem_sync(ring);
|
||||
|
||||
if (ring->funcs->emit_wave_limit &&
|
||||
ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH)
|
||||
ring->funcs->emit_wave_limit(ring, true);
|
||||
|
||||
if (ring->funcs->insert_start)
|
||||
ring->funcs->insert_start(ring);
|
||||
|
||||
|
|
@ -295,6 +299,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
|
|||
ring->current_ctx = fence_ctx;
|
||||
if (vm && ring->funcs->emit_switch_buffer)
|
||||
amdgpu_ring_emit_switch_buffer(ring);
|
||||
|
||||
if (ring->funcs->emit_wave_limit &&
|
||||
ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH)
|
||||
ring->funcs->emit_wave_limit(ring, false);
|
||||
|
||||
amdgpu_ring_commit(ring);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -205,3 +205,48 @@ restart_ih:
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/**
|
||||
* amdgpu_ih_decode_iv_helper - decode an interrupt vector
|
||||
*
|
||||
* @adev: amdgpu_device pointer
|
||||
* @ih: ih ring to process
|
||||
* @entry: IV entry
|
||||
*
|
||||
* Decodes the interrupt vector at the current rptr
|
||||
* position and also advance the position for for Vega10
|
||||
* and later GPUs.
|
||||
*/
|
||||
void amdgpu_ih_decode_iv_helper(struct amdgpu_device *adev,
|
||||
struct amdgpu_ih_ring *ih,
|
||||
struct amdgpu_iv_entry *entry)
|
||||
{
|
||||
/* wptr/rptr are in bytes! */
|
||||
u32 ring_index = ih->rptr >> 2;
|
||||
uint32_t dw[8];
|
||||
|
||||
dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
|
||||
dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
|
||||
dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
|
||||
dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
|
||||
dw[4] = le32_to_cpu(ih->ring[ring_index + 4]);
|
||||
dw[5] = le32_to_cpu(ih->ring[ring_index + 5]);
|
||||
dw[6] = le32_to_cpu(ih->ring[ring_index + 6]);
|
||||
dw[7] = le32_to_cpu(ih->ring[ring_index + 7]);
|
||||
|
||||
entry->client_id = dw[0] & 0xff;
|
||||
entry->src_id = (dw[0] >> 8) & 0xff;
|
||||
entry->ring_id = (dw[0] >> 16) & 0xff;
|
||||
entry->vmid = (dw[0] >> 24) & 0xf;
|
||||
entry->vmid_src = (dw[0] >> 31);
|
||||
entry->timestamp = dw[1] | ((u64)(dw[2] & 0xffff) << 32);
|
||||
entry->timestamp_src = dw[2] >> 31;
|
||||
entry->pasid = dw[3] & 0xffff;
|
||||
entry->pasid_src = dw[3] >> 31;
|
||||
entry->src_data[0] = dw[4];
|
||||
entry->src_data[1] = dw[5];
|
||||
entry->src_data[2] = dw[6];
|
||||
entry->src_data[3] = dw[7];
|
||||
|
||||
/* wptr/rptr are in bytes! */
|
||||
ih->rptr += 32;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,6 +30,18 @@
|
|||
struct amdgpu_device;
|
||||
struct amdgpu_iv_entry;
|
||||
|
||||
struct amdgpu_ih_regs {
|
||||
uint32_t ih_rb_base;
|
||||
uint32_t ih_rb_base_hi;
|
||||
uint32_t ih_rb_cntl;
|
||||
uint32_t ih_rb_wptr;
|
||||
uint32_t ih_rb_rptr;
|
||||
uint32_t ih_doorbell_rptr;
|
||||
uint32_t ih_rb_wptr_addr_lo;
|
||||
uint32_t ih_rb_wptr_addr_hi;
|
||||
uint32_t psp_reg_id;
|
||||
};
|
||||
|
||||
/*
|
||||
* R6xx+ IH ring
|
||||
*/
|
||||
|
|
@ -53,6 +65,7 @@ struct amdgpu_ih_ring {
|
|||
bool enabled;
|
||||
unsigned rptr;
|
||||
atomic_t lock;
|
||||
struct amdgpu_ih_regs ih_regs;
|
||||
};
|
||||
|
||||
/* provided by the ih block */
|
||||
|
|
@ -75,5 +88,7 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
|
|||
void amdgpu_ih_ring_write(struct amdgpu_ih_ring *ih, const uint32_t *iv,
|
||||
unsigned int num_dw);
|
||||
int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
|
||||
|
||||
void amdgpu_ih_decode_iv_helper(struct amdgpu_device *adev,
|
||||
struct amdgpu_ih_ring *ih,
|
||||
struct amdgpu_iv_entry *entry);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -444,7 +444,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
|
|||
} else if (src_id >= AMDGPU_MAX_IRQ_SRC_ID) {
|
||||
DRM_DEBUG("Invalid src_id in IV: %d\n", src_id);
|
||||
|
||||
} else if (adev->irq.virq[src_id]) {
|
||||
} else if ((client_id == AMDGPU_IRQ_CLIENTID_LEGACY) &&
|
||||
adev->irq.virq[src_id]) {
|
||||
generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));
|
||||
|
||||
} else if (!adev->irq.client[client_id].sources) {
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue