drm/i915: Split plane updates of crtc->atomic into a helper, v2.
This makes it easier to verify that no changes are done when calling this from crtc instead. Changes since v1: - Make intel_wm_need_update static and always check it. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Maarten Lankhorst
Daniel Vetter
parent
86adf9d702
commit
da20eabd2c
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@ -114,6 +114,7 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
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struct intel_crtc_state *crtc_state;
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struct intel_plane *intel_plane = to_intel_plane(plane);
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struct intel_plane_state *intel_state = to_intel_plane_state(state);
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int ret;
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crtc = crtc ? crtc : plane->crtc;
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intel_crtc = to_intel_crtc(crtc);
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@ -160,20 +161,6 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
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intel_state->clip.y2 =
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crtc_state->base.active ? crtc_state->pipe_src_h : 0;
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/*
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* Disabling a plane is always okay; we just need to update
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* fb tracking in a special way since cleanup_fb() won't
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* get called by the plane helpers.
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*/
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if (state->fb == NULL && plane->state->fb != NULL) {
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/*
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* 'prepare' is never called when plane is being disabled, so
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* we need to handle frontbuffer tracking as a special case
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*/
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intel_crtc->atomic.disabled_planes |=
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(1 << drm_plane_index(plane));
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}
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if (state->fb && intel_rotation_90_or_270(state->rotation)) {
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if (!(state->fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
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state->fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED)) {
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@ -198,7 +185,11 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
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}
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}
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return intel_plane->check_plane(plane, intel_state);
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ret = intel_plane->check_plane(plane, intel_state);
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if (ret || !state->state)
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return ret;
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return intel_plane_atomic_calc_changes(&crtc_state->base, state);
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}
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static void intel_plane_atomic_update(struct drm_plane *plane,
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@ -4403,19 +4403,19 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state, int force_detach)
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* skl_update_scaler_plane - Stages update to scaler state for a given plane.
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*
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* @state: crtc's scaler state
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* @intel_plane: affected plane
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* @plane_state: atomic plane state to update
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*
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* Return
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* 0 - scaler_usage updated successfully
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* error - requested scaling cannot be supported or other error condition
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*/
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int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
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struct intel_plane *intel_plane,
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struct intel_plane_state *plane_state)
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static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
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struct intel_plane_state *plane_state)
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{
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
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struct intel_plane *intel_plane =
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to_intel_plane(plane_state->base.plane);
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struct drm_framebuffer *fb = plane_state->base.fb;
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int ret;
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@ -11677,6 +11677,161 @@ retry:
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return ret;
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}
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/**
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* intel_wm_need_update - Check whether watermarks need updating
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* @plane: drm plane
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* @state: new plane state
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*
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* Check current plane state versus the new one to determine whether
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* watermarks need to be recalculated.
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*
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* Returns true or false.
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*/
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static bool intel_wm_need_update(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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/* Update watermarks on tiling changes. */
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if (!plane->state->fb || !state->fb ||
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plane->state->fb->modifier[0] != state->fb->modifier[0] ||
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plane->state->rotation != state->rotation)
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return true;
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if (plane->state->crtc_w != state->crtc_w)
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return true;
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return false;
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}
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int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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struct drm_plane_state *plane_state)
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{
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struct drm_crtc *crtc = crtc_state->crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_plane *plane = plane_state->plane;
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_plane_state *old_plane_state =
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to_intel_plane_state(plane->state);
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int idx = intel_crtc->base.base.id, ret;
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int i = drm_plane_index(plane);
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bool mode_changed = needs_modeset(crtc_state);
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bool was_crtc_enabled = crtc->state->active;
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bool is_crtc_enabled = crtc_state->active;
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bool turn_off, turn_on, visible, was_visible;
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struct drm_framebuffer *fb = plane_state->fb;
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if (crtc_state && INTEL_INFO(dev)->gen >= 9 &&
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plane->type != DRM_PLANE_TYPE_CURSOR) {
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ret = skl_update_scaler_plane(
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to_intel_crtc_state(crtc_state),
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to_intel_plane_state(plane_state));
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if (ret)
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return ret;
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}
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/*
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* Disabling a plane is always okay; we just need to update
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* fb tracking in a special way since cleanup_fb() won't
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* get called by the plane helpers.
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*/
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if (old_plane_state->base.fb && !fb)
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intel_crtc->atomic.disabled_planes |= 1 << i;
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/* don't run rest during modeset yet */
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if (!intel_crtc->active || mode_changed)
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return 0;
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was_visible = old_plane_state->visible;
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visible = to_intel_plane_state(plane_state)->visible;
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if (!was_crtc_enabled && WARN_ON(was_visible))
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was_visible = false;
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if (!is_crtc_enabled && WARN_ON(visible))
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visible = false;
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if (!was_visible && !visible)
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return 0;
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turn_off = was_visible && (!visible || mode_changed);
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turn_on = visible && (!was_visible || mode_changed);
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DRM_DEBUG_ATOMIC("[CRTC:%i] has [PLANE:%i] with fb %i\n", idx,
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plane->base.id, fb ? fb->base.id : -1);
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DRM_DEBUG_ATOMIC("[PLANE:%i] visible %i -> %i, off %i, on %i, ms %i\n",
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plane->base.id, was_visible, visible,
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turn_off, turn_on, mode_changed);
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if (intel_wm_need_update(plane, plane_state))
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intel_crtc->atomic.update_wm = true;
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switch (plane->type) {
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case DRM_PLANE_TYPE_PRIMARY:
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if (visible)
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intel_crtc->atomic.fb_bits |=
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INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
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intel_crtc->atomic.wait_for_flips = true;
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intel_crtc->atomic.pre_disable_primary = turn_off;
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intel_crtc->atomic.post_enable_primary = turn_on;
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if (turn_off)
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intel_crtc->atomic.disable_fbc = true;
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/*
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* FBC does not work on some platforms for rotated
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* planes, so disable it when rotation is not 0 and
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* update it when rotation is set back to 0.
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*
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* FIXME: This is redundant with the fbc update done in
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* the primary plane enable function except that that
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* one is done too late. We eventually need to unify
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* this.
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*/
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if (visible &&
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INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
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dev_priv->fbc.crtc == intel_crtc &&
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plane_state->rotation != BIT(DRM_ROTATE_0))
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intel_crtc->atomic.disable_fbc = true;
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/*
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* BDW signals flip done immediately if the plane
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* is disabled, even if the plane enable is already
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* armed to occur at the next vblank :(
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*/
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if (turn_on && IS_BROADWELL(dev))
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intel_crtc->atomic.wait_vblank = true;
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intel_crtc->atomic.update_fbc |= visible || mode_changed;
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break;
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case DRM_PLANE_TYPE_CURSOR:
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if (visible)
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intel_crtc->atomic.fb_bits |=
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INTEL_FRONTBUFFER_CURSOR(intel_crtc->pipe);
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break;
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case DRM_PLANE_TYPE_OVERLAY:
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/*
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* 'prepare' is never called when plane is being disabled, so
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* we need to handle frontbuffer tracking as a special case
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*/
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if (visible)
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intel_crtc->atomic.fb_bits |=
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INTEL_FRONTBUFFER_SPRITE(intel_crtc->pipe);
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if (turn_off && is_crtc_enabled) {
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intel_crtc->atomic.wait_vblank = true;
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intel_crtc->atomic.update_sprite_watermarks |=
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1 << i;
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}
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break;
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}
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return 0;
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}
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static bool encoders_cloneable(const struct intel_encoder *a,
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const struct intel_encoder *b)
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{
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@ -13443,28 +13598,6 @@ static void intel_shared_dpll_init(struct drm_device *dev)
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BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
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}
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/**
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* intel_wm_need_update - Check whether watermarks need updating
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* @plane: drm plane
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* @state: new plane state
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*
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* Check current plane state versus the new one to determine whether
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* watermarks need to be recalculated.
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*
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* Returns true or false.
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*/
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bool intel_wm_need_update(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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/* Update watermarks on tiling changes. */
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if (!plane->state->fb || !state->fb ||
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plane->state->fb->modifier[0] != state->fb->modifier[0] ||
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plane->state->rotation != state->rotation)
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return true;
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return false;
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}
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/**
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* intel_prepare_plane_fb - Prepare fb for usage on plane
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* @plane: drm plane to prepare for
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@ -13586,7 +13719,6 @@ intel_check_primary_plane(struct drm_plane *plane,
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struct intel_plane_state *state)
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{
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struct drm_device *dev = plane->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_crtc *crtc = state->base.crtc;
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struct intel_crtc *intel_crtc;
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struct intel_crtc_state *crtc_state;
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@ -13597,7 +13729,6 @@ intel_check_primary_plane(struct drm_plane *plane,
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bool can_position = false;
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int max_scale = DRM_PLANE_HELPER_NO_SCALING;
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int min_scale = DRM_PLANE_HELPER_NO_SCALING;
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int ret;
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crtc = crtc ? crtc : plane->crtc;
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intel_crtc = to_intel_crtc(crtc);
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@ -13613,73 +13744,11 @@ intel_check_primary_plane(struct drm_plane *plane,
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can_position = true;
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}
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ret = drm_plane_helper_check_update(plane, crtc, fb,
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src, dest, clip,
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min_scale,
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max_scale,
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can_position, true,
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&state->visible);
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if (ret)
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return ret;
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if (intel_crtc->active) {
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struct intel_plane_state *old_state =
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to_intel_plane_state(plane->state);
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intel_crtc->atomic.wait_for_flips = true;
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/*
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* FBC does not work on some platforms for rotated
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* planes, so disable it when rotation is not 0 and
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* update it when rotation is set back to 0.
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*
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* FIXME: This is redundant with the fbc update done in
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* the primary plane enable function except that that
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* one is done too late. We eventually need to unify
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* this.
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*/
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if (state->visible &&
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INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
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dev_priv->fbc.crtc == intel_crtc &&
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state->base.rotation != BIT(DRM_ROTATE_0)) {
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intel_crtc->atomic.disable_fbc = true;
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}
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if (state->visible && !old_state->visible) {
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/*
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* BDW signals flip done immediately if the plane
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* is disabled, even if the plane enable is already
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* armed to occur at the next vblank :(
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*/
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if (IS_BROADWELL(dev))
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intel_crtc->atomic.wait_vblank = true;
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if (crtc_state && !needs_modeset(&crtc_state->base))
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intel_crtc->atomic.post_enable_primary = true;
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}
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if (!state->visible && old_state->visible &&
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crtc_state && !needs_modeset(&crtc_state->base))
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intel_crtc->atomic.pre_disable_primary = true;
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intel_crtc->atomic.fb_bits |=
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INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
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intel_crtc->atomic.update_fbc = true;
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if (intel_wm_need_update(plane, &state->base))
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intel_crtc->atomic.update_wm = true;
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}
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if (INTEL_INFO(dev)->gen >= 9) {
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ret = skl_update_scaler_plane(crtc_state,
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to_intel_plane(plane),
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state);
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if (ret)
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return ret;
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}
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return 0;
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return drm_plane_helper_check_update(plane, crtc, fb,
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src, dest, clip,
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min_scale, max_scale,
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can_position, true,
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&state->visible);
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}
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static void
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@ -13939,10 +14008,9 @@ intel_check_cursor_plane(struct drm_plane *plane,
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if (ret)
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return ret;
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/* if we want to turn off the cursor ignore width and height */
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if (!obj)
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goto finish;
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return 0;
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/* Check for which cursor types we support */
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if (!cursor_size_ok(dev, state->base.crtc_w, state->base.crtc_h)) {
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@ -13959,19 +14027,10 @@ intel_check_cursor_plane(struct drm_plane *plane,
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if (fb->modifier[0] != DRM_FORMAT_MOD_NONE) {
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DRM_DEBUG_KMS("cursor cannot be tiled\n");
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ret = -EINVAL;
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return -EINVAL;
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}
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finish:
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if (intel_crtc->active) {
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if (plane->state->crtc_w != state->base.crtc_w)
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intel_crtc->atomic.update_wm = true;
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intel_crtc->atomic.fb_bits |=
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INTEL_FRONTBUFFER_CURSOR(intel_crtc->pipe);
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}
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return ret;
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return 0;
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}
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static void
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|
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@ -1067,6 +1067,8 @@ int intel_plane_atomic_set_property(struct drm_plane *plane,
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struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t val);
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int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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struct drm_plane_state *plane_state);
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unsigned int
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intel_tile_height(struct drm_device *dev, uint32_t pixel_format,
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@ -1081,9 +1083,6 @@ intel_rotation_90_or_270(unsigned int rotation)
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void intel_create_rotation_property(struct drm_device *dev,
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struct intel_plane *plane);
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bool intel_wm_need_update(struct drm_plane *plane,
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struct drm_plane_state *state);
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/* shared dpll functions */
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struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
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void assert_shared_dpll(struct drm_i915_private *dev_priv,
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@ -1148,9 +1147,6 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
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void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc);
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void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
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void skl_detach_scalers(struct intel_crtc *intel_crtc);
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int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
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struct intel_plane *intel_plane,
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struct intel_plane_state *plane_state);
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int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state, int force_detach);
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int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
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|
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@ -759,7 +759,6 @@ intel_check_sprite_plane(struct drm_plane *plane,
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int max_scale, min_scale;
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bool can_scale;
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int pixel_size;
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int ret;
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intel_crtc = intel_crtc ? intel_crtc : to_intel_crtc(plane->crtc);
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crtc_state = state->base.state ?
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@ -767,7 +766,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
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if (!fb) {
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state->visible = false;
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goto finish;
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return 0;
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}
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/* Don't modify another pipe's plane */
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|
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@ -920,35 +919,6 @@ intel_check_sprite_plane(struct drm_plane *plane,
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dst->y1 = crtc_y;
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dst->y2 = crtc_y + crtc_h;
|
||||
|
||||
finish:
|
||||
/*
|
||||
* If the sprite is completely covering the primary plane,
|
||||
* we can disable the primary and save power.
|
||||
*/
|
||||
if (intel_crtc->active) {
|
||||
intel_crtc->atomic.fb_bits |=
|
||||
INTEL_FRONTBUFFER_SPRITE(intel_crtc->pipe);
|
||||
|
||||
if (intel_wm_need_update(plane, &state->base))
|
||||
intel_crtc->atomic.update_wm = true;
|
||||
|
||||
if (!state->visible) {
|
||||
/*
|
||||
* Avoid underruns when disabling the sprite.
|
||||
* FIXME remove once watermark updates are done properly.
|
||||
*/
|
||||
intel_crtc->atomic.wait_vblank = true;
|
||||
intel_crtc->atomic.update_sprite_watermarks |=
|
||||
(1 << drm_plane_index(plane));
|
||||
}
|
||||
}
|
||||
|
||||
if (INTEL_INFO(dev)->gen >= 9) {
|
||||
ret = skl_update_scaler_plane(crtc_state, intel_plane, state);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue