ARM: S3C64XX: Change to using s3c_gpio_cfgall_range()
Change the code setting a range of GPIO pins' configuration and pull state to use the recently introduced s3c_gpio_cfgall_range(). Mop up a few missed s3c_gpio_cfgpin_range() changes. Signed-off-by: Ben Dooks <ben-linux@fluff.org> [kgene.kim@samsung.com: Fix small comments] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -23,15 +23,9 @@
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extern void s3c64xx_fb_gpio_setup_24bpp(void)
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{
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unsigned int gpio;
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s3c_gpio_cfgall_range(S3C64XX_GPI(0), 16,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
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for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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s3c_gpio_cfgall_range(S3C64XX_GPJ(0), 12,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
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}
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@ -24,16 +24,10 @@
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void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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unsigned int end;
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end = S3C64XX_GPG(2 + width);
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/* Set all the necessary GPG pins to special-function 0 */
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s3c_gpio_cfgpin_range(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
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for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) {
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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/* Set all the necessary GPG pins to special-function 2 */
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s3c_gpio_cfgall_range(S3C64XX_GPG(0), 2 + width,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
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@ -44,16 +38,10 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
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void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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unsigned int end;
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end = S3C64XX_GPH(2 + width);
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/* Set all the necessary GPG pins to special-function 0 */
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s3c_gpio_cfgpin_range(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2));
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for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) {
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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/* Set all the necessary GPH pins to special-function 2 */
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s3c_gpio_cfgall_range(S3C64XX_GPH(0), 2 + width,
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S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
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@ -63,20 +51,11 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
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void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
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{
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unsigned int gpio;
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unsigned int end;
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/* Set all the necessary GPH pins to special-function 3 */
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s3c_gpio_cfgall_range(S3C64XX_GPH(6), width,
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S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE);
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end = S3C64XX_GPH(6 + width);
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/* Set all the necessary GPH pins to special-function 1 */
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s3c_gpio_cfgpin_range(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3));
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for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) {
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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/* Set all the necessary GPC pins to special-function 1 */
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s3c_gpio_cfgpin_range(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3));
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for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) {
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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/* Set all the necessary GPC pins to special-function 3 */
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s3c_gpio_cfgall_range(S3C64XX_GPC(4), 2,
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S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE);
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}
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