x86/intel_idle: Use Intel family macros for intel_idle
Use the new INTEL_FAM6_* macros for intel_idle.c. Also fix up some of the macros to be consistent with how some of the intel_idle code refers to the model. There's on oddity here: model 0x1F is uniquely referred to here and nowhere else that I could find. 0x1E/0x1F are just spelled out as "Intel Core i7 and i5 Processors" in the SDM or as "Intel processors based on the Nehalem, Westmere microarchitectures" in the RDPMC section. Comments between tables 19-19 and 19-20 in the SDM seem to point to 0x1F being some kind of Westmere, so let's call it "WESTMERE2". Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave@sr71.net> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Len Brown <lenb@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: jacob.jun.pan@intel.com Cc: linux-pm@vger.kernel.org Link: http://lkml.kernel.org/r/20160603001932.EE978EB9@viggo.jf.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>hifive-unleashed-5.1
Dave Hansen
Ingo Molnar
parent
d40671e30c
commit
db73c5a8c8
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@ -62,6 +62,7 @@
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#include <linux/cpu.h>
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#include <linux/module.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/mwait.h>
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#include <asm/msr.h>
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@ -1020,38 +1021,38 @@ static const struct idle_cpu idle_cpu_bxt = {
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{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
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static const struct x86_cpu_id intel_idle_ids[] __initconst = {
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ICPU(0x1a, idle_cpu_nehalem),
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ICPU(0x1e, idle_cpu_nehalem),
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ICPU(0x1f, idle_cpu_nehalem),
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ICPU(0x25, idle_cpu_nehalem),
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ICPU(0x2c, idle_cpu_nehalem),
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ICPU(0x2e, idle_cpu_nehalem),
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ICPU(0x1c, idle_cpu_atom),
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ICPU(0x26, idle_cpu_lincroft),
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ICPU(0x2f, idle_cpu_nehalem),
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ICPU(0x2a, idle_cpu_snb),
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ICPU(0x2d, idle_cpu_snb),
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ICPU(0x36, idle_cpu_atom),
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ICPU(0x37, idle_cpu_byt),
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ICPU(0x4c, idle_cpu_cht),
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ICPU(0x3a, idle_cpu_ivb),
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ICPU(0x3e, idle_cpu_ivt),
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ICPU(0x3c, idle_cpu_hsw),
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ICPU(0x3f, idle_cpu_hsw),
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ICPU(0x45, idle_cpu_hsw),
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ICPU(0x46, idle_cpu_hsw),
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ICPU(0x4d, idle_cpu_avn),
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ICPU(0x3d, idle_cpu_bdw),
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ICPU(0x47, idle_cpu_bdw),
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ICPU(0x4f, idle_cpu_bdw),
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ICPU(0x56, idle_cpu_bdw),
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ICPU(0x4e, idle_cpu_skl),
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ICPU(0x5e, idle_cpu_skl),
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ICPU(0x8e, idle_cpu_skl),
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ICPU(0x9e, idle_cpu_skl),
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ICPU(0x55, idle_cpu_skx),
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ICPU(0x57, idle_cpu_knl),
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ICPU(0x5c, idle_cpu_bxt),
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ICPU(INTEL_FAM6_NEHALEM_EP, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_NEHALEM, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_WESTMERE2, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_WESTMERE, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_WESTMERE_EP, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_NEHALEM_EX, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_ATOM_PINEVIEW, idle_cpu_atom),
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ICPU(INTEL_FAM6_ATOM_LINCROFT, idle_cpu_lincroft),
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ICPU(INTEL_FAM6_WESTMERE_EX, idle_cpu_nehalem),
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ICPU(INTEL_FAM6_SANDYBRIDGE, idle_cpu_snb),
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ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb),
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ICPU(INTEL_FAM6_ATOM_CEDARVIEW, idle_cpu_atom),
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ICPU(INTEL_FAM6_ATOM_SILVERMONT1, idle_cpu_byt),
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ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht),
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ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb),
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ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt),
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ICPU(INTEL_FAM6_HASWELL_CORE, idle_cpu_hsw),
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ICPU(INTEL_FAM6_HASWELL_X, idle_cpu_hsw),
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ICPU(INTEL_FAM6_HASWELL_ULT, idle_cpu_hsw),
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ICPU(INTEL_FAM6_HASWELL_GT3E, idle_cpu_hsw),
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ICPU(INTEL_FAM6_ATOM_SILVERMONT2, idle_cpu_avn),
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ICPU(INTEL_FAM6_BROADWELL_CORE, idle_cpu_bdw),
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ICPU(INTEL_FAM6_BROADWELL_GT3E, idle_cpu_bdw),
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ICPU(INTEL_FAM6_BROADWELL_X, idle_cpu_bdw),
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ICPU(INTEL_FAM6_BROADWELL_XEON_D, idle_cpu_bdw),
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ICPU(INTEL_FAM6_SKYLAKE_MOBILE, idle_cpu_skl),
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ICPU(INTEL_FAM6_SKYLAKE_DESKTOP, idle_cpu_skl),
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ICPU(INTEL_FAM6_KABYLAKE_MOBILE, idle_cpu_skl),
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ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, idle_cpu_skl),
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ICPU(INTEL_FAM6_SKYLAKE_X, idle_cpu_skx),
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ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
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ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
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@ -1261,13 +1262,13 @@ static void intel_idle_state_table_update(void)
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{
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switch (boot_cpu_data.x86_model) {
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case 0x3e: /* IVT */
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case INTEL_FAM6_IVYBRIDGE_X:
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ivt_idle_state_table_update();
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break;
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case 0x5c: /* BXT */
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case INTEL_FAM6_ATOM_GOLDMONT:
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bxt_idle_state_table_update();
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break;
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case 0x5e: /* SKL-H */
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case INTEL_FAM6_SKYLAKE_DESKTOP:
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sklh_idle_state_table_update();
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break;
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}
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