PCIe ASPM: use pci_pcie_cap()
Use pci_pcie_cap() instead of pci_find_capability() to get PCIe capability offset in PCIe ASPM driver. This avoids unnecessary search in PCI configuration space. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -122,7 +122,7 @@ static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
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struct pci_bus *linkbus = link->pdev->subordinate;
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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pos = pci_find_capability(child, PCI_CAP_ID_EXP);
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pos = pci_pcie_cap(child);
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if (!pos)
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return;
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pci_read_config_word(child, pos + PCI_EXP_LNKCTL, ®16);
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@ -156,7 +156,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
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/* All functions should have the same cap and state, take the worst */
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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pos = pci_find_capability(child, PCI_CAP_ID_EXP);
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pos = pci_pcie_cap(child);
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if (!pos)
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return;
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pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, ®32);
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@ -194,20 +194,20 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
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BUG_ON(!child->is_pcie);
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/* Check downstream component if bit Slot Clock Configuration is 1 */
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cpos = pci_find_capability(child, PCI_CAP_ID_EXP);
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cpos = pci_pcie_cap(child);
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pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, ®16);
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if (!(reg16 & PCI_EXP_LNKSTA_SLC))
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same_clock = 0;
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/* Check upstream component if bit Slot Clock Configuration is 1 */
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ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
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ppos = pci_pcie_cap(parent);
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pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, ®16);
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if (!(reg16 & PCI_EXP_LNKSTA_SLC))
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same_clock = 0;
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/* Configure downstream component, all functions */
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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cpos = pci_find_capability(child, PCI_CAP_ID_EXP);
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cpos = pci_pcie_cap(child);
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pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, ®16);
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child_reg[PCI_FUNC(child->devfn)] = reg16;
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if (same_clock)
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@ -247,7 +247,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
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dev_printk(KERN_ERR, &parent->dev,
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"ASPM: Could not configure common clock\n");
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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cpos = pci_find_capability(child, PCI_CAP_ID_EXP);
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cpos = pci_pcie_cap(child);
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pci_write_config_word(child, cpos + PCI_EXP_LNKCTL,
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child_reg[PCI_FUNC(child->devfn)]);
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}
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@ -300,7 +300,7 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev,
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u16 reg16;
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u32 reg32;
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pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
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pos = pci_pcie_cap(pdev);
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pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, ®32);
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info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
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info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
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@ -420,7 +420,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
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child->pcie_type != PCI_EXP_TYPE_LEG_END)
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continue;
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pos = pci_find_capability(child, PCI_CAP_ID_EXP);
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pos = pci_pcie_cap(child);
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pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, ®32);
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/* Calculate endpoint L0s acceptable latency */
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encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
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@ -436,7 +436,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
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static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
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{
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u16 reg16;
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int pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
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int pos = pci_pcie_cap(pdev);
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pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16);
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reg16 &= ~0x3;
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@ -503,7 +503,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
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* very strange. Disable ASPM for the whole slot
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*/
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list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
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pos = pci_find_capability(child, PCI_CAP_ID_EXP);
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pos = pci_pcie_cap(child);
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if (!pos)
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return -EINVAL;
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/*
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