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PCI / PM: Restore PME Enable if skipping wakeup setup 

The wakeup_prepared PCI device flag is used for preventing subsequent
changes of PCI device wakeup settings in the same way (e.g. enabling
device wakeup twice in a row).

However, in some cases PME Enable may be updated by things like PCI
configuration space restoration in the meantime and it may need to be
set again even though the rest of the settings need not change, so
modify __pci_enable_wake() to do that when it is about to return
early.

Also, it is reasonable to expect that __pci_enable_wake() will always
clear PME Status when invoked to disable device wakeup, so make it do
so even if it is going to return early then.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
hifive-unleashed-5.1
Rafael J. Wysocki 2017-06-12 22:53:36 +02:00
parent 604d895857
commit dc15e71eef
1 changed files with 24 additions and 2 deletions
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26
drivers/pci/pci.c
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@ -1805,6 +1805,23 @@ static void __pci_pme_active(struct pci_dev *dev, bool enable)
pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
}
static void pci_pme_restore(struct pci_dev *dev)
{
u16 pmcsr;
if (!dev->pme_support)
return;
pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
if (dev->wakeup_prepared) {
pmcsr |= PCI_PM_CTRL_PME_ENABLE;
} else {
pmcsr &= ~PCI_PM_CTRL_PME_ENABLE;
pmcsr |= PCI_PM_CTRL_PME_STATUS;
}
pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
}
/**
* pci_pme_active - enable or disable PCI device's PME# function
* @dev: PCI device to handle.
@ -1899,9 +1916,14 @@ int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
if (enable && !runtime && !device_may_wakeup(&dev->dev))
return -EINVAL;
/* Don't do the same thing twice in a row for one device. */
if (!!enable == !!dev->wakeup_prepared)
/*
* Don't do the same thing twice in a row for one device, but restore
* PME Enable in case it has been updated by config space restoration.
*/
if (!!enable == !!dev->wakeup_prepared) {
pci_pme_restore(dev);
return 0;
}
/*
* According to "PCI System Architecture" 4th ed. by Tom Shanley & Don