Merge branch 'ftgmac-rework-batch2-rx-path'
Benjamin Herrenschmidt says: ==================== ftgmac: Rework batch 2 - RX path This is the second batch of updates to the ftgmac100 driver. This one tackles the RX path of the driver, simplifying it greatly to match common practice while significantly increasing the performance. (The bulk of the performance gains of my series will be provided by the TX path improvements, notably fragmented sends, these will be in the next batch). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>hifive-unleashed-5.1
David S. Miller
commit
dc423b6be1
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@ -43,8 +43,8 @@
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#define RX_QUEUE_ENTRIES 256 /* must be power of 2 */
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#define TX_QUEUE_ENTRIES 512 /* must be power of 2 */
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#define MAX_PKT_SIZE 1518
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#define RX_BUF_SIZE PAGE_SIZE /* must be smaller than 0x3fff */
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#define MAX_PKT_SIZE 1536
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#define RX_BUF_SIZE MAX_PKT_SIZE /* must be smaller than 0x3fff */
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struct ftgmac100_descs {
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struct ftgmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
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@ -60,7 +60,7 @@ struct ftgmac100 {
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dma_addr_t descs_dma_addr;
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/* Rx ring */
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struct page *rx_pages[RX_QUEUE_ENTRIES];
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struct sk_buff *rx_skbs[RX_QUEUE_ENTRIES];
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unsigned int rx_pointer;
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u32 rxdes0_edorr_mask;
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@ -71,6 +71,10 @@ struct ftgmac100 {
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u32 txdes0_edotr_mask;
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spinlock_t tx_lock;
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/* Scratch page to use when rx skb alloc fails */
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void *rx_scratch;
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dma_addr_t rx_scratch_dma;
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/* Component structures */
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struct net_device *netdev;
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struct device *dev;
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@ -88,9 +92,6 @@ struct ftgmac100 {
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bool need_mac_restart;
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};
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static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes, gfp_t gfp);
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static void ftgmac100_set_rx_ring_base(struct ftgmac100 *priv, dma_addr_t addr)
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{
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iowrite32(addr, priv->base + FTGMAC100_OFFSET_RXR_BADR);
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@ -277,128 +278,49 @@ static void ftgmac100_stop_hw(struct ftgmac100 *priv)
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iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);
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}
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static bool ftgmac100_rxdes_first_segment(struct ftgmac100_rxdes *rxdes)
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static int ftgmac100_alloc_rx_buf(struct ftgmac100 *priv, unsigned int entry,
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struct ftgmac100_rxdes *rxdes, gfp_t gfp)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FRS);
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}
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struct net_device *netdev = priv->netdev;
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struct sk_buff *skb;
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dma_addr_t map;
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int err;
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static bool ftgmac100_rxdes_last_segment(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_LRS);
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}
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skb = netdev_alloc_skb_ip_align(netdev, RX_BUF_SIZE);
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if (unlikely(!skb)) {
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if (net_ratelimit())
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netdev_warn(netdev, "failed to allocate rx skb\n");
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err = -ENOMEM;
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map = priv->rx_scratch_dma;
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} else {
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map = dma_map_single(priv->dev, skb->data, RX_BUF_SIZE,
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DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(priv->dev, map))) {
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if (net_ratelimit())
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netdev_err(netdev, "failed to map rx page\n");
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dev_kfree_skb_any(skb);
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map = priv->rx_scratch_dma;
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skb = NULL;
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err = -ENOMEM;
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}
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}
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static bool ftgmac100_rxdes_packet_ready(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY);
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}
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/* Store skb */
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priv->rx_skbs[entry] = skb;
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static void ftgmac100_rxdes_set_dma_own(const struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes)
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{
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/* clear status bits */
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rxdes->rxdes0 &= cpu_to_le32(priv->rxdes0_edorr_mask);
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}
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/* Store DMA address into RX desc */
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rxdes->rxdes3 = cpu_to_le32(map);
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static bool ftgmac100_rxdes_rx_error(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ERR);
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}
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/* Ensure the above is ordered vs clearing the OWN bit */
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dma_wmb();
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static bool ftgmac100_rxdes_crc_error(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_CRC_ERR);
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}
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/* Clean status (which resets own bit) */
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if (entry == (RX_QUEUE_ENTRIES - 1))
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rxdes->rxdes0 = cpu_to_le32(priv->rxdes0_edorr_mask);
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else
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rxdes->rxdes0 = 0;
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static bool ftgmac100_rxdes_frame_too_long(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_FTL);
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}
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static bool ftgmac100_rxdes_runt(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RUNT);
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}
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static bool ftgmac100_rxdes_odd_nibble(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RX_ODD_NB);
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}
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static unsigned int ftgmac100_rxdes_data_length(struct ftgmac100_rxdes *rxdes)
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{
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return le32_to_cpu(rxdes->rxdes0) & FTGMAC100_RXDES0_VDBC;
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}
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static bool ftgmac100_rxdes_multicast(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_MULTICAST);
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}
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static void ftgmac100_rxdes_set_end_of_ring(const struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes)
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{
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rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
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}
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static void ftgmac100_rxdes_set_dma_addr(struct ftgmac100_rxdes *rxdes,
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dma_addr_t addr)
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{
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rxdes->rxdes3 = cpu_to_le32(addr);
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}
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static dma_addr_t ftgmac100_rxdes_get_dma_addr(struct ftgmac100_rxdes *rxdes)
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{
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return le32_to_cpu(rxdes->rxdes3);
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}
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static bool ftgmac100_rxdes_is_tcp(struct ftgmac100_rxdes *rxdes)
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{
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return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
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cpu_to_le32(FTGMAC100_RXDES1_PROT_TCPIP);
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}
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static bool ftgmac100_rxdes_is_udp(struct ftgmac100_rxdes *rxdes)
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{
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return (rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_PROT_MASK)) ==
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cpu_to_le32(FTGMAC100_RXDES1_PROT_UDPIP);
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}
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static bool ftgmac100_rxdes_tcpcs_err(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_TCP_CHKSUM_ERR);
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}
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static bool ftgmac100_rxdes_udpcs_err(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_UDP_CHKSUM_ERR);
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}
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static bool ftgmac100_rxdes_ipcs_err(struct ftgmac100_rxdes *rxdes)
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{
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return rxdes->rxdes1 & cpu_to_le32(FTGMAC100_RXDES1_IP_CHKSUM_ERR);
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}
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static inline struct page **ftgmac100_rxdes_page_slot(struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes)
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{
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return &priv->rx_pages[rxdes - priv->descs->rxdes];
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}
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/*
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* rxdes2 is not used by hardware. We use it to keep track of page.
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* Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
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*/
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static void ftgmac100_rxdes_set_page(struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes,
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struct page *page)
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{
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*ftgmac100_rxdes_page_slot(priv, rxdes) = page;
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}
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static struct page *ftgmac100_rxdes_get_page(struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes)
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{
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return *ftgmac100_rxdes_page_slot(priv, rxdes);
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return 0;
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}
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static int ftgmac100_next_rx_pointer(int pointer)
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@ -406,102 +328,20 @@ static int ftgmac100_next_rx_pointer(int pointer)
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return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
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}
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static void ftgmac100_rx_pointer_advance(struct ftgmac100 *priv)
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{
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priv->rx_pointer = ftgmac100_next_rx_pointer(priv->rx_pointer);
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}
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static struct ftgmac100_rxdes *ftgmac100_current_rxdes(struct ftgmac100 *priv)
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{
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return &priv->descs->rxdes[priv->rx_pointer];
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}
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static struct ftgmac100_rxdes *
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ftgmac100_rx_locate_first_segment(struct ftgmac100 *priv)
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{
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struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
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while (ftgmac100_rxdes_packet_ready(rxdes)) {
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if (ftgmac100_rxdes_first_segment(rxdes))
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return rxdes;
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ftgmac100_rxdes_set_dma_own(priv, rxdes);
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ftgmac100_rx_pointer_advance(priv);
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rxdes = ftgmac100_current_rxdes(priv);
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}
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return NULL;
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}
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static bool ftgmac100_rx_packet_error(struct ftgmac100 *priv,
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struct ftgmac100_rxdes *rxdes)
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static void ftgmac100_rx_packet_error(struct ftgmac100 *priv, u32 status)
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{
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struct net_device *netdev = priv->netdev;
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bool error = false;
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if (unlikely(ftgmac100_rxdes_rx_error(rxdes))) {
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if (net_ratelimit())
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netdev_info(netdev, "rx err\n");
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if (status & FTGMAC100_RXDES0_RX_ERR)
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netdev->stats.rx_errors++;
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error = true;
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}
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if (unlikely(ftgmac100_rxdes_crc_error(rxdes))) {
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if (net_ratelimit())
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netdev_info(netdev, "rx crc err\n");
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if (status & FTGMAC100_RXDES0_CRC_ERR)
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netdev->stats.rx_crc_errors++;
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error = true;
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} else if (unlikely(ftgmac100_rxdes_ipcs_err(rxdes))) {
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if (net_ratelimit())
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netdev_info(netdev, "rx IP checksum err\n");
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error = true;
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}
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if (unlikely(ftgmac100_rxdes_frame_too_long(rxdes))) {
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if (net_ratelimit())
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netdev_info(netdev, "rx frame too long\n");
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if (status & (FTGMAC100_RXDES0_FTL |
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FTGMAC100_RXDES0_RUNT |
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FTGMAC100_RXDES0_RX_ODD_NB))
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netdev->stats.rx_length_errors++;
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error = true;
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} else if (unlikely(ftgmac100_rxdes_runt(rxdes))) {
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if (net_ratelimit())
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netdev_info(netdev, "rx runt\n");
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netdev->stats.rx_length_errors++;
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error = true;
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} else if (unlikely(ftgmac100_rxdes_odd_nibble(rxdes))) {
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if (net_ratelimit())
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netdev_info(netdev, "rx odd nibble\n");
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netdev->stats.rx_length_errors++;
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error = true;
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}
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return error;
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}
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static void ftgmac100_rx_drop_packet(struct ftgmac100 *priv)
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{
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struct net_device *netdev = priv->netdev;
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struct ftgmac100_rxdes *rxdes = ftgmac100_current_rxdes(priv);
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bool done = false;
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if (net_ratelimit())
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netdev_dbg(netdev, "drop packet %p\n", rxdes);
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do {
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if (ftgmac100_rxdes_last_segment(rxdes))
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done = true;
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ftgmac100_rxdes_set_dma_own(priv, rxdes);
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ftgmac100_rx_pointer_advance(priv);
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rxdes = ftgmac100_current_rxdes(priv);
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} while (!done && ftgmac100_rxdes_packet_ready(rxdes));
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netdev->stats.rx_dropped++;
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}
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static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
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@ -509,80 +349,122 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed)
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struct net_device *netdev = priv->netdev;
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struct ftgmac100_rxdes *rxdes;
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struct sk_buff *skb;
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bool done = false;
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unsigned int pointer, size;
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u32 status, csum_vlan;
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dma_addr_t map;
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rxdes = ftgmac100_rx_locate_first_segment(priv);
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if (!rxdes)
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/* Grab next RX descriptor */
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pointer = priv->rx_pointer;
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rxdes = &priv->descs->rxdes[pointer];
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|
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/* Grab descriptor status */
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status = le32_to_cpu(rxdes->rxdes0);
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|
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/* Do we have a packet ? */
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if (!(status & FTGMAC100_RXDES0_RXPKT_RDY))
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return false;
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|
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if (unlikely(ftgmac100_rx_packet_error(priv, rxdes))) {
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ftgmac100_rx_drop_packet(priv);
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return true;
|
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/* Order subsequent reads with the test for the ready bit */
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dma_rmb();
|
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|
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/* We don't cope with fragmented RX packets */
|
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if (unlikely(!(status & FTGMAC100_RXDES0_FRS) ||
|
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!(status & FTGMAC100_RXDES0_LRS)))
|
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goto drop;
|
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|
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/* Grab received size and csum vlan field in the descriptor */
|
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size = status & FTGMAC100_RXDES0_VDBC;
|
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csum_vlan = le32_to_cpu(rxdes->rxdes1);
|
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|
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/* Any error (other than csum offload) flagged ? */
|
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if (unlikely(status & RXDES0_ANY_ERROR)) {
|
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/* Correct for incorrect flagging of runt packets
|
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* with vlan tags... Just accept a runt packet that
|
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* has been flagged as vlan and whose size is at
|
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* least 60 bytes.
|
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*/
|
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if ((status & FTGMAC100_RXDES0_RUNT) &&
|
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(csum_vlan & FTGMAC100_RXDES1_VLANTAG_AVAIL) &&
|
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(size >= 60))
|
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status &= ~FTGMAC100_RXDES0_RUNT;
|
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|
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/* Any error still in there ? */
|
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if (status & RXDES0_ANY_ERROR) {
|
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ftgmac100_rx_packet_error(priv, status);
|
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goto drop;
|
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}
|
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}
|
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|
||||
/* start processing */
|
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skb = netdev_alloc_skb_ip_align(netdev, 128);
|
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if (unlikely(!skb)) {
|
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if (net_ratelimit())
|
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netdev_err(netdev, "rx skb alloc failed\n");
|
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|
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ftgmac100_rx_drop_packet(priv);
|
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return true;
|
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/* If the packet had no skb (failed to allocate earlier)
|
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* then try to allocate one and skip
|
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*/
|
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skb = priv->rx_skbs[pointer];
|
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if (!unlikely(skb)) {
|
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ftgmac100_alloc_rx_buf(priv, pointer, rxdes, GFP_ATOMIC);
|
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goto drop;
|
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}
|
||||
|
||||
if (unlikely(ftgmac100_rxdes_multicast(rxdes)))
|
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if (unlikely(status & FTGMAC100_RXDES0_MULTICAST))
|
||||
netdev->stats.multicast++;
|
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|
||||
/*
|
||||
* It seems that HW does checksum incorrectly with fragmented packets,
|
||||
* so we are conservative here - if HW checksum error, let software do
|
||||
* the checksum again.
|
||||
/* If the HW found checksum errors, bounce it to software.
|
||||
*
|
||||
* If we didn't, we need to see if the packet was recognized
|
||||
* by HW as one of the supported checksummed protocols before
|
||||
* we accept the HW test results.
|
||||
*/
|
||||
if ((ftgmac100_rxdes_is_tcp(rxdes) && !ftgmac100_rxdes_tcpcs_err(rxdes)) ||
|
||||
(ftgmac100_rxdes_is_udp(rxdes) && !ftgmac100_rxdes_udpcs_err(rxdes)))
|
||||
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
||||
|
||||
do {
|
||||
dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
|
||||
struct page *page = ftgmac100_rxdes_get_page(priv, rxdes);
|
||||
unsigned int size;
|
||||
|
||||
dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
|
||||
|
||||
size = ftgmac100_rxdes_data_length(rxdes);
|
||||
skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, page, 0, size);
|
||||
|
||||
skb->len += size;
|
||||
skb->data_len += size;
|
||||
skb->truesize += PAGE_SIZE;
|
||||
|
||||
if (ftgmac100_rxdes_last_segment(rxdes))
|
||||
done = true;
|
||||
|
||||
ftgmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
|
||||
|
||||
ftgmac100_rx_pointer_advance(priv);
|
||||
rxdes = ftgmac100_current_rxdes(priv);
|
||||
} while (!done);
|
||||
|
||||
/* Small frames are copied into linear part of skb to free one page */
|
||||
if (skb->len <= 128) {
|
||||
skb->truesize -= PAGE_SIZE;
|
||||
__pskb_pull_tail(skb, skb->len);
|
||||
} else {
|
||||
/* We pull the minimum amount into linear part */
|
||||
__pskb_pull_tail(skb, ETH_HLEN);
|
||||
if (netdev->features & NETIF_F_RXCSUM) {
|
||||
u32 err_bits = FTGMAC100_RXDES1_TCP_CHKSUM_ERR |
|
||||
FTGMAC100_RXDES1_UDP_CHKSUM_ERR |
|
||||
FTGMAC100_RXDES1_IP_CHKSUM_ERR;
|
||||
if ((csum_vlan & err_bits) ||
|
||||
!(csum_vlan & FTGMAC100_RXDES1_PROT_MASK))
|
||||
skb->ip_summed = CHECKSUM_NONE;
|
||||
else
|
||||
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
||||
}
|
||||
|
||||
/* Transfer received size to skb */
|
||||
skb_put(skb, size);
|
||||
|
||||
/* Tear down DMA mapping, do necessary cache management */
|
||||
map = le32_to_cpu(rxdes->rxdes3);
|
||||
|
||||
#if defined(CONFIG_ARM) && !defined(CONFIG_ARM_DMA_USE_IOMMU)
|
||||
/* When we don't have an iommu, we can save cycles by not
|
||||
* invalidating the cache for the part of the packet that
|
||||
* wasn't received.
|
||||
*/
|
||||
dma_unmap_single(priv->dev, map, size, DMA_FROM_DEVICE);
|
||||
#else
|
||||
dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
|
||||
#endif
|
||||
|
||||
|
||||
/* Resplenish rx ring */
|
||||
ftgmac100_alloc_rx_buf(priv, pointer, rxdes, GFP_ATOMIC);
|
||||
priv->rx_pointer = ftgmac100_next_rx_pointer(pointer);
|
||||
|
||||
skb->protocol = eth_type_trans(skb, netdev);
|
||||
|
||||
netdev->stats.rx_packets++;
|
||||
netdev->stats.rx_bytes += skb->len;
|
||||
netdev->stats.rx_bytes += size;
|
||||
|
||||
/* push packet to protocol stack */
|
||||
napi_gro_receive(&priv->napi, skb);
|
||||
if (skb->ip_summed == CHECKSUM_NONE)
|
||||
netif_receive_skb(skb);
|
||||
else
|
||||
napi_gro_receive(&priv->napi, skb);
|
||||
|
||||
(*processed)++;
|
||||
return true;
|
||||
|
||||
drop:
|
||||
/* Clean rxdes0 (which resets own bit) */
|
||||
rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask);
|
||||
priv->rx_pointer = ftgmac100_next_rx_pointer(pointer);
|
||||
netdev->stats.rx_dropped++;
|
||||
return true;
|
||||
}
|
||||
|
||||
static void ftgmac100_txdes_reset(const struct ftgmac100 *priv,
|
||||
|
|
@ -793,34 +675,6 @@ static int ftgmac100_xmit(struct ftgmac100 *priv, struct sk_buff *skb,
|
|||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
static int ftgmac100_alloc_rx_page(struct ftgmac100 *priv,
|
||||
struct ftgmac100_rxdes *rxdes, gfp_t gfp)
|
||||
{
|
||||
struct net_device *netdev = priv->netdev;
|
||||
struct page *page;
|
||||
dma_addr_t map;
|
||||
|
||||
page = alloc_page(gfp);
|
||||
if (!page) {
|
||||
if (net_ratelimit())
|
||||
netdev_err(netdev, "failed to allocate rx page\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
|
||||
if (unlikely(dma_mapping_error(priv->dev, map))) {
|
||||
if (net_ratelimit())
|
||||
netdev_err(netdev, "failed to map rx page\n");
|
||||
__free_page(page);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
ftgmac100_rxdes_set_page(priv, rxdes, page);
|
||||
ftgmac100_rxdes_set_dma_addr(rxdes, map);
|
||||
ftgmac100_rxdes_set_dma_own(priv, rxdes);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ftgmac100_free_buffers(struct ftgmac100 *priv)
|
||||
{
|
||||
int i;
|
||||
|
|
@ -828,14 +682,15 @@ static void ftgmac100_free_buffers(struct ftgmac100 *priv)
|
|||
/* Free all RX buffers */
|
||||
for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
|
||||
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
|
||||
struct page *page = ftgmac100_rxdes_get_page(priv, rxdes);
|
||||
dma_addr_t map = ftgmac100_rxdes_get_dma_addr(rxdes);
|
||||
struct sk_buff *skb = priv->rx_skbs[i];
|
||||
dma_addr_t map = le32_to_cpu(rxdes->rxdes3);
|
||||
|
||||
if (!page)
|
||||
if (!skb)
|
||||
continue;
|
||||
|
||||
dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
|
||||
__free_page(page);
|
||||
priv->rx_skbs[i] = NULL;
|
||||
dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
|
||||
/* Free all TX buffers */
|
||||
|
|
@ -858,6 +713,11 @@ static void ftgmac100_free_rings(struct ftgmac100 *priv)
|
|||
if (priv->descs)
|
||||
dma_free_coherent(priv->dev, sizeof(struct ftgmac100_descs),
|
||||
priv->descs, priv->descs_dma_addr);
|
||||
|
||||
/* Free scratch packet buffer */
|
||||
if (priv->rx_scratch)
|
||||
dma_free_coherent(priv->dev, RX_BUF_SIZE,
|
||||
priv->rx_scratch, priv->rx_scratch_dma);
|
||||
}
|
||||
|
||||
static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
|
||||
|
|
@ -869,17 +729,30 @@ static int ftgmac100_alloc_rings(struct ftgmac100 *priv)
|
|||
if (!priv->descs)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Allocate scratch packet buffer */
|
||||
priv->rx_scratch = dma_alloc_coherent(priv->dev,
|
||||
RX_BUF_SIZE,
|
||||
&priv->rx_scratch_dma,
|
||||
GFP_KERNEL);
|
||||
if (!priv->rx_scratch)
|
||||
return -ENOMEM;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ftgmac100_init_rings(struct ftgmac100 *priv)
|
||||
{
|
||||
struct ftgmac100_rxdes *rxdes;
|
||||
int i;
|
||||
|
||||
/* Initialize RX ring */
|
||||
for (i = 0; i < RX_QUEUE_ENTRIES; i++)
|
||||
priv->descs->rxdes[i].rxdes0 = 0;
|
||||
ftgmac100_rxdes_set_end_of_ring(priv, &priv->descs->rxdes[i - 1]);
|
||||
for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
|
||||
rxdes = &priv->descs->rxdes[i];
|
||||
rxdes->rxdes0 = 0;
|
||||
rxdes->rxdes3 = cpu_to_le32(priv->rx_scratch_dma);
|
||||
}
|
||||
/* Mark the end of the ring */
|
||||
rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask);
|
||||
|
||||
/* Initialize TX ring */
|
||||
for (i = 0; i < TX_QUEUE_ENTRIES; i++)
|
||||
|
|
@ -894,7 +767,7 @@ static int ftgmac100_alloc_rx_buffers(struct ftgmac100 *priv)
|
|||
for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
|
||||
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[i];
|
||||
|
||||
if (ftgmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
|
||||
if (ftgmac100_alloc_rx_buf(priv, i, rxdes, GFP_KERNEL))
|
||||
return -ENOMEM;
|
||||
}
|
||||
return 0;
|
||||
|
|
@ -1095,6 +968,14 @@ static irqreturn_t ftgmac100_interrupt(int irq, void *dev_id)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static bool ftgmac100_check_rx(struct ftgmac100 *priv)
|
||||
{
|
||||
struct ftgmac100_rxdes *rxdes = &priv->descs->rxdes[priv->rx_pointer];
|
||||
|
||||
/* Do we have a packet ? */
|
||||
return !!(rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY));
|
||||
}
|
||||
|
||||
static int ftgmac100_poll(struct napi_struct *napi, int budget)
|
||||
{
|
||||
struct ftgmac100 *priv = container_of(napi, struct ftgmac100, napi);
|
||||
|
|
@ -1134,8 +1015,7 @@ static int ftgmac100_poll(struct napi_struct *napi, int budget)
|
|||
*/
|
||||
iowrite32(FTGMAC100_INT_RXTX,
|
||||
priv->base + FTGMAC100_OFFSET_ISR);
|
||||
if (ftgmac100_rxdes_packet_ready
|
||||
(ftgmac100_current_rxdes(priv)) || priv->tx_pending)
|
||||
if (ftgmac100_check_rx(priv) || priv->tx_pending)
|
||||
return budget;
|
||||
|
||||
/* deschedule NAPI */
|
||||
|
|
@ -1545,7 +1425,7 @@ static int ftgmac100_probe(struct platform_device *pdev)
|
|||
* when NCSI is enabled on the interface. It doesn't work
|
||||
* in that case.
|
||||
*/
|
||||
netdev->features = NETIF_F_IP_CSUM | NETIF_F_GRO;
|
||||
netdev->features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_GRO;
|
||||
if (priv->use_ncsi &&
|
||||
of_get_property(pdev->dev.of_node, "no-hw-checksum", NULL))
|
||||
netdev->features &= ~NETIF_F_IP_CSUM;
|
||||
|
|
|
|||
|
|
@ -227,10 +227,10 @@ struct ftgmac100_txdes {
|
|||
* Receive descriptor, aligned to 16 bytes
|
||||
*/
|
||||
struct ftgmac100_rxdes {
|
||||
unsigned int rxdes0;
|
||||
unsigned int rxdes1;
|
||||
unsigned int rxdes2; /* not used by HW */
|
||||
unsigned int rxdes3; /* RXBUF_BADR */
|
||||
__le32 rxdes0; /* Control & status bits */
|
||||
__le32 rxdes1; /* Checksum and vlan status */
|
||||
__le32 rxdes2; /* length/type on AST2500 */
|
||||
__le32 rxdes3; /* DMA buffer address */
|
||||
} __attribute__ ((aligned(16)));
|
||||
|
||||
#define FTGMAC100_RXDES0_VDBC 0x3fff
|
||||
|
|
@ -248,6 +248,14 @@ struct ftgmac100_rxdes {
|
|||
#define FTGMAC100_RXDES0_FRS (1 << 29)
|
||||
#define FTGMAC100_RXDES0_RXPKT_RDY (1 << 31)
|
||||
|
||||
/* Errors we care about for dropping packets */
|
||||
#define RXDES0_ANY_ERROR ( \
|
||||
FTGMAC100_RXDES0_RX_ERR | \
|
||||
FTGMAC100_RXDES0_CRC_ERR | \
|
||||
FTGMAC100_RXDES0_FTL | \
|
||||
FTGMAC100_RXDES0_RUNT | \
|
||||
FTGMAC100_RXDES0_RX_ODD_NB)
|
||||
|
||||
#define FTGMAC100_RXDES1_VLANTAG_CI 0xffff
|
||||
#define FTGMAC100_RXDES1_PROT_MASK (0x3 << 20)
|
||||
#define FTGMAC100_RXDES1_PROT_NONIP (0x0 << 20)
|
||||
|
|
|
|||
Loading…
Reference in New Issue