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arm64: dts: imx8mq/mm/mn: add the enet wakeup support 

Add the wakeup irq property as the system wakeup source.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Fugang Duan 2019-09-10 16:22:59 +08:00 committed by Dong Aisheng
parent b68f3e40bc
commit dcc51204a9
3 changed files with 8 additions and 2 deletions
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4
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View File

@ -984,7 +984,7 @@
};
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mm-fec", "fsl,imx6sx-fec";
compatible = "fsl,imx8mm-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
@ -1009,6 +1009,8 @@
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
nvmem_macaddr_swap;
stop-mode = <&gpr 0x10 3>;
fsl,wakeup_irq = <2>;
status = "disabled";
};

4
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@ -673,7 +673,7 @@
};
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mn-fec", "fsl,imx6sx-fec";
compatible = "fsl,imx8mn-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
@ -695,6 +695,8 @@
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
stop-mode = <&gpr 0x10 3>;
fsl,wakeup_irq = <2>;
status = "disabled";
};

2
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@ -1155,6 +1155,8 @@
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
nvmem_macaddr_swap;
stop-mode = <&iomuxc_gpr 0x10 3>;
fsl,wakeup_irq = <2>;
status = "disabled";
};
};