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powerpc/mpc85xx: invalidate TLB after hibernation resume

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This problem belongs to the core synchronization issues.
The cpu1 already updated spin_table values, but bootcore cannot get
this value in time.

After bootcpu hibiernation restore the pages. we are now running
with the kernel data of the old kernel fully restored. if we reset
the non-bootcpus that will be reset cache(tlb), the non-bootcpus
will get new address(map virtual and physical address spaces).
but bootcpu tlb cache still use boot kernel data, so we need to
invalidate the bootcpu tlb cache make it to get new main memory data.

log:
Enabling non-boot CPUs ...
smp_85xx_kick_cpu: timeout waiting for core 1 to reset
smp: failed starting cpu 1 (rc -2)
Error taking CPU1 up: -2

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-by: Anton Vorontsov <anton@enomsg.org>
[scottwood@freescale.com: reworded code comment for clarity]
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Dongsheng Wang 2013-05-14 16:05:56 +08:00 committed by Scott Wood
parent f8dc6eb757
commit e00c9a0c2e
1 changed files with 8 additions and 0 deletions
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8
arch/powerpc/kernel/swsusp_booke.S
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@ -141,6 +141,14 @@ _GLOBAL(swsusp_arch_resume)
lis r11,swsusp_save_area@h
ori r11,r11,swsusp_save_area@l
/*
* Mappings from virtual addresses to physical addresses may be
* different than they were prior to restoring hibernation state.
* Invalidate the TLB so that the boot CPU is using the new
* mappings.
*/
bl _tlbil_all
lwz r4,SL_SPRG0(r11)
mtsprg 0,r4
lwz r4,SL_SPRG1(r11)