ARM: dts: Configure interconnect target module for dra7 sham
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" peroperty to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Similar to am3, I could not find any documentation for the sysc register on this one, but it seems to work just fine based on "ti,sysc-omap3-sham" compatible style configuration. Cc: Keerthy <j-keerthy@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -685,16 +685,36 @@
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clock-names = "fck";
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clock-names = "fck";
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};
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};
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sham: sham@53100000 {
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sham_target: target-module@4b101000 {
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compatible = "ti,omap5-sham";
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compatible = "ti,sysc-omap3-sham", "ti,sysc";
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ti,hwmods = "sham";
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ti,hwmods = "sham";
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reg = <0x4b101000 0x300>;
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reg = <0x4b101100 0x4>,
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<0x4b101110 0x4>,
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<0x4b101114 0x4>;
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reg-names = "rev", "sysc", "syss";
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ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
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SYSC_OMAP2_AUTOIDLE)>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,syss-mask = <1>;
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/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
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clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x4b101000 0x1000>;
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sham: sham@0 {
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compatible = "ti,omap5-sham";
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reg = <0 0x300>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&edma_xbar 119 0>;
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dmas = <&edma_xbar 119 0>;
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dma-names = "rx";
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dma-names = "rx";
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clocks = <&l3_iclk_div>;
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clocks = <&l3_iclk_div>;
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clock-names = "fck";
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clock-names = "fck";
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};
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};
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};
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opp_supply_mpu: opp-supply@4a003b20 {
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opp_supply_mpu: opp-supply@4a003b20 {
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compatible = "ti,omap5-opp-supply";
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compatible = "ti,omap5-opp-supply";
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