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r6040: use definitions for MAC_SM register read/writes

Bit 1 is the reset bit of the MAC status machine register, define and
use it.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
hifive-unleashed-5.1
Florian Fainelli 2012-01-04 08:59:36 +00:00 committed by David S. Miller
parent 58dbc691e6
commit e147763796
1 changed files with 3 additions and 2 deletions

View File

@ -126,6 +126,7 @@
#define PHY_CC 0x88 /* PHY status change configuration register */
#define PHY_ST 0x8A /* PHY status register */
#define MAC_SM 0xAC /* MAC status machine */
#define MAC_SM_RST 0x0002 /* MAC status machine reset */
#define MAC_ID 0xBE /* Identifier register */
#define TX_DCNT 0x80 /* TX descriptor count */
@ -375,7 +376,7 @@ static void r6040_init_mac_regs(struct net_device *dev)
break;
}
/* Reset internal state machine */
iowrite16(2, ioaddr + MAC_SM);
iowrite16(MAC_SM_RST, ioaddr + MAC_SM);
iowrite16(0, ioaddr + MAC_SM);
mdelay(5);
@ -736,7 +737,7 @@ static void r6040_mac_address(struct net_device *dev)
/* MAC operation register */
iowrite16(MAC_RST, ioaddr + MCR1); /* Reset MAC */
iowrite16(2, ioaddr + MAC_SM); /* Reset internal state machine */
iowrite16(MAC_SM_RST, ioaddr + MAC_SM); /* Reset internal state machine */
iowrite16(0, ioaddr + MAC_SM);
mdelay(5);