Merge branch 'for-next/cpu-init' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
* 'for-next/cpu-init' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: ARM64: kernel: unify ACPI and DT cpus initialization ARM64: kernel: make cpu_ops hooks DT agnostic
This commit is contained in:
Catalin Marinas
commit
e1d2c88639
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@ -93,4 +93,8 @@ static inline bool acpi_psci_use_hvc(void) { return false; }
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static inline void acpi_init_cpus(void) { }
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#endif /* CONFIG_ACPI */
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static inline const char *acpi_get_enable_method(int cpu)
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{
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return acpi_psci_present() ? "psci" : NULL;
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}
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#endif /*_ASM_ACPI_H*/
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@ -19,15 +19,15 @@
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#include <linux/init.h>
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#include <linux/threads.h>
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struct device_node;
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/**
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* struct cpu_operations - Callback operations for hotplugging CPUs.
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*
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* @name: Name of the property as appears in a devicetree cpu node's
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* enable-method property.
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* @cpu_init: Reads any data necessary for a specific enable-method from the
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* devicetree, for a given cpu node and proposed logical id.
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* enable-method property. On systems booting with ACPI, @name
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* identifies the struct cpu_operations entry corresponding to
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* the boot protocol specified in the ACPI MADT table.
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* @cpu_init: Reads any data necessary for a specific enable-method for a
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* proposed logical id.
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* @cpu_prepare: Early one-time preparation step for a cpu. If there is a
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* mechanism for doing so, tests whether it is possible to boot
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* the given CPU.
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@ -40,15 +40,15 @@ struct device_node;
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* @cpu_die: Makes a cpu leave the kernel. Must not fail. Called from the
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* cpu being killed.
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* @cpu_kill: Ensures a cpu has left the kernel. Called from another cpu.
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* @cpu_init_idle: Reads any data necessary to initialize CPU idle states from
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* devicetree, for a given cpu node and proposed logical id.
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* @cpu_init_idle: Reads any data necessary to initialize CPU idle states for
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* a proposed logical id.
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* @cpu_suspend: Suspends a cpu and saves the required context. May fail owing
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* to wrong parameters or error conditions. Called from the
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* CPU being suspended. Must be called with IRQs disabled.
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*/
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struct cpu_operations {
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const char *name;
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int (*cpu_init)(struct device_node *, unsigned int);
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int (*cpu_init)(unsigned int);
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int (*cpu_prepare)(unsigned int);
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int (*cpu_boot)(unsigned int);
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void (*cpu_postboot)(void);
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@ -58,14 +58,17 @@ struct cpu_operations {
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int (*cpu_kill)(unsigned int cpu);
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#endif
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#ifdef CONFIG_CPU_IDLE
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int (*cpu_init_idle)(struct device_node *, unsigned int);
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int (*cpu_init_idle)(unsigned int);
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int (*cpu_suspend)(unsigned long);
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#endif
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};
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extern const struct cpu_operations *cpu_ops[NR_CPUS];
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int __init cpu_read_ops(struct device_node *dn, int cpu);
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void __init cpu_read_bootcpu_ops(void);
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const struct cpu_operations *cpu_get_ops(const char *name);
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int __init cpu_read_ops(int cpu);
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static inline void __init cpu_read_bootcpu_ops(void)
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{
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cpu_read_ops(0);
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}
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#endif /* ifndef __ASM_CPU_OPS_H */
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@ -42,7 +42,7 @@ extern void handle_IPI(int ipinr, struct pt_regs *regs);
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* Discover the set of possible CPUs and determine their
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* SMP operations.
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*/
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extern void of_smp_init_cpus(void);
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extern void smp_init_cpus(void);
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/*
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* Provide a function to raise an IPI cross call on CPUs in callmap.
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@ -36,12 +36,6 @@ EXPORT_SYMBOL(acpi_disabled);
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int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */
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EXPORT_SYMBOL(acpi_pci_disabled);
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/* Processors with enabled flag and sane MPIDR */
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static int enabled_cpus;
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/* Boot CPU is valid or not in MADT */
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static bool bootcpu_valid __initdata;
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static bool param_acpi_off __initdata;
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static bool param_acpi_force __initdata;
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@ -95,124 +89,6 @@ void __init __acpi_unmap_table(char *map, unsigned long size)
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early_memunmap(map, size);
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}
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/**
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* acpi_map_gic_cpu_interface - generates a logical cpu number
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* and map to MPIDR represented by GICC structure
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*/
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static void __init
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acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
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{
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int i;
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u64 mpidr = processor->arm_mpidr & MPIDR_HWID_BITMASK;
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bool enabled = !!(processor->flags & ACPI_MADT_ENABLED);
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if (mpidr == INVALID_HWID) {
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pr_info("Skip MADT cpu entry with invalid MPIDR\n");
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return;
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}
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total_cpus++;
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if (!enabled)
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return;
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if (enabled_cpus >= NR_CPUS) {
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pr_warn("NR_CPUS limit of %d reached, Processor %d/0x%llx ignored.\n",
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NR_CPUS, total_cpus, mpidr);
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return;
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}
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/* Check if GICC structure of boot CPU is available in the MADT */
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if (cpu_logical_map(0) == mpidr) {
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if (bootcpu_valid) {
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pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",
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mpidr);
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return;
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}
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bootcpu_valid = true;
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}
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/*
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* Duplicate MPIDRs are a recipe for disaster. Scan
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* all initialized entries and check for
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* duplicates. If any is found just ignore the CPU.
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*/
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for (i = 1; i < enabled_cpus; i++) {
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if (cpu_logical_map(i) == mpidr) {
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pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",
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mpidr);
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return;
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}
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}
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if (!acpi_psci_present())
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return;
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cpu_ops[enabled_cpus] = cpu_get_ops("psci");
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/* CPU 0 was already initialized */
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if (enabled_cpus) {
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if (!cpu_ops[enabled_cpus])
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return;
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if (cpu_ops[enabled_cpus]->cpu_init(NULL, enabled_cpus))
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return;
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/* map the logical cpu id to cpu MPIDR */
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cpu_logical_map(enabled_cpus) = mpidr;
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}
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enabled_cpus++;
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}
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static int __init
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acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
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const unsigned long end)
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{
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struct acpi_madt_generic_interrupt *processor;
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processor = (struct acpi_madt_generic_interrupt *)header;
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if (BAD_MADT_ENTRY(processor, end))
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return -EINVAL;
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acpi_table_print_madt_entry(header);
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acpi_map_gic_cpu_interface(processor);
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return 0;
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}
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/* Parse GIC cpu interface entries in MADT for SMP init */
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void __init acpi_init_cpus(void)
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{
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int count, i;
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/*
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* do a partial walk of MADT to determine how many CPUs
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* we have including disabled CPUs, and get information
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* we need for SMP init
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*/
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count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
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acpi_parse_gic_cpu_interface, 0);
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if (!count) {
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pr_err("No GIC CPU interface entries present\n");
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return;
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} else if (count < 0) {
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pr_err("Error parsing GIC CPU interface entry\n");
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return;
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}
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if (!bootcpu_valid) {
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pr_err("MADT missing boot CPU MPIDR, not enabling secondaries\n");
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return;
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}
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for (i = 0; i < enabled_cpus; i++)
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set_cpu_possible(i, true);
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/* Make boot-up look pretty */
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pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
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}
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/*
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* acpi_fadt_sanity_check() - Check FADT presence and carry out sanity
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* checks on it
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@ -16,11 +16,13 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <asm/cpu_ops.h>
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#include <asm/smp_plat.h>
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#include <linux/acpi.h>
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#include <linux/errno.h>
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#include <linux/of.h>
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#include <linux/string.h>
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#include <asm/acpi.h>
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#include <asm/cpu_ops.h>
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#include <asm/smp_plat.h>
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extern const struct cpu_operations smp_spin_table_ops;
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extern const struct cpu_operations cpu_psci_ops;
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@ -35,7 +37,7 @@ static const struct cpu_operations *supported_cpu_ops[] __initconst = {
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NULL,
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};
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const struct cpu_operations * __init cpu_get_ops(const char *name)
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static const struct cpu_operations * __init cpu_get_ops(const char *name)
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{
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const struct cpu_operations **ops = supported_cpu_ops;
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@ -49,39 +51,53 @@ const struct cpu_operations * __init cpu_get_ops(const char *name)
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return NULL;
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}
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/*
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* Read a cpu's enable method from the device tree and record it in cpu_ops.
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*/
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int __init cpu_read_ops(struct device_node *dn, int cpu)
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static const char *__init cpu_read_enable_method(int cpu)
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{
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const char *enable_method = of_get_property(dn, "enable-method", NULL);
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if (!enable_method) {
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/*
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* The boot CPU may not have an enable method (e.g. when
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* spin-table is used for secondaries). Don't warn spuriously.
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*/
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if (cpu != 0)
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pr_err("%s: missing enable-method property\n",
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dn->full_name);
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return -ENOENT;
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const char *enable_method;
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if (acpi_disabled) {
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struct device_node *dn = of_get_cpu_node(cpu, NULL);
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if (!dn) {
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if (!cpu)
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pr_err("Failed to find device node for boot cpu\n");
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return NULL;
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}
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enable_method = of_get_property(dn, "enable-method", NULL);
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if (!enable_method) {
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/*
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* The boot CPU may not have an enable method (e.g.
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* when spin-table is used for secondaries).
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* Don't warn spuriously.
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*/
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if (cpu != 0)
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pr_err("%s: missing enable-method property\n",
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dn->full_name);
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}
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} else {
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enable_method = acpi_get_enable_method(cpu);
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if (!enable_method)
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pr_err("Unsupported ACPI enable-method\n");
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}
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return enable_method;
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}
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/*
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* Read a cpu's enable method and record it in cpu_ops.
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*/
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int __init cpu_read_ops(int cpu)
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{
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const char *enable_method = cpu_read_enable_method(cpu);
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if (!enable_method)
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return -ENODEV;
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cpu_ops[cpu] = cpu_get_ops(enable_method);
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if (!cpu_ops[cpu]) {
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pr_warn("%s: unsupported enable-method property: %s\n",
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dn->full_name, enable_method);
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pr_warn("Unsupported enable-method: %s\n", enable_method);
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return -EOPNOTSUPP;
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}
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return 0;
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}
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void __init cpu_read_bootcpu_ops(void)
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{
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struct device_node *dn = of_get_cpu_node(0, NULL);
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if (!dn) {
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pr_err("Failed to find device node for boot cpu\n");
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return;
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}
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cpu_read_ops(dn, 0);
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}
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@ -18,15 +18,10 @@
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int arm_cpuidle_init(unsigned int cpu)
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{
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int ret = -EOPNOTSUPP;
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struct device_node *cpu_node = of_cpu_device_node_get(cpu);
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if (!cpu_node)
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return -ENODEV;
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if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_init_idle)
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ret = cpu_ops[cpu]->cpu_init_idle(cpu_node, cpu);
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ret = cpu_ops[cpu]->cpu_init_idle(cpu);
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of_node_put(cpu_node);
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return ret;
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}
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|
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@ -186,12 +186,15 @@ static int psci_migrate_info_type(void)
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return err;
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}
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static int __maybe_unused cpu_psci_cpu_init_idle(struct device_node *cpu_node,
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unsigned int cpu)
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static int __maybe_unused cpu_psci_cpu_init_idle(unsigned int cpu)
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{
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int i, ret, count = 0;
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struct psci_power_state *psci_states;
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struct device_node *state_node;
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struct device_node *state_node, *cpu_node;
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cpu_node = of_get_cpu_node(cpu, NULL);
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if (!cpu_node)
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return -ENODEV;
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/*
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* If the PSCI cpu_suspend function hook has not been initialized
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@ -444,7 +447,7 @@ int __init psci_acpi_init(void)
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#ifdef CONFIG_SMP
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static int __init cpu_psci_cpu_init(struct device_node *dn, unsigned int cpu)
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static int __init cpu_psci_cpu_init(unsigned int cpu)
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{
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return 0;
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}
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|
|
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|
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@ -408,16 +408,13 @@ void __init setup_arch(char **cmdline_p)
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if (acpi_disabled) {
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unflatten_device_tree();
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psci_dt_init();
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cpu_read_bootcpu_ops();
|
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#ifdef CONFIG_SMP
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of_smp_init_cpus();
|
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#endif
|
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} else {
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psci_acpi_init();
|
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acpi_init_cpus();
|
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}
|
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|
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cpu_read_bootcpu_ops();
|
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#ifdef CONFIG_SMP
|
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smp_init_cpus();
|
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smp_build_mpidr_hash();
|
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#endif
|
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|
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|
|
|
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|
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@ -17,6 +17,7 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
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*/
|
||||
|
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#include <linux/acpi.h>
|
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#include <linux/delay.h>
|
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#include <linux/init.h>
|
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#include <linux/spinlock.h>
|
||||
|
|
@ -318,56 +319,157 @@ void __init smp_prepare_boot_cpu(void)
|
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
|
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}
|
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|
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static u64 __init of_get_cpu_mpidr(struct device_node *dn)
|
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{
|
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const __be32 *cell;
|
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u64 hwid;
|
||||
|
||||
/*
|
||||
* A cpu node with missing "reg" property is
|
||||
* considered invalid to build a cpu_logical_map
|
||||
* entry.
|
||||
*/
|
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cell = of_get_property(dn, "reg", NULL);
|
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if (!cell) {
|
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pr_err("%s: missing reg property\n", dn->full_name);
|
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return INVALID_HWID;
|
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}
|
||||
|
||||
hwid = of_read_number(cell, of_n_addr_cells(dn));
|
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/*
|
||||
* Non affinity bits must be set to 0 in the DT
|
||||
*/
|
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if (hwid & ~MPIDR_HWID_BITMASK) {
|
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pr_err("%s: invalid reg property\n", dn->full_name);
|
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return INVALID_HWID;
|
||||
}
|
||||
return hwid;
|
||||
}
|
||||
|
||||
/*
|
||||
* Duplicate MPIDRs are a recipe for disaster. Scan all initialized
|
||||
* entries and check for duplicates. If any is found just ignore the
|
||||
* cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
|
||||
* matching valid MPIDR values.
|
||||
*/
|
||||
static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
|
||||
if (cpu_logical_map(i) == hwid)
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize cpu operations for a logical cpu and
|
||||
* set it in the possible mask on success
|
||||
*/
|
||||
static int __init smp_cpu_setup(int cpu)
|
||||
{
|
||||
if (cpu_read_ops(cpu))
|
||||
return -ENODEV;
|
||||
|
||||
if (cpu_ops[cpu]->cpu_init(cpu))
|
||||
return -ENODEV;
|
||||
|
||||
set_cpu_possible(cpu, true);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static bool bootcpu_valid __initdata;
|
||||
static unsigned int cpu_count = 1;
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
/*
|
||||
* acpi_map_gic_cpu_interface - parse processor MADT entry
|
||||
*
|
||||
* Carry out sanity checks on MADT processor entry and initialize
|
||||
* cpu_logical_map on success
|
||||
*/
|
||||
static void __init
|
||||
acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
|
||||
{
|
||||
u64 hwid = processor->arm_mpidr;
|
||||
|
||||
if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
|
||||
pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!(processor->flags & ACPI_MADT_ENABLED)) {
|
||||
pr_err("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
|
||||
return;
|
||||
}
|
||||
|
||||
if (is_mpidr_duplicate(cpu_count, hwid)) {
|
||||
pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Check if GICC structure of boot CPU is available in the MADT */
|
||||
if (cpu_logical_map(0) == hwid) {
|
||||
if (bootcpu_valid) {
|
||||
pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
|
||||
hwid);
|
||||
return;
|
||||
}
|
||||
bootcpu_valid = true;
|
||||
return;
|
||||
}
|
||||
|
||||
if (cpu_count >= NR_CPUS)
|
||||
return;
|
||||
|
||||
/* map the logical cpu id to cpu MPIDR */
|
||||
cpu_logical_map(cpu_count) = hwid;
|
||||
|
||||
cpu_count++;
|
||||
}
|
||||
|
||||
static int __init
|
||||
acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
|
||||
const unsigned long end)
|
||||
{
|
||||
struct acpi_madt_generic_interrupt *processor;
|
||||
|
||||
processor = (struct acpi_madt_generic_interrupt *)header;
|
||||
if (BAD_MADT_ENTRY(processor, end))
|
||||
return -EINVAL;
|
||||
|
||||
acpi_table_print_madt_entry(header);
|
||||
|
||||
acpi_map_gic_cpu_interface(processor);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define acpi_table_parse_madt(...) do { } while (0)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Enumerate the possible CPU set from the device tree and build the
|
||||
* cpu logical map array containing MPIDR values related to logical
|
||||
* cpus. Assumes that cpu_logical_map(0) has already been initialized.
|
||||
*/
|
||||
void __init of_smp_init_cpus(void)
|
||||
void __init of_parse_and_init_cpus(void)
|
||||
{
|
||||
struct device_node *dn = NULL;
|
||||
unsigned int i, cpu = 1;
|
||||
bool bootcpu_valid = false;
|
||||
|
||||
while ((dn = of_find_node_by_type(dn, "cpu"))) {
|
||||
const u32 *cell;
|
||||
u64 hwid;
|
||||
u64 hwid = of_get_cpu_mpidr(dn);
|
||||
|
||||
/*
|
||||
* A cpu node with missing "reg" property is
|
||||
* considered invalid to build a cpu_logical_map
|
||||
* entry.
|
||||
*/
|
||||
cell = of_get_property(dn, "reg", NULL);
|
||||
if (!cell) {
|
||||
pr_err("%s: missing reg property\n", dn->full_name);
|
||||
if (hwid == INVALID_HWID)
|
||||
goto next;
|
||||
}
|
||||
hwid = of_read_number(cell, of_n_addr_cells(dn));
|
||||
|
||||
/*
|
||||
* Non affinity bits must be set to 0 in the DT
|
||||
*/
|
||||
if (hwid & ~MPIDR_HWID_BITMASK) {
|
||||
pr_err("%s: invalid reg property\n", dn->full_name);
|
||||
if (is_mpidr_duplicate(cpu_count, hwid)) {
|
||||
pr_err("%s: duplicate cpu reg properties in the DT\n",
|
||||
dn->full_name);
|
||||
goto next;
|
||||
}
|
||||
|
||||
/*
|
||||
* Duplicate MPIDRs are a recipe for disaster. Scan
|
||||
* all initialized entries and check for
|
||||
* duplicates. If any is found just ignore the cpu.
|
||||
* cpu_logical_map was initialized to INVALID_HWID to
|
||||
* avoid matching valid MPIDR values.
|
||||
*/
|
||||
for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
|
||||
if (cpu_logical_map(i) == hwid) {
|
||||
pr_err("%s: duplicate cpu reg properties in the DT\n",
|
||||
dn->full_name);
|
||||
goto next;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* The numbering scheme requires that the boot CPU
|
||||
* must be assigned logical id 0. Record it so that
|
||||
|
|
@ -392,38 +494,58 @@ void __init of_smp_init_cpus(void)
|
|||
continue;
|
||||
}
|
||||
|
||||
if (cpu >= NR_CPUS)
|
||||
goto next;
|
||||
|
||||
if (cpu_read_ops(dn, cpu) != 0)
|
||||
goto next;
|
||||
|
||||
if (cpu_ops[cpu]->cpu_init(dn, cpu))
|
||||
if (cpu_count >= NR_CPUS)
|
||||
goto next;
|
||||
|
||||
pr_debug("cpu logical map 0x%llx\n", hwid);
|
||||
cpu_logical_map(cpu) = hwid;
|
||||
cpu_logical_map(cpu_count) = hwid;
|
||||
next:
|
||||
cpu++;
|
||||
cpu_count++;
|
||||
}
|
||||
}
|
||||
|
||||
/* sanity check */
|
||||
if (cpu > NR_CPUS)
|
||||
pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
|
||||
cpu, NR_CPUS);
|
||||
/*
|
||||
* Enumerate the possible CPU set from the device tree or ACPI and build the
|
||||
* cpu logical map array containing MPIDR values related to logical
|
||||
* cpus. Assumes that cpu_logical_map(0) has already been initialized.
|
||||
*/
|
||||
void __init smp_init_cpus(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (acpi_disabled)
|
||||
of_parse_and_init_cpus();
|
||||
else
|
||||
/*
|
||||
* do a walk of MADT to determine how many CPUs
|
||||
* we have including disabled CPUs, and get information
|
||||
* we need for SMP init
|
||||
*/
|
||||
acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
|
||||
acpi_parse_gic_cpu_interface, 0);
|
||||
|
||||
if (cpu_count > NR_CPUS)
|
||||
pr_warn("no. of cores (%d) greater than configured maximum of %d - clipping\n",
|
||||
cpu_count, NR_CPUS);
|
||||
|
||||
if (!bootcpu_valid) {
|
||||
pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
|
||||
pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* All the cpus that made it to the cpu_logical_map have been
|
||||
* validated so set them as possible cpus.
|
||||
* We need to set the cpu_logical_map entries before enabling
|
||||
* the cpus so that cpu processor description entries (DT cpu nodes
|
||||
* and ACPI MADT entries) can be retrieved by matching the cpu hwid
|
||||
* with entries in cpu_logical_map while initializing the cpus.
|
||||
* If the cpu set-up fails, invalidate the cpu_logical_map entry.
|
||||
*/
|
||||
for (i = 0; i < NR_CPUS; i++)
|
||||
if (cpu_logical_map(i) != INVALID_HWID)
|
||||
set_cpu_possible(i, true);
|
||||
for (i = 1; i < NR_CPUS; i++) {
|
||||
if (cpu_logical_map(i) != INVALID_HWID) {
|
||||
if (smp_cpu_setup(i))
|
||||
cpu_logical_map(i) = INVALID_HWID;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void __init smp_prepare_cpus(unsigned int max_cpus)
|
||||
|
|
|
|||
|
|
@ -49,8 +49,14 @@ static void write_pen_release(u64 val)
|
|||
}
|
||||
|
||||
|
||||
static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
|
||||
static int smp_spin_table_cpu_init(unsigned int cpu)
|
||||
{
|
||||
struct device_node *dn;
|
||||
|
||||
dn = of_get_cpu_node(cpu, NULL);
|
||||
if (!dn)
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* Determine the address from which the CPU is polling.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in a new issue