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clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume 

Save and restore top PLL related configuration registers for big (APLL)
and LITTLE (KPLL) cores during suspend/resume cycle. So far, CPU clocks
were reset to default values after suspend/resume cycle and performance
after system resume was affected when performance governor has been selected.

Fixes: 773424326b ("clk: samsung: exynos5420: add more registers to restore list")
Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
alistair/sunxi64-5.5-dsi
Marian Mihailescu 2019-10-29 11:20:25 +10:30 committed by Sylwester Nawrocki
parent b92981de92
commit e21be0d1d7
1 changed files with 2 additions and 0 deletions
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drivers/clk/samsung/clk-exynos5420.c
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@ -165,6 +165,8 @@ static const unsigned long exynos5x_clk_regs[] __initconst = {
GATE_BUS_CPU,
GATE_SCLK_CPU,
CLKOUT_CMU_CPU,
APLL_CON0,
KPLL_CON0,
CPLL_CON0,
DPLL_CON0,
EPLL_CON0,