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drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl

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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2015-02-09 19:33:21 +00:00 committed by Daniel Vetter
parent 2caa3b260a
commit e2db7071f1
2 changed files with 5 additions and 0 deletions
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1
drivers/gpu/drm/i915/i915_reg.h
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@ -6209,6 +6209,7 @@ enum skl_disp_power_wells {
#define GEN9_HALF_SLICE_CHICKEN5 0xe188
#define GEN9_DG_MIRROR_FIX_ENABLE (1<<5)
#define GEN9_CCS_TLB_PREFETCH_ENABLE (1<<3)
#define GEN8_ROW_CHICKEN 0xe4f0
#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)

4
drivers/gpu/drm/i915/intel_ringbuffer.c
View file

@ -984,6 +984,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
/* WaDisablePartialResolveInVc:skl */
WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE);
/* WaCcsTlbPrefetchDisable:skl */
WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,
GEN9_CCS_TLB_PREFETCH_ENABLE);
return 0;
}