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[ARM] 3546/1: PATCH: subtle lost interrupts bug on i.MX 

Patch from Matt Reimer

There is a subtle bug in the GPIO interrupt status register
handling in arch/arm/mach-imx/irq.c:imx_gpio_ack_irq(). The
documentation states that a 1 should be written to the relevant bit to
acknowledge a GPIO interrupt, but that is not what the code does.

The problem is that the |= writes back 1s for all the *other*
interrupts represented in the register, so interrupts could get lost.
For example, if interrupts are pending for GPIO B10 and B12, ISR_B
would have the value 0x00001400. Then when the interrupt code handles
GPIO B10, it eventually calls imx_gpio_ack_irq(IRQ_GPIOB(10)), which
effectively does this:

ISR_B |= 1 << 10;

with the result that (0x00001400 | 0x00000400) is written, clearing
the interrupt status bits for *both* GPIO B10 and B12.

The fix is to write 1s only for the interrupts we want to clear.

The same problem seems to be occurring in the DMA code; this patch
does not address those issues.

Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matt Reimer <mreimer@vpop.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
hifive-unleashed-5.1
Matt Reimer 2006-06-08 22:46:48 +01:00 committed by Russell King
parent 0c27c5d5b9
commit e2f04e1894
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-imx/irq.c
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@ -127,7 +127,7 @@ static void
imx_gpio_ack_irq(unsigned int irq)
{
DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
ISR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32);
ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32);
}
static void