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clk: renesas: rcar-gen3: Add documentation for SD clocks 

Document the known use cases of the different clock settings. This is
useful as different SoC and ES versions use different settings to do
the same thing as there is more than one combination to achieve the
same SDn clock speed.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
hifive-unleashed-5.1
Niklas Söderlund 2018-11-29 01:39:48 +01:00 committed by Geert Uytterhoeven
parent ecda0a09fa
commit e2f4dd1f5b
1 changed files with 5 additions and 5 deletions
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10
drivers/clk/renesas/rcar-gen3-cpg.c
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@ -232,13 +232,13 @@ struct sd_clock {
* sd_srcfc sd_fc div
* stp_hck stp_ck (div) (div) = sd_srcfc x sd_fc
*-------------------------------------------------------------------
* 0 0 0 (1) 1 (4) 4
* 0 0 1 (2) 1 (4) 8
* 1 0 2 (4) 1 (4) 16
* 1 0 3 (8) 1 (4) 32
* 0 0 0 (1) 1 (4) 4 : SDR104 / HS200 / HS400 (8 TAP)
* 0 0 1 (2) 1 (4) 8 : SDR50
* 1 0 2 (4) 1 (4) 16 : HS / SDR25
* 1 0 3 (8) 1 (4) 32 : NS / SDR12
* 1 0 4 (16) 1 (4) 64
* 0 0 0 (1) 0 (2) 2
* 0 0 1 (2) 0 (2) 4
* 0 0 1 (2) 0 (2) 4 : SDR104 / HS200 / HS400 (4 TAP)
* 1 0 2 (4) 0 (2) 8
* 1 0 3 (8) 0 (2) 16
* 1 0 4 (16) 0 (2) 32