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tg3: Add MDI-X reporting

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This patch adds MDI-X state reporting.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2011-11-21 15:01:20 +00:00 committed by David S. Miller
parent fa6b2aae6a
commit e348c5e7de
2 changed files with 28 additions and 1 deletions
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24
drivers/net/ethernet/broadcom/tg3.c
View file

@ -3932,6 +3932,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
current_link_up = 0;
current_speed = SPEED_INVALID;
current_duplex = DUPLEX_INVALID;
tp->phy_flags &= ~TG3_PHYFLG_MDIX_STATE;
if (tp->phy_flags & TG3_PHYFLG_CAPACITIVE_COUPLING) {
err = tg3_phy_auxctl_read(tp,
@ -4004,8 +4005,22 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
}
if (current_link_up == 1 &&
tp->link_config.active_duplex == DUPLEX_FULL)
tp->link_config.active_duplex == DUPLEX_FULL) {
u32 reg, bit;
if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
reg = MII_TG3_FET_GEN_STAT;
bit = MII_TG3_FET_GEN_STAT_MDIXSTAT;
} else {
reg = MII_TG3_EXT_STAT;
bit = MII_TG3_EXT_STAT_MDIX;
}
if (!tg3_readphy(tp, reg, &val) && (val & bit))
tp->phy_flags |= TG3_PHYFLG_MDIX_STATE;
tg3_setup_flow_control(tp, lcl_adv, rmt_adv);
}
}
relink:
@ -10290,9 +10305,16 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
if (netif_running(dev)) {
ethtool_cmd_speed_set(cmd, tp->link_config.active_speed);
cmd->duplex = tp->link_config.active_duplex;
if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) {
if (tp->phy_flags & TG3_PHYFLG_MDIX_STATE)
cmd->eth_tp_mdix = ETH_TP_MDI_X;
else
cmd->eth_tp_mdix = ETH_TP_MDI;
}
} else {
ethtool_cmd_speed_set(cmd, SPEED_INVALID);
cmd->duplex = DUPLEX_INVALID;
cmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
}
cmd->phy_address = tp->phy_addr;
cmd->transceiver = XCVR_INTERNAL;

5
drivers/net/ethernet/broadcom/tg3.h
View file

@ -2174,6 +2174,7 @@
#define MII_TG3_EXT_CTRL_TBI 0x8000
#define MII_TG3_EXT_STAT 0x11 /* Extended status register */
#define MII_TG3_EXT_STAT_MDIX 0x2000
#define MII_TG3_EXT_STAT_LPASS 0x0100
#define MII_TG3_RXR_COUNTERS 0x14 /* Local/Remote Receiver Counts */
@ -2277,6 +2278,9 @@
#define MII_TG3_FET_PTEST_FRC_TX_LINK 0x1000
#define MII_TG3_FET_PTEST_FRC_TX_LOCK 0x0800
#define MII_TG3_FET_GEN_STAT 0x1c
#define MII_TG3_FET_GEN_STAT_MDIXSTAT 0x2000
#define MII_TG3_FET_TEST 0x1f
#define MII_TG3_FET_SHADOW_EN 0x0080
@ -3135,6 +3139,7 @@ struct tg3 {
#define TG3_PHYFLG_SERDES_PREEMPHASIS 0x00010000
#define TG3_PHYFLG_PARALLEL_DETECT 0x00020000
#define TG3_PHYFLG_EEE_CAP 0x00040000
#define TG3_PHYFLG_MDIX_STATE 0x00200000
u32 led_ctrl;
u32 phy_otp;