asm-generic changes for 4.5
The asm-generic tree this time contains one series from Nicolas Pitre that makes the optimized do_div() implementation from the ARM architecture available to all architectures. This also adds stricter type checking for callers of do_div, which has uncovered a number of bugs in existing code, and fixes up the ones we have found. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAVqARKWCrR//JCVInAQJrBhAAlwZL0IiVGFfDXWtvQGOm+yC5j4vdIhMf 1scsvRbk3ln1xUk5+NM61NpxbQotro78K5HxFZFhaVGUTbbFXM9w2VZSyI8ZaGAJ Od6lBUUyLQmzlbHDJ3v/zrZn8Up7qZlRApmXcbUVDtssfnEfKk4xA2RG9JwIMS1c uZMvnD7N3P9vxDPl+CsYlB2osi6Yks3VQ1tXYe2z6siO+H67zHaF08+ls7fbsd3d oyKjZqlaQ02MIOr+AdR0h9iKyJJ6SXT0DQlsMyzB6aBWmeBCNLNALNIiukDk9Qc1 VV3sF1MOS3LtfU2TeOx4Na7hcd2iC6WYLb271iApO2Ww7t16n+de3i6AipZxLUJ0 08jiRlisTzUhXDobRSqI3mcQlxrB5UGfyblab2z/MqGGmIGJSPPRdTPRQUgi0ZKg jksSmsaPwOQp64FhTgECLJthlYX7h6ULjkvJ9h60gZHa4jhGZbGPeMwHPf1uSm95 EvQE971Ssgm4jwhvxZ/kt1ruuZI/fxxG1Qfw+C25QkXZGKye2nB+icLWeMwz+FXG HLqkmaAjasf5MAV1GiK8U6zoC6bCOLU0Lea83hOwRPZ999v3Nym1giSatNv4/pB+ QmkXRvFi93cdQ643l7xcUEDT2zpk4pogF3xREiBhyaXtqLlT7pPMKsBQOgdWvFuu Ou0ZbEAwIVo= =4psa -----END PGP SIGNATURE----- Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree this time contains one series from Nicolas Pitre that makes the optimized do_div() implementation from the ARM architecture available to all architectures. This also adds stricter type checking for callers of do_div, which has uncovered a number of bugs in existing code, and fixes up the ones we have found" * tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: ARM: asm/div64.h: adjust to generic codde __div64_32(): make it overridable at compile time __div64_const32(): abstract out the actual 128-bit cross product code do_div(): generic optimization for constant divisor on 32-bit machines div64.h: optimize do_div() for power-of-two constant divisors mtd/sm_ftl.c: fix wrong do_div() usage drm/mgag200/mgag200_mode.c: fix wrong do_div() usage hid-sensor-hub.c: fix wrong do_div() usage ti/fapll: fix wrong do_div() usage ti/clkt_dpll: fix wrong do_div() usage tegra/clk-divider: fix wrong do_div() usage imx/clk-pllv2: fix wrong do_div() usage imx/clk-pllv1: fix wrong do_div() usage nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usagehifive-unleashed-5.1
Linus Torvalds
commit
e3de671dd6
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@ -5,9 +5,9 @@
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#include <asm/compiler.h>
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/*
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* The semantics of do_div() are:
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* The semantics of __div64_32() are:
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*
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* uint32_t do_div(uint64_t *n, uint32_t base)
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* uint32_t __div64_32(uint64_t *n, uint32_t base)
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* {
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* uint32_t remainder = *n % base;
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* *n = *n / base;
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@ -16,8 +16,9 @@
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*
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* In other words, a 64-bit dividend with a 32-bit divisor producing
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* a 64-bit result and a 32-bit remainder. To accomplish this optimally
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* we call a special __do_div64 helper with completely non standard
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* calling convention for arguments and results (beware).
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* we override the generic version in lib/div64.c to call our __do_div64
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* assembly implementation with completely non standard calling convention
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* for arguments and results (beware).
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*/
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#ifdef __ARMEB__
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@ -28,199 +29,101 @@
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#define __xh "r1"
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#endif
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#define __do_div_asm(n, base) \
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({ \
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register unsigned int __base asm("r4") = base; \
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register unsigned long long __n asm("r0") = n; \
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register unsigned long long __res asm("r2"); \
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register unsigned int __rem asm(__xh); \
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asm( __asmeq("%0", __xh) \
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__asmeq("%1", "r2") \
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__asmeq("%2", "r0") \
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__asmeq("%3", "r4") \
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"bl __do_div64" \
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: "=r" (__rem), "=r" (__res) \
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: "r" (__n), "r" (__base) \
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: "ip", "lr", "cc"); \
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n = __res; \
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__rem; \
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})
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static inline uint32_t __div64_32(uint64_t *n, uint32_t base)
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{
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register unsigned int __base asm("r4") = base;
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register unsigned long long __n asm("r0") = *n;
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register unsigned long long __res asm("r2");
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register unsigned int __rem asm(__xh);
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asm( __asmeq("%0", __xh)
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__asmeq("%1", "r2")
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__asmeq("%2", "r0")
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__asmeq("%3", "r4")
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"bl __do_div64"
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: "=r" (__rem), "=r" (__res)
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: "r" (__n), "r" (__base)
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: "ip", "lr", "cc");
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*n = __res;
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return __rem;
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}
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#define __div64_32 __div64_32
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#if __GNUC__ < 4 || !defined(CONFIG_AEABI)
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#if !defined(CONFIG_AEABI)
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/*
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* In OABI configurations, some uses of the do_div function
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* cause gcc to run out of registers. To work around that,
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* we can force the use of the out-of-line version for
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* configurations that build a OABI kernel.
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*/
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#define do_div(n, base) __div64_32(&(n), base)
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#else
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/*
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* gcc versions earlier than 4.0 are simply too problematic for the
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* optimized implementation below. First there is gcc PR 15089 that
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* tend to trig on more complex constructs, spurious .global __udivsi3
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* are inserted even if none of those symbols are referenced in the
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* generated code, and those gcc versions are not able to do constant
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* propagation on long long values anyway.
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* __div64_const32() code in asm-generic/div64.h. First there is
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* gcc PR 15089 that tend to trig on more complex constructs, spurious
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* .global __udivsi3 are inserted even if none of those symbols are
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* referenced in the generated code, and those gcc versions are not able
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* to do constant propagation on long long values anyway.
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*/
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#define do_div(n, base) __do_div_asm(n, base)
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#elif __GNUC__ >= 4
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#define __div64_const32_is_OK (__GNUC__ >= 4)
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#include <asm/bug.h>
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static inline uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)
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{
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unsigned long long res;
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unsigned int tmp = 0;
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/*
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* If the divisor happens to be constant, we determine the appropriate
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* inverse at compile time to turn the division into a few inline
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* multiplications instead which is much faster. And yet only if compiling
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* for ARMv4 or higher (we need umull/umlal) and if the gcc version is
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* sufficiently recent to perform proper long long constant propagation.
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* (It is unfortunate that gcc doesn't perform all this internally.)
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*/
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#define do_div(n, base) \
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({ \
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unsigned int __r, __b = (base); \
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if (!__builtin_constant_p(__b) || __b == 0 || \
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(__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \
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/* non-constant divisor (or zero): slow path */ \
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__r = __do_div_asm(n, __b); \
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} else if ((__b & (__b - 1)) == 0) { \
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/* Trivial: __b is constant and a power of 2 */ \
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/* gcc does the right thing with this code. */ \
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__r = n; \
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__r &= (__b - 1); \
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n /= __b; \
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} else { \
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/* Multiply by inverse of __b: n/b = n*(p/b)/p */ \
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/* We rely on the fact that most of this code gets */ \
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/* optimized away at compile time due to constant */ \
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/* propagation and only a couple inline assembly */ \
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/* instructions should remain. Better avoid any */ \
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/* code construct that might prevent that. */ \
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unsigned long long __res, __x, __t, __m, __n = n; \
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unsigned int __c, __p, __z = 0; \
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/* preserve low part of n for reminder computation */ \
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__r = __n; \
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/* determine number of bits to represent __b */ \
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__p = 1 << __div64_fls(__b); \
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/* compute __m = ((__p << 64) + __b - 1) / __b */ \
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__m = (~0ULL / __b) * __p; \
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__m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \
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/* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \
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__x = ~0ULL / __b * __b - 1; \
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__res = (__m & 0xffffffff) * (__x & 0xffffffff); \
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__res >>= 32; \
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__res += (__m & 0xffffffff) * (__x >> 32); \
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__t = __res; \
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__res += (__x & 0xffffffff) * (__m >> 32); \
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__t = (__res < __t) ? (1ULL << 32) : 0; \
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__res = (__res >> 32) + __t; \
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__res += (__m >> 32) * (__x >> 32); \
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__res /= __p; \
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/* Now sanitize and optimize what we've got. */ \
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if (~0ULL % (__b / (__b & -__b)) == 0) { \
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/* those cases can be simplified with: */ \
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__n /= (__b & -__b); \
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__m = ~0ULL / (__b / (__b & -__b)); \
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__p = 1; \
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__c = 1; \
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} else if (__res != __x / __b) { \
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/* We can't get away without a correction */ \
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/* to compensate for bit truncation errors. */ \
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/* To avoid it we'd need an additional bit */ \
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/* to represent __m which would overflow it. */ \
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/* Instead we do m=p/b and n/b=(n*m+m)/p. */ \
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__c = 1; \
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/* Compute __m = (__p << 64) / __b */ \
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__m = (~0ULL / __b) * __p; \
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__m += ((~0ULL % __b + 1) * __p) / __b; \
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} else { \
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/* Reduce __m/__p, and try to clear bit 31 */ \
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/* of __m when possible otherwise that'll */ \
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/* need extra overflow handling later. */ \
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unsigned int __bits = -(__m & -__m); \
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__bits |= __m >> 32; \
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__bits = (~__bits) << 1; \
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/* If __bits == 0 then setting bit 31 is */ \
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/* unavoidable. Simply apply the maximum */ \
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/* possible reduction in that case. */ \
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/* Otherwise the MSB of __bits indicates the */ \
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/* best reduction we should apply. */ \
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if (!__bits) { \
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__p /= (__m & -__m); \
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__m /= (__m & -__m); \
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} else { \
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__p >>= __div64_fls(__bits); \
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__m >>= __div64_fls(__bits); \
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} \
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/* No correction needed. */ \
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__c = 0; \
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} \
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/* Now we have a combination of 2 conditions: */ \
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/* 1) whether or not we need a correction (__c), and */ \
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/* 2) whether or not there might be an overflow in */ \
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/* the cross product (__m & ((1<<63) | (1<<31))) */ \
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/* Select the best insn combination to perform the */ \
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/* actual __m * __n / (__p << 64) operation. */ \
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if (!__c) { \
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
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"mov %Q0, #0" \
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: "=&r" (__res) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \
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__res = __m; \
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asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \
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"mov %Q0, #0" \
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: "+&r" (__res) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} else { \
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
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"cmn %Q0, %Q1\n\t" \
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"adcs %R0, %R0, %R1\n\t" \
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"adc %Q0, %3, #0" \
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: "=&r" (__res) \
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: "r" (__m), "r" (__n), "r" (__z) \
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: "cc" ); \
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} \
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if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \
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asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \
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"umlal %R0, %Q0, %Q1, %R2\n\t" \
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"mov %R0, #0\n\t" \
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"umlal %Q0, %R0, %R1, %R2" \
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: "+&r" (__res) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} else { \
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asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \
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"umlal %R0, %1, %Q2, %R3\n\t" \
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"mov %R0, #0\n\t" \
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"adds %Q0, %1, %Q0\n\t" \
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"adc %R0, %R0, #0\n\t" \
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"umlal %Q0, %R0, %R2, %R3" \
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: "+&r" (__res), "+&r" (__z) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} \
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__res /= __p; \
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/* The reminder can be computed with 32-bit regs */ \
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/* only, and gcc is good at that. */ \
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{ \
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unsigned int __res0 = __res; \
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unsigned int __b0 = __b; \
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__r -= __res0 * __b0; \
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} \
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/* BUG_ON(__r >= __b || __res * __b + __r != n); */ \
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n = __res; \
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} \
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__r; \
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})
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if (!bias) {
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t"
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"mov %Q0, #0"
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: "=&r" (res)
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: "r" (m), "r" (n)
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: "cc");
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} else if (!(m & ((1ULL << 63) | (1ULL << 31)))) {
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res = m;
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asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t"
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"mov %Q0, #0"
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: "+&r" (res)
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: "r" (m), "r" (n)
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: "cc");
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} else {
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t"
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"cmn %Q0, %Q1\n\t"
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"adcs %R0, %R0, %R1\n\t"
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"adc %Q0, %3, #0"
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: "=&r" (res)
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: "r" (m), "r" (n), "r" (tmp)
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: "cc");
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}
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/* our own fls implementation to make sure constant propagation is fine */
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#define __div64_fls(bits) \
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({ \
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unsigned int __left = (bits), __nr = 0; \
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if (__left & 0xffff0000) __nr += 16, __left >>= 16; \
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if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \
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if (__left & 0x000000f0) __nr += 4, __left >>= 4; \
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if (__left & 0x0000000c) __nr += 2, __left >>= 2; \
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if (__left & 0x00000002) __nr += 1; \
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__nr; \
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})
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if (!(m & ((1ULL << 63) | (1ULL << 31)))) {
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asm ( "umlal %R0, %Q0, %R1, %Q2\n\t"
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"umlal %R0, %Q0, %Q1, %R2\n\t"
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"mov %R0, #0\n\t"
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"umlal %Q0, %R0, %R1, %R2"
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: "+&r" (res)
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: "r" (m), "r" (n)
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: "cc");
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} else {
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asm ( "umlal %R0, %Q0, %R2, %Q3\n\t"
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"umlal %R0, %1, %Q2, %R3\n\t"
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"mov %R0, #0\n\t"
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"adds %Q0, %1, %Q0\n\t"
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"adc %R0, %R0, #0\n\t"
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"umlal %Q0, %R0, %R2, %R3"
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: "+&r" (res), "+&r" (tmp)
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: "r" (m), "r" (n)
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: "cc");
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}
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return res;
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}
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#define __arch_xprod_64 __arch_xprod_64
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#include <asm-generic/div64.h>
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#endif
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|
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@ -32,7 +32,7 @@
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static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
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unsigned long parent_rate)
|
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{
|
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s64 divider_ux1 = parent_rate;
|
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u64 divider_ux1 = parent_rate;
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u8 flags = divider->flags;
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int mul;
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|
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|
|
@ -54,7 +54,7 @@ static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
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|
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divider_ux1 -= mul;
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|
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if (divider_ux1 < 0)
|
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if ((s64)divider_ux1 < 0)
|
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return 0;
|
||||
|
||||
if (divider_ux1 > get_max_div(divider))
|
||||
|
|
|
|||
|
|
@ -1564,7 +1564,7 @@ static uint32_t mga_vga_calculate_mode_bandwidth(struct drm_display_mode *mode,
|
|||
int bits_per_pixel)
|
||||
{
|
||||
uint32_t total_area, divisor;
|
||||
int64_t active_area, pixels_per_second, bandwidth;
|
||||
uint64_t active_area, pixels_per_second, bandwidth;
|
||||
uint64_t bytes_per_pixel = (bits_per_pixel + 7) / 8;
|
||||
|
||||
divisor = 1024;
|
||||
|
|
|
|||
|
|
@ -141,9 +141,8 @@ gk20a_pllg_calc_rate(struct gk20a_clk *clk)
|
|||
|
||||
rate = clk->parent_rate * clk->n;
|
||||
divider = clk->m * pl_to_div[clk->pl];
|
||||
do_div(rate, divider);
|
||||
|
||||
return rate / 2;
|
||||
return rate / divider / 2;
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
|
|||
|
|
@ -218,7 +218,8 @@ int sensor_hub_set_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
|
|||
goto done_proc;
|
||||
}
|
||||
|
||||
remaining_bytes = do_div(buffer_size, sizeof(__s32));
|
||||
remaining_bytes = buffer_size % sizeof(__s32);
|
||||
buffer_size = buffer_size / sizeof(__s32);
|
||||
if (buffer_size) {
|
||||
for (i = 0; i < buffer_size; ++i) {
|
||||
hid_set_field(report->field[field_index], i,
|
||||
|
|
|
|||
|
|
@ -4,6 +4,9 @@
|
|||
* Copyright (C) 2003 Bernardo Innocenti <bernie@develer.com>
|
||||
* Based on former asm-ppc/div64.h and asm-m68knommu/div64.h
|
||||
*
|
||||
* Optimization for constant divisors on 32-bit machines:
|
||||
* Copyright (C) 2006-2015 Nicolas Pitre
|
||||
*
|
||||
* The semantics of do_div() are:
|
||||
*
|
||||
* uint32_t do_div(uint64_t *n, uint32_t base)
|
||||
|
|
@ -32,7 +35,168 @@
|
|||
|
||||
#elif BITS_PER_LONG == 32
|
||||
|
||||
#include <linux/log2.h>
|
||||
|
||||
/*
|
||||
* If the divisor happens to be constant, we determine the appropriate
|
||||
* inverse at compile time to turn the division into a few inline
|
||||
* multiplications which ought to be much faster. And yet only if compiling
|
||||
* with a sufficiently recent gcc version to perform proper 64-bit constant
|
||||
* propagation.
|
||||
*
|
||||
* (It is unfortunate that gcc doesn't perform all this internally.)
|
||||
*/
|
||||
|
||||
#ifndef __div64_const32_is_OK
|
||||
#define __div64_const32_is_OK (__GNUC__ >= 4)
|
||||
#endif
|
||||
|
||||
#define __div64_const32(n, ___b) \
|
||||
({ \
|
||||
/* \
|
||||
* Multiplication by reciprocal of b: n / b = n * (p / b) / p \
|
||||
* \
|
||||
* We rely on the fact that most of this code gets optimized \
|
||||
* away at compile time due to constant propagation and only \
|
||||
* a few multiplication instructions should remain. \
|
||||
* Hence this monstrous macro (static inline doesn't always \
|
||||
* do the trick here). \
|
||||
*/ \
|
||||
uint64_t ___res, ___x, ___t, ___m, ___n = (n); \
|
||||
uint32_t ___p, ___bias; \
|
||||
\
|
||||
/* determine MSB of b */ \
|
||||
___p = 1 << ilog2(___b); \
|
||||
\
|
||||
/* compute m = ((p << 64) + b - 1) / b */ \
|
||||
___m = (~0ULL / ___b) * ___p; \
|
||||
___m += (((~0ULL % ___b + 1) * ___p) + ___b - 1) / ___b; \
|
||||
\
|
||||
/* one less than the dividend with highest result */ \
|
||||
___x = ~0ULL / ___b * ___b - 1; \
|
||||
\
|
||||
/* test our ___m with res = m * x / (p << 64) */ \
|
||||
___res = ((___m & 0xffffffff) * (___x & 0xffffffff)) >> 32; \
|
||||
___t = ___res += (___m & 0xffffffff) * (___x >> 32); \
|
||||
___res += (___x & 0xffffffff) * (___m >> 32); \
|
||||
___t = (___res < ___t) ? (1ULL << 32) : 0; \
|
||||
___res = (___res >> 32) + ___t; \
|
||||
___res += (___m >> 32) * (___x >> 32); \
|
||||
___res /= ___p; \
|
||||
\
|
||||
/* Now sanitize and optimize what we've got. */ \
|
||||
if (~0ULL % (___b / (___b & -___b)) == 0) { \
|
||||
/* special case, can be simplified to ... */ \
|
||||
___n /= (___b & -___b); \
|
||||
___m = ~0ULL / (___b / (___b & -___b)); \
|
||||
___p = 1; \
|
||||
___bias = 1; \
|
||||
} else if (___res != ___x / ___b) { \
|
||||
/* \
|
||||
* We can't get away without a bias to compensate \
|
||||
* for bit truncation errors. To avoid it we'd need an \
|
||||
* additional bit to represent m which would overflow \
|
||||
* a 64-bit variable. \
|
||||
* \
|
||||
* Instead we do m = p / b and n / b = (n * m + m) / p. \
|
||||
*/ \
|
||||
___bias = 1; \
|
||||
/* Compute m = (p << 64) / b */ \
|
||||
___m = (~0ULL / ___b) * ___p; \
|
||||
___m += ((~0ULL % ___b + 1) * ___p) / ___b; \
|
||||
} else { \
|
||||
/* \
|
||||
* Reduce m / p, and try to clear bit 31 of m when \
|
||||
* possible, otherwise that'll need extra overflow \
|
||||
* handling later. \
|
||||
*/ \
|
||||
uint32_t ___bits = -(___m & -___m); \
|
||||
___bits |= ___m >> 32; \
|
||||
___bits = (~___bits) << 1; \
|
||||
/* \
|
||||
* If ___bits == 0 then setting bit 31 is unavoidable. \
|
||||
* Simply apply the maximum possible reduction in that \
|
||||
* case. Otherwise the MSB of ___bits indicates the \
|
||||
* best reduction we should apply. \
|
||||
*/ \
|
||||
if (!___bits) { \
|
||||
___p /= (___m & -___m); \
|
||||
___m /= (___m & -___m); \
|
||||
} else { \
|
||||
___p >>= ilog2(___bits); \
|
||||
___m >>= ilog2(___bits); \
|
||||
} \
|
||||
/* No bias needed. */ \
|
||||
___bias = 0; \
|
||||
} \
|
||||
\
|
||||
/* \
|
||||
* Now we have a combination of 2 conditions: \
|
||||
* \
|
||||
* 1) whether or not we need to apply a bias, and \
|
||||
* \
|
||||
* 2) whether or not there might be an overflow in the cross \
|
||||
* product determined by (___m & ((1 << 63) | (1 << 31))). \
|
||||
* \
|
||||
* Select the best way to do (m_bias + m * n) / (1 << 64). \
|
||||
* From now on there will be actual runtime code generated. \
|
||||
*/ \
|
||||
___res = __arch_xprod_64(___m, ___n, ___bias); \
|
||||
\
|
||||
___res /= ___p; \
|
||||
})
|
||||
|
||||
#ifndef __arch_xprod_64
|
||||
/*
|
||||
* Default C implementation for __arch_xprod_64()
|
||||
*
|
||||
* Prototype: uint64_t __arch_xprod_64(const uint64_t m, uint64_t n, bool bias)
|
||||
* Semantic: retval = ((bias ? m : 0) + m * n) >> 64
|
||||
*
|
||||
* The product is a 128-bit value, scaled down to 64 bits.
|
||||
* Assuming constant propagation to optimize away unused conditional code.
|
||||
* Architectures may provide their own optimized assembly implementation.
|
||||
*/
|
||||
static inline uint64_t __arch_xprod_64(const uint64_t m, uint64_t n, bool bias)
|
||||
{
|
||||
uint32_t m_lo = m;
|
||||
uint32_t m_hi = m >> 32;
|
||||
uint32_t n_lo = n;
|
||||
uint32_t n_hi = n >> 32;
|
||||
uint64_t res, tmp;
|
||||
|
||||
if (!bias) {
|
||||
res = ((uint64_t)m_lo * n_lo) >> 32;
|
||||
} else if (!(m & ((1ULL << 63) | (1ULL << 31)))) {
|
||||
/* there can't be any overflow here */
|
||||
res = (m + (uint64_t)m_lo * n_lo) >> 32;
|
||||
} else {
|
||||
res = m + (uint64_t)m_lo * n_lo;
|
||||
tmp = (res < m) ? (1ULL << 32) : 0;
|
||||
res = (res >> 32) + tmp;
|
||||
}
|
||||
|
||||
if (!(m & ((1ULL << 63) | (1ULL << 31)))) {
|
||||
/* there can't be any overflow here */
|
||||
res += (uint64_t)m_lo * n_hi;
|
||||
res += (uint64_t)m_hi * n_lo;
|
||||
res >>= 32;
|
||||
} else {
|
||||
tmp = res += (uint64_t)m_lo * n_hi;
|
||||
res += (uint64_t)m_hi * n_lo;
|
||||
tmp = (res < tmp) ? (1ULL << 32) : 0;
|
||||
res = (res >> 32) + tmp;
|
||||
}
|
||||
|
||||
res += (uint64_t)m_hi * n_hi;
|
||||
|
||||
return res;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef __div64_32
|
||||
extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
|
||||
#endif
|
||||
|
||||
/* The unnecessary pointer compare is there
|
||||
* to check for type safety (n must be 64bit)
|
||||
|
|
@ -41,7 +205,19 @@ extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
|
|||
uint32_t __base = (base); \
|
||||
uint32_t __rem; \
|
||||
(void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
|
||||
if (likely(((n) >> 32) == 0)) { \
|
||||
if (__builtin_constant_p(__base) && \
|
||||
is_power_of_2(__base)) { \
|
||||
__rem = (n) & (__base - 1); \
|
||||
(n) >>= ilog2(__base); \
|
||||
} else if (__div64_const32_is_OK && \
|
||||
__builtin_constant_p(__base) && \
|
||||
__base != 0) { \
|
||||
uint32_t __res_lo, __n_lo = (n); \
|
||||
(n) = __div64_const32(n, __base); \
|
||||
/* the remainder can be computed with 32-bit regs */ \
|
||||
__res_lo = (n); \
|
||||
__rem = __n_lo - __res_lo * __base; \
|
||||
} else if (likely(((n) >> 32) == 0)) { \
|
||||
__rem = (uint32_t)(n) % __base; \
|
||||
(n) = (uint32_t)(n) / __base; \
|
||||
} else \
|
||||
|
|
|
|||
|
|
@ -13,7 +13,8 @@
|
|||
*
|
||||
* Code generated for this function might be very inefficient
|
||||
* for some CPUs. __div64_32() can be overridden by linking arch-specific
|
||||
* assembly versions such as arch/ppc/lib/div64.S and arch/sh/lib/div64.S.
|
||||
* assembly versions such as arch/ppc/lib/div64.S and arch/sh/lib/div64.S
|
||||
* or by defining a preprocessor macro in arch/include/asm/div64.h.
|
||||
*/
|
||||
|
||||
#include <linux/export.h>
|
||||
|
|
@ -23,6 +24,7 @@
|
|||
/* Not needed on 64bit architectures */
|
||||
#if BITS_PER_LONG == 32
|
||||
|
||||
#ifndef __div64_32
|
||||
uint32_t __attribute__((weak)) __div64_32(uint64_t *n, uint32_t base)
|
||||
{
|
||||
uint64_t rem = *n;
|
||||
|
|
@ -55,8 +57,8 @@ uint32_t __attribute__((weak)) __div64_32(uint64_t *n, uint32_t base)
|
|||
*n = res;
|
||||
return rem;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__div64_32);
|
||||
#endif
|
||||
|
||||
#ifndef div_s64_rem
|
||||
s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder)
|
||||
|
|
|
|||
Loading…
Reference in New Issue