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at91: regroup gpio and pinctrl under the same ranges 

Fix also the reg size as we have 512 bytes bank not 256 bytes per gpio/mux
controller

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
hifive-unleashed-5.1
Jean-Christophe PLAGNIOL-VILLARD 2012-07-04 17:20:46 +08:00
parent c18486e10d
commit e4541ff212
5 changed files with 218 additions and 184 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -98,9 +98,15 @@
interrupts = <26 4 0 27 4 0 28 4 0>;
};
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x600>;
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -110,7 +116,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
reg = <0xfffff600 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -120,13 +126,14 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
reg = <0xfffff800 0x200>;
interrupts = <4 4 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";

16
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -89,9 +89,15 @@
reg = <0xfffffd10 0x10>;
};
pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff200 0xfffff200 0xa00>;
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x100>;
reg = <0xfffff200 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -101,7 +107,7 @@
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
reg = <0xfffff400 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -111,7 +117,7 @@
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
reg = <0xfffff600 0x200>;
interrupts = <4 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -121,7 +127,7 @@
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
reg = <0xfffff800 0x200>;
interrupts = <4 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -131,7 +137,7 @@
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
reg = <0xfffffa00 0x200>;
interrupts = <4 4 1>;
#gpio-cells = <2>;
gpio-controller;

17
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@ -108,9 +108,15 @@
interrupts = <21 4 0>;
};
pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff200 0xfffff200 0xa00>;
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x100>;
reg = <0xfffff200 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -120,7 +126,7 @@
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
reg = <0xfffff400 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -130,7 +136,7 @@
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
reg = <0xfffff600 0x200>;
interrupts = <4 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -140,7 +146,7 @@
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
reg = <0xfffff800 0x200>;
interrupts = <5 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -150,13 +156,14 @@
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
reg = <0xfffffa00 0x200>;
interrupts = <5 4 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
};
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";

15
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@ -102,9 +102,15 @@
interrupts = <20 4 0>;
};
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x800>;
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -114,7 +120,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
reg = <0xfffff600 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -124,7 +130,7 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
reg = <0xfffff800 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -134,13 +140,14 @@
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
reg = <0xfffffa00 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";

15
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -111,9 +111,15 @@
interrupts = <21 4 0>;
};
pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x800>;
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -123,7 +129,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
reg = <0xfffff600 0x200>;
interrupts = <2 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -133,7 +139,7 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
reg = <0xfffff800 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
@ -143,13 +149,14 @@
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
reg = <0xfffffa00 0x200>;
interrupts = <3 4 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
};
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";