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power: reset: at91-reset: handle nrst async for sam9x60 

Handle NRST asynchronously for SAM9X60 to avoid problem with fast drop of
VDDCORE on shutdown operations in the first 100 us after CPU is shutdown.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
alistair/sensors
Claudiu.Beznea@microchip.com 2020-01-21 10:03:39 +00:00 committed by Sebastian Reichel
parent 766b0162e6
commit e48bbb52a2
1 changed files with 8 additions and 0 deletions
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8
drivers/power/reset/at91-reset.c
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@ -35,6 +35,7 @@
#define AT91_RSTC_MR 0x08 /* Reset Controller Mode Register */
#define AT91_RSTC_URSTEN BIT(0) /* User Reset Enable */
#define AT91_RSTC_URSTASYNC BIT(2) /* User Reset Asynchronous Control */
#define AT91_RSTC_URSTIEN BIT(4) /* User Reset Interrupt Enable */
#define AT91_RSTC_ERSTL GENMASK(11, 8) /* External Reset Length */
@ -228,6 +229,13 @@ static int __init at91_reset_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, reset);
if (of_device_is_compatible(pdev->dev.of_node, "microchip,sam9x60-rstc")) {
u32 val = readl(reset->rstc_base + AT91_RSTC_MR);
writel(AT91_RSTC_KEY | AT91_RSTC_URSTASYNC | val,
reset->rstc_base + AT91_RSTC_MR);
}
ret = register_restart_handler(&reset->nb);
if (ret) {
clk_disable_unprepare(reset->sclk);