tg3: Invert nvram_read() and nvram_read_swab()
This patch removes the blind byteswap of NVRAM data as it is read in. To preserve the logic at the call sites, this patch also inverts every call to tg3_nvram_read() and tg3_nvram_read_swab(). The call swap gets confusing within tg3_nvram_read_le() (LE is a misnomer), but the reader should be able to convince himself / herself that the resulting behavior is still unchanged. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2245,6 +2245,12 @@ static u32 tg3_nvram_logical_addr(struct tg3 *tp, u32 addr)
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return addr;
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}
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/* NOTE: Data read in from NVRAM is byteswapped according to
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* the byteswapping settings for all other register accesses.
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* tg3 devices are BE devices, so on a BE machine, the data
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* returned will be exactly as it is seen in NVRAM. On a LE
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* machine, the 32-bit value will be byteswapped.
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*/
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static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
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{
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int ret;
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@ -2268,7 +2274,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
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NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE);
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if (ret == 0)
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*val = swab32(tr32(NVRAM_RDDATA));
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*val = tr32(NVRAM_RDDATA);
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tg3_disable_nvram_access(tp);
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@ -2290,7 +2296,7 @@ static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val)
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static int tg3_nvram_read_le(struct tg3 *tp, u32 offset, __le32 *val)
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{
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u32 v;
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int res = tg3_nvram_read(tp, offset, &v);
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int res = tg3_nvram_read_swab(tp, offset, &v);
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if (!res)
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*val = cpu_to_le32(v);
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return res;
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@ -9197,7 +9203,7 @@ static int tg3_test_nvram(struct tg3 *tp)
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__le32 *buf;
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int i, j, k, err = 0, size;
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if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
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if (tg3_nvram_read(tp, 0, &magic) != 0)
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return -EIO;
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if (magic == TG3_EEPROM_MAGIC)
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@ -10146,7 +10152,7 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
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tp->nvram_size = EEPROM_CHIP_SIZE;
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if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
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if (tg3_nvram_read(tp, 0, &magic) != 0)
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return;
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if ((magic != TG3_EEPROM_MAGIC) &&
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@ -10162,7 +10168,7 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
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cursize = 0x10;
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while (cursize < tp->nvram_size) {
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if (tg3_nvram_read_swab(tp, cursize, &val) != 0)
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if (tg3_nvram_read(tp, cursize, &val) != 0)
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return;
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if (val == magic)
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@ -10178,7 +10184,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
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{
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u32 val;
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if (tg3_nvram_read_swab(tp, 0, &val) != 0)
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if (tg3_nvram_read(tp, 0, &val) != 0)
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return;
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/* Selfboot format */
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@ -10187,7 +10193,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
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return;
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}
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if (tg3_nvram_read(tp, 0xf0, &val) == 0) {
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if (tg3_nvram_read_swab(tp, 0xf0, &val) == 0) {
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if (val != 0) {
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tp->nvram_size = (val >> 16) * 1024;
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return;
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@ -11342,14 +11348,14 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
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unsigned int i;
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u32 magic;
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if (tg3_nvram_read_swab(tp, 0x0, &magic))
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if (tg3_nvram_read(tp, 0x0, &magic))
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goto out_not_found;
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if (magic == TG3_EEPROM_MAGIC) {
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for (i = 0; i < 256; i += 4) {
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u32 tmp;
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if (tg3_nvram_read(tp, 0x100 + i, &tmp))
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if (tg3_nvram_read_swab(tp, 0x100 + i, &tmp))
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goto out_not_found;
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vpd_data[i + 0] = ((tmp >> 0) & 0xff);
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@ -11441,9 +11447,9 @@ static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset)
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{
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u32 val;
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if (tg3_nvram_read_swab(tp, offset, &val) ||
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if (tg3_nvram_read(tp, offset, &val) ||
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(val & 0xfc000000) != 0x0c000000 ||
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tg3_nvram_read_swab(tp, offset + 4, &val) ||
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tg3_nvram_read(tp, offset + 4, &val) ||
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val != 0)
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return 0;
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@ -11475,7 +11481,7 @@ static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val)
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return;
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}
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if (tg3_nvram_read_swab(tp, offset, &val))
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if (tg3_nvram_read(tp, offset, &val))
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return;
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build = (val & TG3_EEPROM_SB_EDH_BLD_MASK) >>
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@ -11501,7 +11507,7 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
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u32 ver_offset;
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int i, bcnt;
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if (tg3_nvram_read_swab(tp, 0, &val))
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if (tg3_nvram_read(tp, 0, &val))
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return;
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if (val != TG3_EEPROM_MAGIC) {
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@ -11511,14 +11517,14 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
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return;
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}
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if (tg3_nvram_read_swab(tp, 0xc, &offset) ||
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tg3_nvram_read_swab(tp, 0x4, &start))
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if (tg3_nvram_read(tp, 0xc, &offset) ||
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tg3_nvram_read(tp, 0x4, &start))
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return;
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offset = tg3_nvram_logical_addr(tp, offset);
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if (!tg3_fw_img_is_valid(tp, offset) ||
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tg3_nvram_read_swab(tp, offset + 8, &ver_offset))
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tg3_nvram_read(tp, offset + 8, &ver_offset))
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return;
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offset = offset + ver_offset - start;
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@ -11537,7 +11543,7 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
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for (offset = TG3_NVM_DIR_START;
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offset < TG3_NVM_DIR_END;
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offset += TG3_NVM_DIRENT_SIZE) {
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if (tg3_nvram_read_swab(tp, offset, &val))
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if (tg3_nvram_read(tp, offset, &val))
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return;
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if ((val >> TG3_NVM_DIRTYPE_SHIFT) == TG3_NVM_DIRTYPE_ASFINI)
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@ -11549,12 +11555,12 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
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if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
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start = 0x08000000;
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else if (tg3_nvram_read_swab(tp, offset - 4, &start))
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else if (tg3_nvram_read(tp, offset - 4, &start))
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return;
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if (tg3_nvram_read_swab(tp, offset + 4, &offset) ||
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if (tg3_nvram_read(tp, offset + 4, &offset) ||
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!tg3_fw_img_is_valid(tp, offset) ||
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tg3_nvram_read_swab(tp, offset + 8, &val))
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tg3_nvram_read(tp, offset + 8, &val))
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return;
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offset += val - start;
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@ -12349,8 +12355,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
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}
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if (!addr_ok) {
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/* Next, try NVRAM. */
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if (!tg3_nvram_read(tp, mac_offset + 0, &hi) &&
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!tg3_nvram_read(tp, mac_offset + 4, &lo)) {
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if (!tg3_nvram_read_swab(tp, mac_offset + 0, &hi) &&
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!tg3_nvram_read_swab(tp, mac_offset + 4, &lo)) {
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dev->dev_addr[0] = ((hi >> 16) & 0xff);
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dev->dev_addr[1] = ((hi >> 24) & 0xff);
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dev->dev_addr[2] = ((lo >> 0) & 0xff);
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