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PCI/ATS: Cache PRI PRG Response PASID Required bit

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The PRG Response PASID Required bit in the PRI Capability is read-only.
Read it once when we enumerate the device and cache the value so we don't
need to read it again.

Based-on-patch-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2019-10-09 16:07:51 -05:00
parent 751035b8dc
commit e5adf79a1d
2 changed files with 11 additions and 13 deletions
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23
drivers/pci/ats.c
View file

@ -161,7 +161,16 @@ EXPORT_SYMBOL_GPL(pci_ats_page_aligned);
#ifdef CONFIG_PCI_PRI
void pci_pri_init(struct pci_dev *pdev)
{
u16 status;
pdev->pri_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
if (!pdev->pri_cap)
return;
pci_read_config_word(pdev, pdev->pri_cap + PCI_PRI_STATUS, &status);
if (status & PCI_PRI_STATUS_PASID)
pdev->pasid_required = 1;
}
/**
@ -301,22 +310,10 @@ EXPORT_SYMBOL_GPL(pci_reset_pri);
*/
int pci_prg_resp_pasid_required(struct pci_dev *pdev)
{
u16 status;
int pri;
if (pdev->is_virtfn)
pdev = pci_physfn(pdev);
pri = pdev->pri_cap;
if (!pri)
return 0;
pci_read_config_word(pdev, pri + PCI_PRI_STATUS, &status);
if (status & PCI_PRI_STATUS_PASID)
return 1;
return 0;
return pdev->pasid_required;
}
EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required);
#endif /* CONFIG_PCI_PRI */

1
include/linux/pci.h
View file

@ -456,6 +456,7 @@ struct pci_dev {
#ifdef CONFIG_PCI_PRI
u16 pri_cap; /* PRI Capability offset */
u32 pri_reqs_alloc; /* Number of PRI requests allocated */
unsigned int pasid_required:1; /* PRG Response PASID Required */
#endif
#ifdef CONFIG_PCI_PASID
u16 pasid_cap; /* PASID Capability offset */