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clk: imx7ulp: call imx_register_uart_clocks once during clocks reigster 

imx_register_uart_clocks() only support once call during platform
clocks register. So use one gobal pcc_uart_clks[] array instead of
two array.

Fixes: 041652514d8b(clk: imx7ulp: Make sure earlycon's clock is enabled)
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Fugang Duan 2019-08-02 14:29:25 +08:00 committed by Dong Aisheng
parent d348b7cf91
commit e5e9d60129
1 changed files with 6 additions and 7 deletions
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13
drivers/clk/imx/clk-imx7ulp.c
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@ -52,8 +52,8 @@ static const int pcc3_uart_clk_ids[] __initconst = {
IMX7ULP_CLK_LPUART7,
};
static struct clk **pcc2_uart_clks[ARRAY_SIZE(pcc2_uart_clk_ids) + 1] __initdata;
static struct clk **pcc3_uart_clks[ARRAY_SIZE(pcc3_uart_clk_ids) + 1] __initdata;
#define UART_PORT_NUM (ARRAY_SIZE(pcc2_uart_clk_ids) + ARRAY_SIZE(pcc3_uart_clk_ids))
static struct clk **pcc_uart_clks[UART_PORT_NUM + 1] __initdata;
static void __init imx7ulp_clk_scg1_init(struct device_node *np)
{
@ -191,10 +191,8 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(pcc2_uart_clk_ids); i++) {
int index = pcc2_uart_clk_ids[i];
pcc2_uart_clks[i] = &clks[index]->clk;
pcc_uart_clks[i] = &clks[index]->clk;
}
imx_register_uart_clocks(pcc2_uart_clks);
}
CLK_OF_DECLARE(imx7ulp_clk_pcc2, "fsl,imx7ulp-pcc2", imx7ulp_clk_pcc2_init);
@ -203,6 +201,7 @@ static void __init imx7ulp_clk_pcc3_init(struct device_node *np)
struct clk_hw_onecell_data *clk_data;
struct clk_hw **clks;
void __iomem *base;
int offset = ARRAY_SIZE(pcc2_uart_clk_ids);
int i;
clk_data = kzalloc(struct_size(clk_data, hws, IMX7ULP_CLK_PCC3_END),
@ -245,10 +244,10 @@ static void __init imx7ulp_clk_pcc3_init(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(pcc3_uart_clk_ids); i++) {
int index = pcc3_uart_clk_ids[i];
pcc3_uart_clks[i] = &clks[index]->clk;
pcc_uart_clks[i + offset] = &clks[index]->clk;
}
imx_register_uart_clocks(pcc3_uart_clks);
imx_register_uart_clocks(pcc_uart_clks);
}
CLK_OF_DECLARE(imx7ulp_clk_pcc3, "fsl,imx7ulp-pcc3", imx7ulp_clk_pcc3_init);