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@ -1,3 +1,4 @@
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#include <asm/cpu_device_id.h>
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#include "uncore.h"
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static struct intel_uncore_type *empty_uncore[] = { NULL, };
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@ -21,6 +22,8 @@ static struct event_constraint uncore_constraint_fixed =
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struct event_constraint uncore_constraint_empty =
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EVENT_CONSTRAINT(0, 0, 0);
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MODULE_LICENSE("GPL");
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static int uncore_pcibus_to_physid(struct pci_bus *bus)
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{
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struct pci2phy_map *map;
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@ -754,7 +757,7 @@ static void uncore_pmu_unregister(struct intel_uncore_pmu *pmu)
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pmu->registered = false;
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}
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static void __init __uncore_exit_boxes(struct intel_uncore_type *type, int cpu)
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static void __uncore_exit_boxes(struct intel_uncore_type *type, int cpu)
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{
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struct intel_uncore_pmu *pmu = type->pmus;
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struct intel_uncore_box *box;
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@ -770,7 +773,7 @@ static void __init __uncore_exit_boxes(struct intel_uncore_type *type, int cpu)
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}
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}
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static void __init uncore_exit_boxes(void *dummy)
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static void uncore_exit_boxes(void *dummy)
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{
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struct intel_uncore_type **types;
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@ -787,7 +790,7 @@ static void uncore_free_boxes(struct intel_uncore_pmu *pmu)
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kfree(pmu->boxes);
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}
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static void __init uncore_type_exit(struct intel_uncore_type *type)
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static void uncore_type_exit(struct intel_uncore_type *type)
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{
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struct intel_uncore_pmu *pmu = type->pmus;
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int i;
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@ -804,7 +807,7 @@ static void __init uncore_type_exit(struct intel_uncore_type *type)
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type->events_group = NULL;
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}
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static void __init uncore_types_exit(struct intel_uncore_type **types)
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static void uncore_types_exit(struct intel_uncore_type **types)
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{
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for (; *types; types++)
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uncore_type_exit(*types);
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@ -989,46 +992,6 @@ static int __init uncore_pci_init(void)
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size_t size;
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int ret;
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switch (boot_cpu_data.x86_model) {
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case 45: /* Sandy Bridge-EP */
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ret = snbep_uncore_pci_init();
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break;
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case 62: /* Ivy Bridge-EP */
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ret = ivbep_uncore_pci_init();
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break;
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case 63: /* Haswell-EP */
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ret = hswep_uncore_pci_init();
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break;
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case 79: /* BDX-EP */
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case 86: /* BDX-DE */
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ret = bdx_uncore_pci_init();
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break;
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case 42: /* Sandy Bridge */
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ret = snb_uncore_pci_init();
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break;
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case 58: /* Ivy Bridge */
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ret = ivb_uncore_pci_init();
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break;
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case 60: /* Haswell */
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case 69: /* Haswell Celeron */
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ret = hsw_uncore_pci_init();
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break;
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case 61: /* Broadwell */
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ret = bdw_uncore_pci_init();
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break;
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case 87: /* Knights Landing */
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ret = knl_uncore_pci_init();
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break;
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case 94: /* SkyLake */
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ret = skl_uncore_pci_init();
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break;
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default:
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return -ENODEV;
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}
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if (ret)
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return ret;
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size = max_packages * sizeof(struct pci_extra_dev);
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uncore_extra_pci_dev = kzalloc(size, GFP_KERNEL);
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if (!uncore_extra_pci_dev) {
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@ -1060,7 +1023,7 @@ err:
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return ret;
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}
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static void __init uncore_pci_exit(void)
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static void uncore_pci_exit(void)
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{
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if (pcidrv_registered) {
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pcidrv_registered = false;
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@ -1287,46 +1250,6 @@ static int __init uncore_cpu_init(void)
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{
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int ret;
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switch (boot_cpu_data.x86_model) {
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case 26: /* Nehalem */
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case 30:
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case 37: /* Westmere */
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case 44:
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nhm_uncore_cpu_init();
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break;
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case 42: /* Sandy Bridge */
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case 58: /* Ivy Bridge */
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case 60: /* Haswell */
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case 69: /* Haswell */
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case 70: /* Haswell */
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case 61: /* Broadwell */
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case 71: /* Broadwell */
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snb_uncore_cpu_init();
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break;
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case 45: /* Sandy Bridge-EP */
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snbep_uncore_cpu_init();
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break;
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case 46: /* Nehalem-EX */
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case 47: /* Westmere-EX aka. Xeon E7 */
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nhmex_uncore_cpu_init();
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break;
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case 62: /* Ivy Bridge-EP */
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ivbep_uncore_cpu_init();
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break;
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case 63: /* Haswell-EP */
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hswep_uncore_cpu_init();
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break;
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case 79: /* BDX-EP */
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case 86: /* BDX-DE */
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bdx_uncore_cpu_init();
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break;
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case 87: /* Knights Landing */
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knl_uncore_cpu_init();
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break;
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default:
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return -ENODEV;
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}
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ret = uncore_types_init(uncore_msr_uncores, true);
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if (ret)
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goto err;
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@ -1376,11 +1299,105 @@ static int __init uncore_cpumask_init(bool msr)
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return 0;
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}
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#define X86_UNCORE_MODEL_MATCH(model, init) \
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{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&init }
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struct intel_uncore_init_fun {
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void (*cpu_init)(void);
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int (*pci_init)(void);
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};
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static const struct intel_uncore_init_fun nhm_uncore_init __initconst = {
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.cpu_init = nhm_uncore_cpu_init,
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};
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static const struct intel_uncore_init_fun snb_uncore_init __initconst = {
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.cpu_init = snb_uncore_cpu_init,
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.pci_init = snb_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun ivb_uncore_init __initconst = {
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.cpu_init = snb_uncore_cpu_init,
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.pci_init = ivb_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun hsw_uncore_init __initconst = {
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.cpu_init = snb_uncore_cpu_init,
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.pci_init = hsw_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun bdw_uncore_init __initconst = {
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.cpu_init = snb_uncore_cpu_init,
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.pci_init = bdw_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun snbep_uncore_init __initconst = {
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.cpu_init = snbep_uncore_cpu_init,
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.pci_init = snbep_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun nhmex_uncore_init __initconst = {
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.cpu_init = nhmex_uncore_cpu_init,
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};
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static const struct intel_uncore_init_fun ivbep_uncore_init __initconst = {
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.cpu_init = ivbep_uncore_cpu_init,
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.pci_init = ivbep_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun hswep_uncore_init __initconst = {
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.cpu_init = hswep_uncore_cpu_init,
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.pci_init = hswep_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun bdx_uncore_init __initconst = {
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.cpu_init = bdx_uncore_cpu_init,
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.pci_init = bdx_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun knl_uncore_init __initconst = {
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.cpu_init = knl_uncore_cpu_init,
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.pci_init = knl_uncore_pci_init,
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};
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static const struct intel_uncore_init_fun skl_uncore_init __initconst = {
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.pci_init = skl_uncore_pci_init,
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};
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static const struct x86_cpu_id intel_uncore_match[] __initconst = {
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X86_UNCORE_MODEL_MATCH(26, nhm_uncore_init), /* Nehalem */
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X86_UNCORE_MODEL_MATCH(30, nhm_uncore_init),
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X86_UNCORE_MODEL_MATCH(37, nhm_uncore_init), /* Westmere */
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X86_UNCORE_MODEL_MATCH(44, nhm_uncore_init),
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X86_UNCORE_MODEL_MATCH(42, snb_uncore_init), /* Sandy Bridge */
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X86_UNCORE_MODEL_MATCH(58, ivb_uncore_init), /* Ivy Bridge */
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X86_UNCORE_MODEL_MATCH(60, hsw_uncore_init), /* Haswell */
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X86_UNCORE_MODEL_MATCH(69, hsw_uncore_init), /* Haswell Celeron */
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X86_UNCORE_MODEL_MATCH(70, hsw_uncore_init), /* Haswell */
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X86_UNCORE_MODEL_MATCH(61, bdw_uncore_init), /* Broadwell */
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X86_UNCORE_MODEL_MATCH(71, bdw_uncore_init), /* Broadwell */
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X86_UNCORE_MODEL_MATCH(45, snbep_uncore_init), /* Sandy Bridge-EP */
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X86_UNCORE_MODEL_MATCH(46, nhmex_uncore_init), /* Nehalem-EX */
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X86_UNCORE_MODEL_MATCH(47, nhmex_uncore_init), /* Westmere-EX aka. Xeon E7 */
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X86_UNCORE_MODEL_MATCH(62, ivbep_uncore_init), /* Ivy Bridge-EP */
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X86_UNCORE_MODEL_MATCH(63, hswep_uncore_init), /* Haswell-EP */
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X86_UNCORE_MODEL_MATCH(79, bdx_uncore_init), /* BDX-EP */
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X86_UNCORE_MODEL_MATCH(86, bdx_uncore_init), /* BDX-DE */
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X86_UNCORE_MODEL_MATCH(87, knl_uncore_init), /* Knights Landing */
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X86_UNCORE_MODEL_MATCH(94, skl_uncore_init), /* SkyLake */
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{},
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);
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static int __init intel_uncore_init(void)
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{
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int pret, cret, ret;
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const struct x86_cpu_id *id;
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struct intel_uncore_init_fun *uncore_init;
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int pret = 0, cret = 0, ret;
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if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
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id = x86_match_cpu(intel_uncore_match);
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if (!id)
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return -ENODEV;
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if (cpu_has_hypervisor)
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@ -1388,8 +1405,17 @@ static int __init intel_uncore_init(void)
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max_packages = topology_max_packages();
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uncore_init = (struct intel_uncore_init_fun *)id->driver_data;
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if (uncore_init->pci_init) {
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pret = uncore_init->pci_init();
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if (!pret)
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pret = uncore_pci_init();
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}
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if (uncore_init->cpu_init) {
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uncore_init->cpu_init();
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cret = uncore_cpu_init();
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}
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if (cret && pret)
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return -ENODEV;
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@ -1409,4 +1435,14 @@ err:
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cpu_notifier_register_done();
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return ret;
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}
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device_initcall(intel_uncore_init);
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module_init(intel_uncore_init);
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static void __exit intel_uncore_exit(void)
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{
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cpu_notifier_register_begin();
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__unregister_cpu_notifier(&uncore_cpu_nb);
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uncore_types_exit(uncore_msr_uncores);
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uncore_pci_exit();
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cpu_notifier_register_done();
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}
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module_exit(intel_uncore_exit);
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