mt76: move mcu queues to mt76_dev q_mcu array
Move mcu queue to a dedicated array q_mcu in mt76_dev structure. This is a preliminary patch to move data queues in mt76_phy and properly support dbdc Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
parent
d95093a143
commit
e637763b60
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@ -660,9 +660,13 @@ void mt76_dma_cleanup(struct mt76_dev *dev)
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mt76_worker_disable(&dev->tx_worker);
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netif_napi_del(&dev->tx_napi);
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for (i = 0; i < ARRAY_SIZE(dev->q_tx); i++)
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mt76_dma_tx_cleanup(dev, dev->q_tx[i], true);
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for (i = 0; i < ARRAY_SIZE(dev->q_mcu); i++)
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mt76_dma_tx_cleanup(dev, dev->q_mcu[i], true);
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mt76_for_each_q_rx(dev, i) {
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netif_napi_del(&dev->napi[i]);
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mt76_dma_rx_cleanup(dev, &dev->q_rx[i]);
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@ -122,7 +122,8 @@ int mt76_mcu_send_firmware(struct mt76_dev *dev, int cmd, const void *data,
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len -= cur_len;
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if (dev->queue_ops->tx_cleanup)
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dev->queue_ops->tx_cleanup(dev, dev->q_tx[MT_TXQ_FWDL],
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dev->queue_ops->tx_cleanup(dev,
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dev->q_mcu[MT_MCUQ_FWDL],
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false);
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}
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@ -64,15 +64,15 @@ enum mt76_txq_id {
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MT_TXQ_BE = IEEE80211_AC_BE,
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MT_TXQ_BK = IEEE80211_AC_BK,
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MT_TXQ_PSD,
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MT_TXQ_MCU,
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MT_TXQ_MCU_WA,
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MT_TXQ_BEACON,
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MT_TXQ_CAB,
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MT_TXQ_FWDL,
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__MT_TXQ_MAX
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};
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enum mt76_mcuq_id {
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MT_MCUQ_WM,
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MT_MCUQ_WA,
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MT_MCUQ_FWDL,
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__MT_MCUQ_MAX
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};
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@ -811,7 +811,7 @@ static inline int mt76_init_mcu_queue(struct mt76_dev *dev, int qid, int idx,
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if (IS_ERR(q))
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return PTR_ERR(q);
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q->qid = qid;
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q->qid = __MT_TXQ_MAX + qid;
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dev->q_mcu[qid] = q;
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return 0;
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@ -4,21 +4,6 @@
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#include "mac.h"
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#include "../dma.h"
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static int
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mt7603_init_tx_queue(struct mt7603_dev *dev, int qid, int idx, int n_desc)
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{
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int err;
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err = mt76_init_tx_queue(&dev->mphy, qid, idx, n_desc,
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MT_TX_RING_BASE);
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if (err < 0)
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return err;
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mt7603_irq_enable(dev, MT_INT_TX_DONE(idx));
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return 0;
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}
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static void
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mt7603_rx_loopback_skb(struct mt7603_dev *dev, struct sk_buff *skb)
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{
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@ -146,13 +131,15 @@ static int mt7603_poll_tx(struct napi_struct *napi, int budget)
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dev = container_of(napi, struct mt7603_dev, mt76.tx_napi);
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dev->tx_dma_check = 0;
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for (i = MT_TXQ_MCU; i >= 0; i--)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
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for (i = MT_TXQ_PSD; i >= 0; i--)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], false);
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if (napi_complete_done(napi, 0))
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mt7603_irq_enable(dev, MT_INT_TX_DONE_ALL);
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for (i = MT_TXQ_MCU; i >= 0; i--)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
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for (i = MT_TXQ_PSD; i >= 0; i--)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], false);
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mt7603_mac_sta_poll(dev);
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@ -185,32 +172,42 @@ int mt7603_dma_init(struct mt7603_dev *dev)
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mt7603_pse_client_reset(dev);
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for (i = 0; i < ARRAY_SIZE(wmm_queue_map); i++) {
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ret = mt7603_init_tx_queue(dev, i, wmm_queue_map[i],
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MT7603_TX_RING_SIZE);
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ret = mt76_init_tx_queue(&dev->mphy, i, wmm_queue_map[i],
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MT7603_TX_RING_SIZE, MT_TX_RING_BASE);
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if (ret)
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return ret;
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}
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ret = mt7603_init_tx_queue(dev, MT_TXQ_PSD,
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MT_TX_HW_QUEUE_MGMT, MT7603_PSD_RING_SIZE);
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ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_PSD, MT_TX_HW_QUEUE_MGMT,
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MT7603_PSD_RING_SIZE, MT_TX_RING_BASE);
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if (ret)
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return ret;
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ret = mt7603_init_tx_queue(dev, MT_TXQ_MCU,
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MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
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ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT_TX_HW_QUEUE_MCU,
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MT_MCU_RING_SIZE, MT_TX_RING_BASE);
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if (ret)
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return ret;
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ret = mt7603_init_tx_queue(dev, MT_TXQ_BEACON,
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MT_TX_HW_QUEUE_BCN, MT_MCU_RING_SIZE);
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ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_BEACON, MT_TX_HW_QUEUE_BCN,
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MT_MCU_RING_SIZE, MT_TX_RING_BASE);
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if (ret)
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return ret;
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ret = mt7603_init_tx_queue(dev, MT_TXQ_CAB,
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MT_TX_HW_QUEUE_BMC, MT_MCU_RING_SIZE);
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ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_CAB, MT_TX_HW_QUEUE_BMC,
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MT_MCU_RING_SIZE, MT_TX_RING_BASE);
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if (ret)
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return ret;
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mt7603_irq_enable(dev,
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MT_INT_TX_DONE(IEEE80211_AC_VO) |
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MT_INT_TX_DONE(IEEE80211_AC_VI) |
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MT_INT_TX_DONE(IEEE80211_AC_BE) |
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MT_INT_TX_DONE(IEEE80211_AC_BK) |
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MT_INT_TX_DONE(MT_TX_HW_QUEUE_MGMT) |
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MT_INT_TX_DONE(MT_TX_HW_QUEUE_MCU) |
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MT_INT_TX_DONE(MT_TX_HW_QUEUE_BCN) |
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MT_INT_TX_DONE(MT_TX_HW_QUEUE_BMC));
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ret = mt7603_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
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MT7603_MCU_RX_RING_SIZE, MT_RX_BUF_SIZE);
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if (ret)
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@ -1434,6 +1434,7 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
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mt7603_pse_client_reset(dev);
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true);
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for (i = 0; i < __MT_TXQ_MAX; i++)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], true);
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@ -73,7 +73,7 @@ mt7603_mcu_skb_send_msg(struct mt76_dev *mdev, struct sk_buff *skb,
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if (wait_seq)
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*wait_seq = seq;
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return mt76_tx_queue_skb_raw(dev, mdev->q_tx[MT_TXQ_MCU], skb, 0);
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return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[MT_MCUQ_WM], skb, 0);
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}
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static int
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@ -332,21 +332,18 @@ static int
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mt7615_queues_read(struct seq_file *s, void *data)
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{
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struct mt7615_dev *dev = dev_get_drvdata(s->private);
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static const struct {
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struct {
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struct mt76_queue *q;
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char *queue;
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int id;
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} queue_map[] = {
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{ "PDMA0", MT_TXQ_BE },
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{ "MCUQ", MT_TXQ_MCU },
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{ "MCUFWQ", MT_TXQ_FWDL },
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{ dev->mt76.q_tx[MT_TXQ_BE], "PDMA0" },
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{ dev->mt76.q_mcu[MT_MCUQ_WM], "MCUQ" },
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{ dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" },
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};
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int i;
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for (i = 0; i < ARRAY_SIZE(queue_map); i++) {
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struct mt76_queue *q = dev->mt76.q_tx[queue_map[i].id];
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if (!q)
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continue;
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struct mt76_queue *q = queue_map[i].q;
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seq_printf(s,
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"%s: queued=%d head=%d tail=%d\n",
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@ -37,9 +37,8 @@ mt7622_init_tx_queues_multi(struct mt7615_dev *dev)
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if (ret)
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return ret;
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return mt76_init_tx_queue(&dev->mphy, MT_TXQ_MCU, MT7622_TXQ_MCU,
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MT7615_TX_MCU_RING_SIZE,
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MT_TX_RING_BASE);
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return mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7622_TXQ_MCU,
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MT7615_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
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}
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static int
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@ -47,9 +46,8 @@ mt7615_init_tx_queues(struct mt7615_dev *dev)
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{
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int ret, i;
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ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_FWDL, MT7615_TXQ_FWDL,
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MT7615_TX_FWDL_RING_SIZE,
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MT_TX_RING_BASE);
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ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7615_TXQ_FWDL,
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MT7615_TX_FWDL_RING_SIZE, MT_TX_RING_BASE);
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if (ret)
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return ret;
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@ -61,12 +59,11 @@ mt7615_init_tx_queues(struct mt7615_dev *dev)
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if (ret)
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return ret;
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for (i = 1; i < MT_TXQ_MCU; i++)
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for (i = 1; i <= MT_TXQ_PSD ; i++)
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dev->mt76.q_tx[i] = dev->mt76.q_tx[0];
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return mt76_init_tx_queue(&dev->mphy, MT_TXQ_MCU, MT7615_TXQ_MCU,
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MT7615_TX_MCU_RING_SIZE,
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MT_TX_RING_BASE);
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return mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7615_TXQ_MCU,
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MT7615_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
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}
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static int mt7615_poll_tx(struct napi_struct *napi, int budget)
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dev = container_of(napi, struct mt7615_dev, mt76.tx_napi);
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[MT_TXQ_MCU], false);
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
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if (napi_complete_done(napi, 0))
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mt7615_irq_enable(dev, mt7615_tx_mcu_int_mask(dev));
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@ -2044,6 +2044,7 @@ void mt7615_dma_reset(struct mt7615_dev *dev)
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MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE);
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usleep_range(1000, 2000);
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true);
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for (i = 0; i < __MT_TXQ_MAX; i++)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], true);
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@ -235,11 +235,11 @@ mt7615_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
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mt7615_mcu_fill_msg(dev, skb, cmd, seq);
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if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
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qid = MT_TXQ_MCU;
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qid = MT_MCUQ_WM;
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else
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qid = MT_TXQ_FWDL;
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qid = MT_MCUQ_FWDL;
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return mt76_tx_queue_skb_raw(dev, dev->mt76.q_tx[qid], skb, 0);
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return mt76_tx_queue_skb_raw(dev, dev->mt76.q_mcu[qid], skb, 0);
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}
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u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg)
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@ -2464,7 +2464,7 @@ int mt7615_mcu_init(struct mt7615_dev *dev)
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if (ret)
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return ret;
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[MT_TXQ_FWDL], false);
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
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dev_dbg(dev->mt76.dev, "Firmware init done\n");
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set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
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mt7615_mcu_fw_log_2_host(dev, 0);
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@ -516,7 +516,7 @@ static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
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static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
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{
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return MT_INT_TX_DONE(dev->mt76.q_tx[MT_TXQ_MCU]->hw_idx);
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return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
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}
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void mt7615_dma_reset(struct mt7615_dev *dev);
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@ -42,11 +42,11 @@ mt7663s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
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int ret;
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mt7615_mcu_fill_msg(dev, skb, cmd, seq);
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ret = mt76_tx_queue_skb_raw(dev, mdev->q_tx[MT_TXQ_MCU], skb, 0);
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ret = mt76_tx_queue_skb_raw(dev, mdev->q_mcu[MT_MCUQ_WM], skb, 0);
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if (ret)
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return ret;
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mt76_queue_kick(dev, mdev->q_tx[MT_TXQ_MCU]);
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mt76_queue_kick(dev, mdev->q_mcu[MT_MCUQ_WM]);
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return ret;
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}
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@ -217,7 +217,7 @@ static int __mt7663s_xmit_queue(struct mt76_dev *dev, u8 *data, int len)
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static int mt7663s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q)
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{
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int qid, err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0;
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bool mcu = q == dev->q_tx[MT_TXQ_MCU];
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bool mcu = q == dev->q_mcu[MT_MCUQ_WM];
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struct mt76_sdio *sdio = &dev->sdio;
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qid = mcu ? ARRAY_SIZE(sdio->xmit_buf) - 1 : q->qid;
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@ -286,11 +286,14 @@ void mt7663s_txrx_worker(struct mt76_worker *w)
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nframes = 0;
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/* tx */
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for (i = 0; i < MT_TXQ_MCU_WA; i++) {
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for (i = 0; i <= MT_TXQ_PSD; i++) {
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ret = mt7663s_tx_run_queue(dev, dev->q_tx[i]);
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if (ret > 0)
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nframes += ret;
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}
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ret = mt7663s_tx_run_queue(dev, dev->q_mcu[MT_MCUQ_WM]);
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if (ret > 0)
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nframes += ret;
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/* rx */
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ret = mt7663s_rx_handler(dev);
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@ -61,7 +61,7 @@ int mt76x02_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data,
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FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) |
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FIELD_PREP(MT_MCU_MSG_LEN, skb->len);
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ret = mt76_tx_queue_skb_raw(dev, mdev->q_tx[MT_TXQ_MCU], skb, tx_info);
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ret = mt76_tx_queue_skb_raw(dev, mdev->q_mcu[MT_MCUQ_WM], skb, tx_info);
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if (ret)
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goto out;
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@ -104,21 +104,6 @@ void mt76x02e_init_beacon_config(struct mt76x02_dev *dev)
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}
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EXPORT_SYMBOL_GPL(mt76x02e_init_beacon_config);
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static int
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mt76x02_init_tx_queue(struct mt76x02_dev *dev, int qid, int idx, int n_desc)
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{
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int err;
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err = mt76_init_tx_queue(&dev->mphy, qid, idx, n_desc,
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MT_TX_RING_BASE);
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if (err < 0)
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return err;
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mt76x02_irq_enable(dev, MT_INT_TX_DONE(idx));
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return 0;
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}
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static int
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mt76x02_init_rx_queue(struct mt76x02_dev *dev, struct mt76_queue *q,
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int idx, int n_desc, int bufsize)
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@ -164,13 +149,15 @@ static int mt76x02_poll_tx(struct napi_struct *napi, int budget)
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mt76x02_mac_poll_tx_status(dev, false);
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for (i = MT_TXQ_MCU; i >= 0; i--)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
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for (i = MT_TXQ_PSD; i >= 0; i--)
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mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], false);
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if (napi_complete_done(napi, 0))
|
||||
mt76x02_irq_enable(dev, MT_INT_TX_DONE_ALL);
|
||||
|
||||
for (i = MT_TXQ_MCU; i >= 0; i--)
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
|
||||
for (i = MT_TXQ_PSD; i >= 0; i--)
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], false);
|
||||
|
||||
mt76_worker_schedule(&dev->mt76.tx_worker);
|
||||
|
@ -203,22 +190,31 @@ int mt76x02_dma_init(struct mt76x02_dev *dev)
|
|||
mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
|
||||
|
||||
for (i = 0; i < IEEE80211_NUM_ACS; i++) {
|
||||
ret = mt76x02_init_tx_queue(dev, i, mt76_ac_to_hwq(i),
|
||||
MT76x02_TX_RING_SIZE);
|
||||
ret = mt76_init_tx_queue(&dev->mphy, i, mt76_ac_to_hwq(i),
|
||||
MT76x02_TX_RING_SIZE,
|
||||
MT_TX_RING_BASE);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = mt76x02_init_tx_queue(dev, MT_TXQ_PSD,
|
||||
MT_TX_HW_QUEUE_MGMT, MT76x02_PSD_RING_SIZE);
|
||||
ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_PSD, MT_TX_HW_QUEUE_MGMT,
|
||||
MT76x02_PSD_RING_SIZE, MT_TX_RING_BASE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt76x02_init_tx_queue(dev, MT_TXQ_MCU,
|
||||
MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
|
||||
ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT_TX_HW_QUEUE_MCU,
|
||||
MT_MCU_RING_SIZE, MT_TX_RING_BASE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
mt76x02_irq_enable(dev,
|
||||
MT_INT_TX_DONE(IEEE80211_AC_VO) |
|
||||
MT_INT_TX_DONE(IEEE80211_AC_VI) |
|
||||
MT_INT_TX_DONE(IEEE80211_AC_BE) |
|
||||
MT_INT_TX_DONE(IEEE80211_AC_BK) |
|
||||
MT_INT_TX_DONE(MT_TX_HW_QUEUE_MGMT) |
|
||||
MT_INT_TX_DONE(MT_TX_HW_QUEUE_MCU));
|
||||
|
||||
ret = mt76x02_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
|
||||
MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
|
||||
if (ret)
|
||||
|
@ -469,6 +465,7 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev)
|
|||
if (restart)
|
||||
mt76_mcu_restart(dev);
|
||||
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], true);
|
||||
for (i = 0; i < __MT_TXQ_MAX; i++)
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], true);
|
||||
|
||||
|
|
|
@ -280,22 +280,19 @@ static int
|
|||
mt7915_queues_read(struct seq_file *s, void *data)
|
||||
{
|
||||
struct mt7915_dev *dev = dev_get_drvdata(s->private);
|
||||
static const struct {
|
||||
struct {
|
||||
struct mt76_queue *q;
|
||||
char *queue;
|
||||
int id;
|
||||
} queue_map[] = {
|
||||
{ "WFDMA0", MT_TXQ_BE },
|
||||
{ "MCUWM", MT_TXQ_MCU },
|
||||
{ "MCUWA", MT_TXQ_MCU_WA },
|
||||
{ "MCUFWQ", MT_TXQ_FWDL },
|
||||
{ dev->mt76.q_tx[MT_TXQ_BE], "WFDMA0" },
|
||||
{ dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" },
|
||||
{ dev->mt76.q_mcu[MT_MCUQ_WA], "MCUWA" },
|
||||
{ dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" },
|
||||
};
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(queue_map); i++) {
|
||||
struct mt76_queue *q = dev->mt76.q_tx[queue_map[i].id];
|
||||
|
||||
if (!q)
|
||||
continue;
|
||||
struct mt76_queue *q = queue_map[i].q;
|
||||
|
||||
seq_printf(s,
|
||||
"%s: queued=%d head=%d tail=%d\n",
|
||||
|
|
|
@ -14,7 +14,7 @@ mt7915_init_tx_queues(struct mt7915_dev *dev, int idx, int n_desc)
|
|||
if (err < 0)
|
||||
return err;
|
||||
|
||||
for (i = 0; i < MT_TXQ_MCU; i++)
|
||||
for (i = 0; i <= MT_TXQ_PSD; i++)
|
||||
dev->mt76.q_tx[i] = dev->mt76.q_tx[0];
|
||||
|
||||
return 0;
|
||||
|
@ -56,8 +56,8 @@ void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
|
|||
static void
|
||||
mt7915_tx_cleanup(struct mt7915_dev *dev)
|
||||
{
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[MT_TXQ_MCU], false);
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[MT_TXQ_MCU_WA], false);
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], false);
|
||||
}
|
||||
|
||||
static int mt7915_poll_tx(struct napi_struct *napi, int budget)
|
||||
|
@ -243,20 +243,20 @@ int mt7915_dma_init(struct mt7915_dev *dev)
|
|||
return ret;
|
||||
|
||||
/* command to WM */
|
||||
ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_MCU, MT7915_TXQ_MCU_WM,
|
||||
MT7915_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
|
||||
ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7915_TXQ_MCU_WM,
|
||||
MT7915_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* command to WA */
|
||||
ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_MCU_WA, MT7915_TXQ_MCU_WA,
|
||||
MT7915_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
|
||||
ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WA, MT7915_TXQ_MCU_WA,
|
||||
MT7915_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* firmware download */
|
||||
ret = mt76_init_tx_queue(&dev->mphy, MT_TXQ_FWDL, MT7915_TXQ_FWDL,
|
||||
MT7915_TX_FWDL_RING_SIZE, MT_TX_RING_BASE);
|
||||
ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7915_TXQ_FWDL,
|
||||
MT7915_TX_FWDL_RING_SIZE, MT_TX_RING_BASE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
|
@ -1420,6 +1420,7 @@ mt7915_dma_reset(struct mt7915_dev *dev)
|
|||
MT_WFDMA1_GLO_CFG_TX_DMA_EN | MT_WFDMA1_GLO_CFG_RX_DMA_EN);
|
||||
usleep_range(1000, 2000);
|
||||
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], true);
|
||||
for (i = 0; i < __MT_TXQ_MAX; i++)
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[i], true);
|
||||
|
||||
|
|
|
@ -268,18 +268,18 @@ mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
|
|||
seq = ++dev->mt76.mcu.msg_seq & 0xf;
|
||||
|
||||
if (cmd == -MCU_CMD_FW_SCATTER) {
|
||||
txq = MT_TXQ_FWDL;
|
||||
txq = MT_MCUQ_FWDL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
mcu_txd = (struct mt7915_mcu_txd *)skb_push(skb, sizeof(*mcu_txd));
|
||||
|
||||
if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) {
|
||||
txq = MT_TXQ_MCU_WA;
|
||||
txq = MT_MCUQ_WA;
|
||||
qidx = MT_TX_MCU_PORT_RX_Q0;
|
||||
pkt_fmt = MT_TX_TYPE_CMD;
|
||||
} else {
|
||||
txq = MT_TXQ_MCU;
|
||||
txq = MT_MCUQ_WM;
|
||||
qidx = MT_TX_MCU_PORT_RX_Q0;
|
||||
pkt_fmt = MT_TX_TYPE_CMD;
|
||||
}
|
||||
|
@ -326,7 +326,7 @@ exit:
|
|||
if (wait_seq)
|
||||
*wait_seq = seq;
|
||||
|
||||
return mt76_tx_queue_skb_raw(dev, mdev->q_tx[txq], skb, 0);
|
||||
return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
|
@ -2799,7 +2799,7 @@ static int mt7915_load_firmware(struct mt7915_dev *dev)
|
|||
return -EIO;
|
||||
}
|
||||
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_tx[MT_TXQ_FWDL], false);
|
||||
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
|
||||
|
||||
dev_dbg(dev->mt76.dev, "Firmware init done\n");
|
||||
|
||||
|
|
|
@ -74,8 +74,8 @@ static int mt76s_alloc_tx(struct mt76_dev *dev)
|
|||
if (IS_ERR(q))
|
||||
return PTR_ERR(q);
|
||||
|
||||
q->qid = MT_TXQ_MCU;
|
||||
dev->q_tx[MT_TXQ_MCU] = q;
|
||||
q->qid = MT_MCUQ_WM;
|
||||
dev->q_mcu[MT_MCUQ_WM] = q;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -157,7 +157,7 @@ static void mt76s_net_worker(struct mt76_worker *w)
|
|||
|
||||
static int mt76s_process_tx_queue(struct mt76_dev *dev, struct mt76_queue *q)
|
||||
{
|
||||
bool wake, mcu = q == dev->q_tx[MT_TXQ_MCU];
|
||||
bool wake, mcu = q == dev->q_mcu[MT_MCUQ_WM];
|
||||
struct mt76_queue_entry entry;
|
||||
int nframes = 0;
|
||||
|
||||
|
@ -203,8 +203,9 @@ static void mt76s_status_worker(struct mt76_worker *w)
|
|||
int i, nframes;
|
||||
|
||||
do {
|
||||
nframes = 0;
|
||||
for (i = 0; i < MT_TXQ_MCU_WA; i++)
|
||||
nframes = mt76s_process_tx_queue(dev, dev->q_mcu[MT_MCUQ_WM]);
|
||||
|
||||
for (i = 0; i <= MT_TXQ_PSD; i++)
|
||||
nframes += mt76s_process_tx_queue(dev, dev->q_tx[i]);
|
||||
|
||||
if (dev->drv->tx_status_data &&
|
||||
|
|
Loading…
Reference in a new issue